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Searched refs:ebb0 (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.h214 u32 ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, pcsdw12; member
Dintel_dpll_mgr.c1947 temp |= pll->state.hw_state.ebb0; in bxt_ddi_pll_enable()
2081 hw_state->ebb0 = intel_de_read(dev_priv, BXT_PORT_PLL_EBB_0(phy, ch)); in bxt_ddi_pll_get_hw_state()
2082 hw_state->ebb0 &= PORT_PLL_P1_MASK | PORT_PLL_P2_MASK; in bxt_ddi_pll_get_hw_state()
2230 dpll_hw_state->ebb0 = PORT_PLL_P1(clk_div->p1) | PORT_PLL_P2(clk_div->p2); in bxt_ddi_set_dpll_hw_state()
2267 clock.p1 = REG_FIELD_GET(PORT_PLL_P1_MASK, pll_state->ebb0); in bxt_ddi_pll_get_freq()
2268 clock.p2 = REG_FIELD_GET(PORT_PLL_P2_MASK, pll_state->ebb0); in bxt_ddi_pll_get_freq()
2355 hw_state->ebb0, in bxt_dump_hw_state()
Dintel_display.c5848 PIPE_CONF_CHECK_X(dpll_hw_state.ebb0); in intel_pipe_config_compare()