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Searched refs:gen_synth2_3_parents (Results 1 – 2 of 2) sorted by relevance

/drivers/clk/spear/
Dspear1340_clock.c437 static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco2div2_clk", variable
898 clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents, in spear1340_clk_init()
899 ARRAY_SIZE(gen_synth2_3_parents), in spear1340_clk_init()
Dspear1310_clock.c370 static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco3div2_clk", variable
813 clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents, in spear1310_clk_init()
814 ARRAY_SIZE(gen_synth2_3_parents), in spear1310_clk_init()