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Searched refs:hw_dsc (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_dsc.h24 void (*dsc_disable)(struct dpu_hw_dsc *hw_dsc);
33 void (*dsc_config)(struct dpu_hw_dsc *hw_dsc,
43 void (*dsc_config_thresh)(struct dpu_hw_dsc *hw_dsc,
Ddpu_hw_dsc.c39 static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc, in dpu_hw_dsc_config() argument
44 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_config()
121 static void dpu_hw_dsc_config_thresh(struct dpu_hw_dsc *hw_dsc, in dpu_hw_dsc_config_thresh() argument
125 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_config_thresh()
Ddpu_encoder.c181 struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC]; member
1033 struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set() local
1076 hw_dsc, ARRAY_SIZE(hw_dsc)); in dpu_encoder_virt_atomic_mode_set()
1078 dpu_enc->hw_dsc[i] = to_dpu_hw_dsc(hw_dsc[i]); in dpu_encoder_virt_atomic_mode_set()
1079 dsc_mask |= BIT(dpu_enc->hw_dsc[i]->idx - DSC_0); in dpu_encoder_virt_atomic_mode_set()
1821 static void dpu_encoder_dsc_pipe_cfg(struct dpu_hw_dsc *hw_dsc, in dpu_encoder_dsc_pipe_cfg() argument
1827 if (hw_dsc->ops.dsc_config) in dpu_encoder_dsc_pipe_cfg()
1828 hw_dsc->ops.dsc_config(hw_dsc, dsc, common_mode, initial_lines); in dpu_encoder_dsc_pipe_cfg()
1830 if (hw_dsc->ops.dsc_config_thresh) in dpu_encoder_dsc_pipe_cfg()
1831 hw_dsc->ops.dsc_config_thresh(hw_dsc, dsc); in dpu_encoder_dsc_pipe_cfg()
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