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Searched refs:mmCP_HYP_MEC1_UCODE_ADDR (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/inc/
Dpolaris10_pwrvirus.h27 #define mmCP_HYP_MEC1_UCODE_ADDR 0xf81a macro
60 { 0x00010000, mmCP_HYP_MEC1_UCODE_ADDR },
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6741 #define mmCP_HYP_MEC1_UCODE_ADDR macro
Dgc_9_2_1_offset.h6993 #define mmCP_HYP_MEC1_UCODE_ADDR macro
Dgc_9_1_offset.h6965 #define mmCP_HYP_MEC1_UCODE_ADDR macro
Dgc_10_3_0_offset.h9945 #define mmCP_HYP_MEC1_UCODE_ADDR macro