Searched refs:mmUVD_NO_OP (Results 1 – 20 of 20) sorted by relevance
| /drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_4_0_d.h | 61 #define mmUVD_NO_OP 0x3BFF macro
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| D | uvd_4_2_d.h | 37 #define mmUVD_NO_OP 0x3bff macro
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| D | uvd_3_1_d.h | 37 #define mmUVD_NO_OP 0x3bff macro
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| D | uvd_5_0_d.h | 37 #define mmUVD_NO_OP 0x3bff macro
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| D | uvd_6_0_d.h | 38 #define mmUVD_NO_OP 0x3bff macro
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| D | uvd_7_0_offset.h | 80 #define mmUVD_NO_OP … macro
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| /drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| D | vcn_1_0_offset.h | 168 #define mmUVD_NO_OP … macro
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| D | vcn_2_5_offset.h | 549 #define mmUVD_NO_OP … macro
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| D | vcn_2_0_0_offset.h | 858 #define mmUVD_NO_OP … macro
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| D | vcn_3_0_0_offset.h | 879 #define mmUVD_NO_OP … macro
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | uvd_v3_1.c | 174 amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0)); in uvd_v3_1_ring_insert_nop()
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| D | uvd_v4_2.c | 557 amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0)); in uvd_v4_2_ring_insert_nop()
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| D | uvd_v5_0.c | 574 amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0)); in uvd_v5_0_ring_insert_nop()
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| D | vcn_v1_0.c | 137 SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP); in vcn_v1_0_sw_init()
1754 amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP), 0)); in vcn_v1_0_dec_ring_insert_nop()
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| D | amdgpu_uvd.c | 1018 case mmUVD_NO_OP: in amdgpu_uvd_cs_reg()
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| D | uvd_v6_0.c | 1110 amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0)); in uvd_v6_0_ring_insert_nop()
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| D | uvd_v7_0.c | 1420 amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_NO_OP), 0)); in uvd_v7_0_ring_insert_nop()
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| D | vcn_v2_0.c | 154 adev->vcn.inst->external.nop = SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP); in vcn_v2_0_sw_init()
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| D | vcn_v2_5.c | 181 adev->vcn.inst[j].external.nop = SOC15_REG_OFFSET(VCN, j, mmUVD_NO_OP); in vcn_v2_5_sw_init()
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| D | vcn_v3_0.c | 174 adev->vcn.inst[i].external.nop = SOC15_REG_OFFSET(VCN, i, mmUVD_NO_OP); in vcn_v3_0_sw_init()
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