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Searched refs:mmVCE_VCPU_CACHE_SIZE1 (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vce/
Dvce_1_0_d.h60 #define mmVCE_VCPU_CACHE_SIZE1 0x800C macro
Dvce_2_0_d.h32 #define mmVCE_VCPU_CACHE_SIZE1 0x800c macro
Dvce_3_0_d.h32 #define mmVCE_VCPU_CACHE_SIZE1 0x800c macro
Dvce_4_0_offset.h38 #define mmVCE_VCPU_CACHE_SIZE1 macro
/drivers/gpu/drm/amd/amdgpu/
Dvce_v3_0.c583 WREG32(mmVCE_VCPU_CACHE_SIZE1, size); in vce_v3_0_mc_resume()
592 WREG32(mmVCE_VCPU_CACHE_SIZE1, size); in vce_v3_0_mc_resume()
Dvce_v2_0.c193 WREG32(mmVCE_VCPU_CACHE_SIZE1, size); in vce_v2_0_mc_resume()
Dvce_v4_0.c291 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_SIZE1), size); in vce_v4_0_sriov_start()
676 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_SIZE1), size); in vce_v4_0_mc_resume()