Home
last modified time | relevance | path

Searched refs:subop (Results 1 – 16 of 16) sorted by relevance

/drivers/net/ethernet/fungible/funcore/
Dfun_hci.h151 __u8 subop; member
159 .subop = (_subop), .flags = cpu_to_be16(_flags), \
185 __u8 subop; member
215 __u8 subop; member
242 __u8 subop; member
259 .subop = (_subop), .flags = cpu_to_be16(_flags), \
276 .subop = (_subop), .flags = cpu_to_be16(_flags), \
297 __u8 subop; member
334 .subop = (_subop), .flags = cpu_to_be16(_flags), \
472 __u8 subop; /* see fun_data_subop enum */ member
[all …]
/drivers/mtd/nand/raw/
Darasan-nand-controller.c596 const struct nand_subop *subop, in anfc_parse_instructions() argument
610 for (op_id = 0; op_id < subop->ninstrs; op_id++) { in anfc_parse_instructions()
615 instr = &subop->instrs[op_id]; in anfc_parse_instructions()
628 offset = nand_subop_get_addr_start_off(subop, op_id); in anfc_parse_instructions()
629 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in anfc_parse_instructions()
645 offset = nand_subop_get_data_start_off(subop, op_id); in anfc_parse_instructions()
648 nfc_op->len = nand_subop_get_data_len(subop, op_id); in anfc_parse_instructions()
724 const struct nand_subop *subop, in anfc_misc_data_type_exec() argument
731 ret = anfc_parse_instructions(chip, subop, &nfc_op); in anfc_misc_data_type_exec()
748 const struct nand_subop *subop) in anfc_param_read_type_exec() argument
[all …]
Dvf610_nfc.c347 vf610_get_next_instr(const struct nand_subop *subop, int *op_id) in vf610_get_next_instr() argument
349 if (*op_id + 1 >= subop->ninstrs) in vf610_get_next_instr()
354 return &subop->instrs[*op_id]; in vf610_get_next_instr()
358 const struct nand_subop *subop) in vf610_nfc_cmd() argument
372 instr = vf610_get_next_instr(subop, &op_id); in vf610_nfc_cmd()
380 instr = vf610_get_next_instr(subop, &op_id); in vf610_nfc_cmd()
384 int naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in vf610_nfc_cmd()
385 int i = nand_subop_get_addr_start_off(subop, op_id); in vf610_nfc_cmd()
397 instr = vf610_get_next_instr(subop, &op_id); in vf610_nfc_cmd()
401 trfr_sz = nand_subop_get_data_len(subop, op_id); in vf610_nfc_cmd()
[all …]
Dnand_base.c2176 struct nand_subop subop; member
2250 unsigned int instr_offset = ctx->subop.first_instr_start_off; in nand_op_parser_match_pat()
2252 const struct nand_op_instr *instr = ctx->subop.instrs; in nand_op_parser_match_pat()
2313 ctx->subop.ninstrs = ninstrs; in nand_op_parser_match_pat()
2314 ctx->subop.last_instr_end_off = instr_offset; in nand_op_parser_match_pat()
2326 pr_debug("executing subop (CS%d):\n", ctx->subop.cs); in nand_op_parser_trace()
2331 if (instr == &ctx->subop.instrs[0]) in nand_op_parser_trace()
2336 if (instr == &ctx->subop.instrs[ctx->subop.ninstrs - 1]) in nand_op_parser_trace()
2350 if (a->subop.ninstrs < b->subop.ninstrs) in nand_op_parser_cmp_ctx()
2352 else if (a->subop.ninstrs > b->subop.ninstrs) in nand_op_parser_cmp_ctx()
[all …]
Dmarvell_nand.c1702 const struct nand_subop *subop, in marvell_nfc_parse_instructions() argument
1714 for (op_id = 0; op_id < subop->ninstrs; op_id++) { in marvell_nfc_parse_instructions()
1719 instr = &subop->instrs[op_id]; in marvell_nfc_parse_instructions()
1736 offset = nand_subop_get_addr_start_off(subop, op_id); in marvell_nfc_parse_instructions()
1737 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in marvell_nfc_parse_instructions()
1763 len = nand_subop_get_data_len(subop, op_id); in marvell_nfc_parse_instructions()
1777 len = nand_subop_get_data_len(subop, op_id); in marvell_nfc_parse_instructions()
1792 const struct nand_subop *subop, in marvell_nfc_xfer_data_pio() argument
1798 unsigned int len = nand_subop_get_data_len(subop, op_id); in marvell_nfc_xfer_data_pio()
1799 unsigned int offset = nand_subop_get_data_start_off(subop, op_id); in marvell_nfc_xfer_data_pio()
[all …]
Dcadence-nand-controller.c1996 const struct nand_subop *subop) in cadence_nand_cmd_opcode() argument
2005 instr = &subop->instrs[op_id]; in cadence_nand_cmd_opcode()
2026 const struct nand_subop *subop) in cadence_nand_cmd_address() argument
2039 instr = &subop->instrs[op_id]; in cadence_nand_cmd_address()
2047 offset = nand_subop_get_addr_start_off(subop, op_id); in cadence_nand_cmd_address()
2048 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in cadence_nand_cmd_address()
2069 const struct nand_subop *subop) in cadence_nand_cmd_erase() argument
2073 if (subop->instrs[0].ctx.cmd.opcode == NAND_CMD_ERASE1) { in cadence_nand_cmd_erase()
2080 instr = &subop->instrs[1]; in cadence_nand_cmd_erase()
2081 offset = nand_subop_get_addr_start_off(subop, 1); in cadence_nand_cmd_erase()
[all …]
Dtegra_nand.c351 const struct nand_subop *subop) in tegra_nand_cmd() argument
361 for (op_id = 0; op_id < subop->ninstrs; op_id++) { in tegra_nand_cmd()
366 instr = &subop->instrs[op_id]; in tegra_nand_cmd()
383 offset = nand_subop_get_addr_start_off(subop, op_id); in tegra_nand_cmd()
384 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in tegra_nand_cmd()
399 size = nand_subop_get_data_len(subop, op_id); in tegra_nand_cmd()
400 offset = nand_subop_get_data_start_off(subop, op_id); in tegra_nand_cmd()
409 size = nand_subop_get_data_len(subop, op_id); in tegra_nand_cmd()
410 offset = nand_subop_get_data_start_off(subop, op_id); in tegra_nand_cmd()
Dpl35x-nand-controller.c665 const struct nand_subop *subop) in pl35x_nand_exec_op() argument
677 for (op_id = 0; op_id < subop->ninstrs; op_id++) { in pl35x_nand_exec_op()
678 instr = &subop->instrs[op_id]; in pl35x_nand_exec_op()
693 offset = nand_subop_get_addr_start_off(subop, op_id); in pl35x_nand_exec_op()
694 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in pl35x_nand_exec_op()
709 len = nand_subop_get_data_len(subop, op_id); in pl35x_nand_exec_op()
Drockchip-nand-controller.c333 const struct nand_subop *subop) in rk_nfc_cmd() argument
343 for (i = 0; i < subop->ninstrs; i++) { in rk_nfc_cmd()
344 const struct nand_op_instr *instr = &subop->instrs[i]; in rk_nfc_cmd()
353 remaining = nand_subop_get_num_addr_cyc(subop, i); in rk_nfc_cmd()
354 start = nand_subop_get_addr_start_off(subop, i); in rk_nfc_cmd()
363 start = nand_subop_get_data_start_off(subop, i); in rk_nfc_cmd()
364 cnt = nand_subop_get_data_len(subop, i); in rk_nfc_cmd()
Dsunxi_nand.c1798 const struct nand_subop *subop) in sunxi_nfc_exec_subop() argument
1806 for (i = 0; i < subop->ninstrs; i++) { in sunxi_nfc_exec_subop()
1807 const struct nand_op_instr *instr = &subop->instrs[i]; in sunxi_nfc_exec_subop()
1824 remaining = nand_subop_get_num_addr_cyc(subop, i); in sunxi_nfc_exec_subop()
1825 start = nand_subop_get_addr_start_off(subop, i); in sunxi_nfc_exec_subop()
1839 start = nand_subop_get_data_start_off(subop, i); in sunxi_nfc_exec_subop()
1840 remaining = nand_subop_get_data_len(subop, i); in sunxi_nfc_exec_subop()
1894 const struct nand_subop *subop) in sunxi_nfc_soft_waitrdy() argument
1897 subop->instrs[0].ctx.waitrdy.timeout_ms); in sunxi_nfc_soft_waitrdy()
/drivers/acpi/acpica/
Dpsargs.c710 u32 subop; in acpi_ps_get_next_arg() local
804 subop = acpi_ps_peek_opcode(parser_state); in acpi_ps_get_next_arg()
805 if (subop == 0 || in acpi_ps_get_next_arg()
806 acpi_ps_is_leading_char(subop) || in acpi_ps_get_next_arg()
807 ACPI_IS_ROOT_PREFIX(subop) || in acpi_ps_get_next_arg()
808 ACPI_IS_PARENT_PREFIX(subop)) { in acpi_ps_get_next_arg()
838 subop = acpi_ps_peek_opcode(parser_state); in acpi_ps_get_next_arg()
839 if (subop == 0 || in acpi_ps_get_next_arg()
840 acpi_ps_is_leading_char(subop) || in acpi_ps_get_next_arg()
841 ACPI_IS_ROOT_PREFIX(subop) || in acpi_ps_get_next_arg()
[all …]
/drivers/net/ethernet/fungible/funeth/
Dfuneth_ktls.c11 .subop = FUN_ADMIN_SUBOP_CREATE, in fun_admin_ktls_create()
27 .subop = FUN_ADMIN_SUBOP_MODIFY, in fun_ktls_add()
86 req.subop = FUN_ADMIN_SUBOP_MODIFY; in fun_ktls_del()
110 req.subop = FUN_ADMIN_SUBOP_MODIFY; in fun_ktls_resync()
Dfuneth_main.c159 .u.write.subop = FUN_ADMIN_SUBOP_WRITE, in fun_adi_write()
1925 if (rsp->subop == FUN_ADMIN_SUBOP_NOTIFY) { in fun_event_cb()
1927 } else if (rsp->subop == FUN_ADMIN_SUBOP_RES_COUNT) { in fun_event_cb()
1937 op, rsp->subop); in fun_event_cb()
/drivers/gpu/host1x/hw/
Ddebug_hw.c44 unsigned int mask, subop, num, opcode; in show_channel_command() local
142 subop = val >> 24 & 0xf; in show_channel_command()
143 if (subop == HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK) in show_channel_command()
146 else if (subop == HOST1X_OPCODE_EXTEND_RELEASE_MLOCK) in show_channel_command()
/drivers/scsi/csiostor/
Dcsio_isr.c151 uint8_t subop; in csio_process_scsi_cmpl() local
158 subop = FW_SCSI_ABRT_CLS_WR_SUB_OPCODE_GET( in csio_process_scsi_cmpl()
163 subop ? "Close" : "Abort", in csio_process_scsi_cmpl()
167 if (subop) in csio_process_scsi_cmpl()
/drivers/mtd/nand/raw/atmel/
Dnand-controller.c633 const struct nand_subop *subop) in atmel_hsmc_exec_cmd_addr() argument
642 for (i = 0; i < subop->ninstrs; i++) { in atmel_hsmc_exec_cmd_addr()
643 const struct nand_op_instr *instr = &subop->instrs[i]; in atmel_hsmc_exec_cmd_addr()
650 for (j = nand_subop_get_addr_start_off(subop, i); in atmel_hsmc_exec_cmd_addr()
651 j < nand_subop_get_num_addr_cyc(subop, i); j++) { in atmel_hsmc_exec_cmd_addr()
661 const struct nand_subop *subop) in atmel_hsmc_exec_rw() argument
663 const struct nand_op_instr *instr = subop->instrs; in atmel_hsmc_exec_rw()
679 const struct nand_subop *subop) in atmel_hsmc_exec_waitrdy() argument
681 const struct nand_op_instr *instr = subop->instrs; in atmel_hsmc_exec_waitrdy()