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Searched refs:AZX_REG_VS_EM2_L1SEN (Results 1 – 2 of 2) sorted by relevance

/sound/soc/intel/skylake/
Dskl.h41 #define AZX_REG_VS_EM2_L1SEN BIT(13) macro
Dskl.c115 val = enable ? AZX_REG_VS_EM2_L1SEN : 0; in skl_clock_power_gating()
116 snd_hdac_chip_updatel(bus, VS_EM2, AZX_REG_VS_EM2_L1SEN, val); in skl_clock_power_gating()