1 /*
2 * Copyright (c) 2016-2017 Hisilicon Limited.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef _HNS_ROCE_HW_V2_H
34 #define _HNS_ROCE_HW_V2_H
35
36 #include <linux/bitops.h>
37
38 #define HNS_ROCE_V2_MAX_QP_NUM 0x1000
39 #define HNS_ROCE_V2_MAX_WQE_NUM 0x8000
40 #define HNS_ROCE_V2_MAX_SRQ_WR 0x8000
41 #define HNS_ROCE_V2_MAX_SRQ_SGE 64
42 #define HNS_ROCE_V2_MAX_CQ_NUM 0x100000
43 #define HNS_ROCE_V2_MAX_QPC_TIMER_BT_NUM 0x100
44 #define HNS_ROCE_V2_MAX_CQC_TIMER_BT_NUM 0x100
45 #define HNS_ROCE_V2_MAX_SRQ_NUM 0x100000
46 #define HNS_ROCE_V2_MAX_CQE_NUM 0x400000
47 #define HNS_ROCE_V2_MAX_RQ_SGE_NUM 64
48 #define HNS_ROCE_V2_MAX_SQ_SGE_NUM 64
49 #define HNS_ROCE_V2_MAX_SQ_INLINE 0x20
50 #define HNS_ROCE_V3_MAX_SQ_INLINE 0x400
51 #define HNS_ROCE_V2_MAX_RC_INL_INN_SZ 32
52 #define HNS_ROCE_V2_UAR_NUM 256
53 #define HNS_ROCE_V2_PHY_UAR_NUM 1
54 #define HNS_ROCE_V2_AEQE_VEC_NUM 1
55 #define HNS_ROCE_V2_ABNORMAL_VEC_NUM 1
56 #define HNS_ROCE_V2_MAX_MTPT_NUM 0x100000
57 #define HNS_ROCE_V2_MAX_SRQWQE_SEGS 0x1000000
58 #define HNS_ROCE_V2_MAX_IDX_SEGS 0x1000000
59 #define HNS_ROCE_V2_MAX_PD_NUM 0x1000000
60 #define HNS_ROCE_V2_MAX_XRCD_NUM 0x1000000
61 #define HNS_ROCE_V2_RSV_XRCD_NUM 0
62 #define HNS_ROCE_V2_MAX_QP_INIT_RDMA 128
63 #define HNS_ROCE_V2_MAX_QP_DEST_RDMA 128
64 #define HNS_ROCE_V2_MAX_SQ_DESC_SZ 64
65 #define HNS_ROCE_V2_MAX_RQ_DESC_SZ 16
66 #define HNS_ROCE_V2_IRRL_ENTRY_SZ 64
67 #define HNS_ROCE_V2_EXT_ATOMIC_TRRL_ENTRY_SZ 100
68 #define HNS_ROCE_V2_CQC_ENTRY_SZ 64
69 #define HNS_ROCE_V2_SRQC_ENTRY_SZ 64
70 #define HNS_ROCE_V2_MTPT_ENTRY_SZ 64
71 #define HNS_ROCE_V2_MTT_ENTRY_SZ 64
72 #define HNS_ROCE_V2_IDX_ENTRY_SZ 4
73
74 #define HNS_ROCE_V2_SCCC_SZ 32
75 #define HNS_ROCE_V2_QP_ACK_TIMEOUT_OFS_HIP08 10
76
77 #define HNS_ROCE_V3_SCCC_SZ 64
78 #define HNS_ROCE_V3_GMV_ENTRY_SZ 32
79
80 #define HNS_ROCE_V2_EXT_LLM_ENTRY_SZ 8
81 #define HNS_ROCE_V2_EXT_LLM_MAX_DEPTH 4096
82
83 #define HNS_ROCE_V2_QPC_TIMER_ENTRY_SZ PAGE_SIZE
84 #define HNS_ROCE_V2_CQC_TIMER_ENTRY_SZ PAGE_SIZE
85 #define HNS_ROCE_V2_PAGE_SIZE_SUPPORTED 0xFFFF000
86 #define HNS_ROCE_V2_MAX_INNER_MTPT_NUM 2
87 #define HNS_ROCE_INVALID_LKEY 0x0
88 #define HNS_ROCE_INVALID_SGE_LENGTH 0x80000000
89 #define HNS_ROCE_CMQ_TX_TIMEOUT 30000
90 #define HNS_ROCE_V2_RSV_QPS 8
91
92 #define HNS_ROCE_V2_HW_RST_TIMEOUT 1000
93 #define HNS_ROCE_V2_HW_RST_UNINT_DELAY 100
94
95 #define HNS_ROCE_V2_HW_RST_COMPLETION_WAIT 20
96
97 #define HNS_ROCE_CONTEXT_HOP_NUM 1
98 #define HNS_ROCE_SCCC_HOP_NUM 1
99 #define HNS_ROCE_MTT_HOP_NUM 1
100 #define HNS_ROCE_CQE_HOP_NUM 1
101 #define HNS_ROCE_SRQWQE_HOP_NUM 1
102 #define HNS_ROCE_PBL_HOP_NUM 2
103 #define HNS_ROCE_IDX_HOP_NUM 1
104 #define HNS_ROCE_SQWQE_HOP_NUM 2
105 #define HNS_ROCE_EXT_SGE_HOP_NUM 1
106 #define HNS_ROCE_RQWQE_HOP_NUM 2
107
108 #define HNS_ROCE_V2_EQE_HOP_NUM 2
109 #define HNS_ROCE_V3_EQE_HOP_NUM 1
110
111 #define HNS_ROCE_BA_PG_SZ_SUPPORTED_256K 6
112 #define HNS_ROCE_BA_PG_SZ_SUPPORTED_16K 2
113 #define HNS_ROCE_V2_GID_INDEX_NUM 16
114
115 #define HNS_ROCE_V2_TABLE_CHUNK_SIZE (1 << 18)
116
117 enum {
118 HNS_ROCE_CMD_FLAG_IN = BIT(0),
119 HNS_ROCE_CMD_FLAG_OUT = BIT(1),
120 HNS_ROCE_CMD_FLAG_NEXT = BIT(2),
121 HNS_ROCE_CMD_FLAG_WR = BIT(3),
122 HNS_ROCE_CMD_FLAG_ERR_INTR = BIT(5),
123 };
124
125 #define HNS_ROCE_CMQ_DESC_NUM_S 3
126
127 #define HNS_ROCE_CMQ_SCC_CLR_DONE_CNT 5
128
129 #define HNS_ROCE_CONG_SIZE 64
130
131 #define check_whether_last_step(hop_num, step_idx) \
132 ((step_idx == 0 && hop_num == HNS_ROCE_HOP_NUM_0) || \
133 (step_idx == 1 && hop_num == 1) || \
134 (step_idx == 2 && hop_num == 2))
135 #define HNS_ICL_SWITCH_CMD_ROCEE_SEL_SHIFT 0
136 #define HNS_ICL_SWITCH_CMD_ROCEE_SEL BIT(HNS_ICL_SWITCH_CMD_ROCEE_SEL_SHIFT)
137
138 #define CMD_CSQ_DESC_NUM 1024
139 #define CMD_CRQ_DESC_NUM 1024
140
141 /* Free mr used parameters */
142 #define HNS_ROCE_FREE_MR_USED_CQE_NUM 128
143 #define HNS_ROCE_FREE_MR_USED_QP_NUM 0x8
144 #define HNS_ROCE_FREE_MR_USED_PSN 0x0808
145 #define HNS_ROCE_FREE_MR_USED_QP_RETRY_CNT 0x7
146 #define HNS_ROCE_FREE_MR_USED_QP_TIMEOUT 0x12
147 #define HNS_ROCE_FREE_MR_USED_SQWQE_NUM 128
148 #define HNS_ROCE_FREE_MR_USED_SQSGE_NUM 0x2
149 #define HNS_ROCE_FREE_MR_USED_RQWQE_NUM 128
150 #define HNS_ROCE_FREE_MR_USED_RQSGE_NUM 0x2
151 #define HNS_ROCE_V2_FREE_MR_TIMEOUT 4500
152
153 enum {
154 NO_ARMED = 0x0,
155 REG_NXT_CEQE = 0x2,
156 REG_NXT_SE_CEQE = 0x3
157 };
158
159 enum {
160 CQE_SIZE_32B = 0x0,
161 CQE_SIZE_64B = 0x1
162 };
163
164 #define V2_CQ_DB_REQ_NOT_SOL 0
165 #define V2_CQ_DB_REQ_NOT 1
166
167 #define V2_CQ_STATE_VALID 1
168 #define V2_QKEY_VAL 0x80010000
169
170 #define GID_LEN_V2 16
171
172 enum {
173 HNS_ROCE_V2_WQE_OP_SEND = 0x0,
174 HNS_ROCE_V2_WQE_OP_SEND_WITH_INV = 0x1,
175 HNS_ROCE_V2_WQE_OP_SEND_WITH_IMM = 0x2,
176 HNS_ROCE_V2_WQE_OP_RDMA_WRITE = 0x3,
177 HNS_ROCE_V2_WQE_OP_RDMA_WRITE_WITH_IMM = 0x4,
178 HNS_ROCE_V2_WQE_OP_RDMA_READ = 0x5,
179 HNS_ROCE_V2_WQE_OP_ATOM_CMP_AND_SWAP = 0x6,
180 HNS_ROCE_V2_WQE_OP_ATOM_FETCH_AND_ADD = 0x7,
181 HNS_ROCE_V2_WQE_OP_ATOM_MSK_CMP_AND_SWAP = 0x8,
182 HNS_ROCE_V2_WQE_OP_ATOM_MSK_FETCH_AND_ADD = 0x9,
183 HNS_ROCE_V2_WQE_OP_FAST_REG_PMR = 0xa,
184 HNS_ROCE_V2_WQE_OP_BIND_MW = 0xc,
185 HNS_ROCE_V2_WQE_OP_MASK = 0x1f,
186 };
187
188 enum {
189 /* rq operations */
190 HNS_ROCE_V2_OPCODE_RDMA_WRITE_IMM = 0x0,
191 HNS_ROCE_V2_OPCODE_SEND = 0x1,
192 HNS_ROCE_V2_OPCODE_SEND_WITH_IMM = 0x2,
193 HNS_ROCE_V2_OPCODE_SEND_WITH_INV = 0x3,
194 };
195
196 enum {
197 HNS_ROCE_V2_SQ_DB,
198 HNS_ROCE_V2_RQ_DB,
199 HNS_ROCE_V2_SRQ_DB,
200 HNS_ROCE_V2_CQ_DB,
201 HNS_ROCE_V2_CQ_DB_NOTIFY
202 };
203
204 enum {
205 HNS_ROCE_CQE_V2_SUCCESS = 0x00,
206 HNS_ROCE_CQE_V2_LOCAL_LENGTH_ERR = 0x01,
207 HNS_ROCE_CQE_V2_LOCAL_QP_OP_ERR = 0x02,
208 HNS_ROCE_CQE_V2_LOCAL_PROT_ERR = 0x04,
209 HNS_ROCE_CQE_V2_WR_FLUSH_ERR = 0x05,
210 HNS_ROCE_CQE_V2_MW_BIND_ERR = 0x06,
211 HNS_ROCE_CQE_V2_BAD_RESP_ERR = 0x10,
212 HNS_ROCE_CQE_V2_LOCAL_ACCESS_ERR = 0x11,
213 HNS_ROCE_CQE_V2_REMOTE_INVAL_REQ_ERR = 0x12,
214 HNS_ROCE_CQE_V2_REMOTE_ACCESS_ERR = 0x13,
215 HNS_ROCE_CQE_V2_REMOTE_OP_ERR = 0x14,
216 HNS_ROCE_CQE_V2_TRANSPORT_RETRY_EXC_ERR = 0x15,
217 HNS_ROCE_CQE_V2_RNR_RETRY_EXC_ERR = 0x16,
218 HNS_ROCE_CQE_V2_REMOTE_ABORT_ERR = 0x22,
219 HNS_ROCE_CQE_V2_GENERAL_ERR = 0x23,
220
221 HNS_ROCE_V2_CQE_STATUS_MASK = 0xff,
222 };
223
224 /* CMQ command */
225 enum hns_roce_opcode_type {
226 HNS_QUERY_FW_VER = 0x0001,
227 HNS_ROCE_OPC_QUERY_HW_VER = 0x8000,
228 HNS_ROCE_OPC_CFG_GLOBAL_PARAM = 0x8001,
229 HNS_ROCE_OPC_ALLOC_PF_RES = 0x8004,
230 HNS_ROCE_OPC_QUERY_PF_RES = 0x8400,
231 HNS_ROCE_OPC_ALLOC_VF_RES = 0x8401,
232 HNS_ROCE_OPC_CFG_EXT_LLM = 0x8403,
233 HNS_ROCE_OPC_QUERY_PF_TIMER_RES = 0x8406,
234 HNS_ROCE_OPC_QUERY_FUNC_INFO = 0x8407,
235 HNS_ROCE_OPC_QUERY_PF_CAPS_NUM = 0x8408,
236 HNS_ROCE_OPC_CFG_ENTRY_SIZE = 0x8409,
237 HNS_ROCE_OPC_CFG_SGID_TB = 0x8500,
238 HNS_ROCE_OPC_CFG_SMAC_TB = 0x8501,
239 HNS_ROCE_OPC_POST_MB = 0x8504,
240 HNS_ROCE_OPC_QUERY_MB_ST = 0x8505,
241 HNS_ROCE_OPC_CFG_BT_ATTR = 0x8506,
242 HNS_ROCE_OPC_FUNC_CLEAR = 0x8508,
243 HNS_ROCE_OPC_CLR_SCCC = 0x8509,
244 HNS_ROCE_OPC_QUERY_SCCC = 0x850a,
245 HNS_ROCE_OPC_RESET_SCCC = 0x850b,
246 HNS_ROCE_OPC_CLEAR_EXTDB_LIST_INFO = 0x850d,
247 HNS_ROCE_OPC_QUERY_VF_RES = 0x850e,
248 HNS_ROCE_OPC_CFG_GMV_TBL = 0x850f,
249 HNS_ROCE_OPC_CFG_GMV_BT = 0x8510,
250 HNS_ROCE_OPC_EXT_CFG = 0x8512,
251 HNS_ROCE_QUERY_RAM_ECC = 0x8513,
252 HNS_SWITCH_PARAMETER_CFG = 0x1033,
253 };
254
255 enum {
256 TYPE_CRQ,
257 TYPE_CSQ,
258 };
259
260 enum hns_roce_cmd_return_status {
261 CMD_EXEC_SUCCESS,
262 CMD_NO_AUTH,
263 CMD_NOT_EXIST,
264 CMD_CRQ_FULL,
265 CMD_NEXT_ERR,
266 CMD_NOT_EXEC,
267 CMD_PARA_ERR,
268 CMD_RESULT_ERR,
269 CMD_TIMEOUT,
270 CMD_HILINK_ERR,
271 CMD_INFO_ILLEGAL,
272 CMD_INVALID,
273 CMD_ROH_CHECK_FAIL,
274 CMD_OTHER_ERR = 0xff
275 };
276
277 struct hns_roce_cmd_errcode {
278 enum hns_roce_cmd_return_status return_status;
279 int errno;
280 };
281
282 enum hns_roce_sgid_type {
283 GID_TYPE_FLAG_ROCE_V1 = 0,
284 GID_TYPE_FLAG_ROCE_V2_IPV4,
285 GID_TYPE_FLAG_ROCE_V2_IPV6,
286 };
287
288 struct hns_roce_v2_cq_context {
289 __le32 byte_4_pg_ceqn;
290 __le32 byte_8_cqn;
291 __le32 cqe_cur_blk_addr;
292 __le32 byte_16_hop_addr;
293 __le32 cqe_nxt_blk_addr;
294 __le32 byte_24_pgsz_addr;
295 __le32 byte_28_cq_pi;
296 __le32 byte_32_cq_ci;
297 __le32 cqe_ba;
298 __le32 byte_40_cqe_ba;
299 __le32 byte_44_db_record;
300 __le32 db_record_addr;
301 __le32 byte_52_cqe_cnt;
302 __le32 byte_56_cqe_period_maxcnt;
303 __le32 cqe_report_timer;
304 __le32 byte_64_se_cqe_idx;
305 };
306
307 #define HNS_ROCE_V2_CQ_DEFAULT_BURST_NUM 0x0
308 #define HNS_ROCE_V2_CQ_DEFAULT_INTERVAL 0x0
309
310 #define CQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_cq_context, h, l)
311
312 #define CQC_CQ_ST CQC_FIELD_LOC(1, 0)
313 #define CQC_POLL CQC_FIELD_LOC(2, 2)
314 #define CQC_SE CQC_FIELD_LOC(3, 3)
315 #define CQC_OVER_IGNORE CQC_FIELD_LOC(4, 4)
316 #define CQC_ARM_ST CQC_FIELD_LOC(7, 6)
317 #define CQC_SHIFT CQC_FIELD_LOC(12, 8)
318 #define CQC_CMD_SN CQC_FIELD_LOC(14, 13)
319 #define CQC_CEQN CQC_FIELD_LOC(23, 15)
320 #define CQC_CQN CQC_FIELD_LOC(55, 32)
321 #define CQC_POE_EN CQC_FIELD_LOC(56, 56)
322 #define CQC_POE_NUM CQC_FIELD_LOC(58, 57)
323 #define CQC_CQE_SIZE CQC_FIELD_LOC(60, 59)
324 #define CQC_CQ_CNT_MODE CQC_FIELD_LOC(61, 61)
325 #define CQC_STASH CQC_FIELD_LOC(63, 63)
326 #define CQC_CQE_CUR_BLK_ADDR_L CQC_FIELD_LOC(95, 64)
327 #define CQC_CQE_CUR_BLK_ADDR_H CQC_FIELD_LOC(115, 96)
328 #define CQC_POE_QID CQC_FIELD_LOC(125, 116)
329 #define CQC_CQE_HOP_NUM CQC_FIELD_LOC(127, 126)
330 #define CQC_CQE_NEX_BLK_ADDR_L CQC_FIELD_LOC(159, 128)
331 #define CQC_CQE_NEX_BLK_ADDR_H CQC_FIELD_LOC(179, 160)
332 #define CQC_CQE_BAR_PG_SZ CQC_FIELD_LOC(187, 184)
333 #define CQC_CQE_BUF_PG_SZ CQC_FIELD_LOC(191, 188)
334 #define CQC_CQ_PRODUCER_IDX CQC_FIELD_LOC(215, 192)
335 #define CQC_CQ_CONSUMER_IDX CQC_FIELD_LOC(247, 224)
336 #define CQC_CQE_BA_L CQC_FIELD_LOC(287, 256)
337 #define CQC_CQE_BA_H CQC_FIELD_LOC(316, 288)
338 #define CQC_POE_QID_H_0 CQC_FIELD_LOC(319, 317)
339 #define CQC_DB_RECORD_EN CQC_FIELD_LOC(320, 320)
340 #define CQC_CQE_DB_RECORD_ADDR_L CQC_FIELD_LOC(351, 321)
341 #define CQC_CQE_DB_RECORD_ADDR_H CQC_FIELD_LOC(383, 352)
342 #define CQC_CQE_CNT CQC_FIELD_LOC(407, 384)
343 #define CQC_CQ_MAX_CNT CQC_FIELD_LOC(431, 416)
344 #define CQC_CQ_PERIOD CQC_FIELD_LOC(447, 432)
345 #define CQC_CQE_REPORT_TIMER CQC_FIELD_LOC(471, 448)
346 #define CQC_WR_CQE_IDX CQC_FIELD_LOC(479, 472)
347 #define CQC_SE_CQE_IDX CQC_FIELD_LOC(503, 480)
348 #define CQC_POE_QID_H_1 CQC_FIELD_LOC(511, 511)
349
350 struct hns_roce_srq_context {
351 __le32 data[16];
352 };
353
354 #define SRQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_srq_context, h, l)
355
356 #define SRQC_SRQ_ST SRQC_FIELD_LOC(1, 0)
357 #define SRQC_WQE_HOP_NUM SRQC_FIELD_LOC(3, 2)
358 #define SRQC_SHIFT SRQC_FIELD_LOC(7, 4)
359 #define SRQC_SRQN SRQC_FIELD_LOC(31, 8)
360 #define SRQC_LIMIT_WL SRQC_FIELD_LOC(47, 32)
361 #define SRQC_RSV0 SRQC_FIELD_LOC(63, 48)
362 #define SRQC_XRCD SRQC_FIELD_LOC(87, 64)
363 #define SRQC_RSV1 SRQC_FIELD_LOC(95, 88)
364 #define SRQC_PRODUCER_IDX SRQC_FIELD_LOC(111, 96)
365 #define SRQC_CONSUMER_IDX SRQC_FIELD_LOC(127, 112)
366 #define SRQC_WQE_BT_BA_L SRQC_FIELD_LOC(159, 128)
367 #define SRQC_WQE_BT_BA_H SRQC_FIELD_LOC(188, 160)
368 #define SRQC_RSV2 SRQC_FIELD_LOC(190, 189)
369 #define SRQC_SRQ_TYPE SRQC_FIELD_LOC(191, 191)
370 #define SRQC_PD SRQC_FIELD_LOC(215, 192)
371 #define SRQC_RQWS SRQC_FIELD_LOC(219, 216)
372 #define SRQC_RSV3 SRQC_FIELD_LOC(223, 220)
373 #define SRQC_IDX_BT_BA_L SRQC_FIELD_LOC(255, 224)
374 #define SRQC_IDX_BT_BA_H SRQC_FIELD_LOC(284, 256)
375 #define SRQC_RSV4 SRQC_FIELD_LOC(287, 285)
376 #define SRQC_IDX_CUR_BLK_ADDR_L SRQC_FIELD_LOC(319, 288)
377 #define SRQC_IDX_CUR_BLK_ADDR_H SRQC_FIELD_LOC(339, 320)
378 #define SRQC_RSV5 SRQC_FIELD_LOC(341, 340)
379 #define SRQC_IDX_HOP_NUM SRQC_FIELD_LOC(343, 342)
380 #define SRQC_IDX_BA_PG_SZ SRQC_FIELD_LOC(347, 344)
381 #define SRQC_IDX_BUF_PG_SZ SRQC_FIELD_LOC(351, 348)
382 #define SRQC_IDX_NXT_BLK_ADDR_L SRQC_FIELD_LOC(383, 352)
383 #define SRQC_IDX_NXT_BLK_ADDR_H SRQC_FIELD_LOC(403, 384)
384 #define SRQC_RSV6 SRQC_FIELD_LOC(415, 404)
385 #define SRQC_XRC_CQN SRQC_FIELD_LOC(439, 416)
386 #define SRQC_WQE_BA_PG_SZ SRQC_FIELD_LOC(443, 440)
387 #define SRQC_WQE_BUF_PG_SZ SRQC_FIELD_LOC(447, 444)
388 #define SRQC_DB_RECORD_EN SRQC_FIELD_LOC(448, 448)
389 #define SRQC_DB_RECORD_ADDR_L SRQC_FIELD_LOC(479, 449)
390 #define SRQC_DB_RECORD_ADDR_H SRQC_FIELD_LOC(511, 480)
391
392 enum {
393 V2_MPT_ST_VALID = 0x1,
394 V2_MPT_ST_FREE = 0x2,
395 };
396
397 enum hns_roce_v2_qp_state {
398 HNS_ROCE_QP_ST_RST,
399 HNS_ROCE_QP_ST_INIT,
400 HNS_ROCE_QP_ST_RTR,
401 HNS_ROCE_QP_ST_RTS,
402 HNS_ROCE_QP_ST_SQD,
403 HNS_ROCE_QP_ST_SQER,
404 HNS_ROCE_QP_ST_ERR,
405 HNS_ROCE_QP_ST_SQ_DRAINING,
406 HNS_ROCE_QP_NUM_ST
407 };
408
409 struct hns_roce_v2_qp_context_ex {
410 __le32 data[64];
411 };
412
413 struct hns_roce_v2_qp_context {
414 __le32 byte_4_sqpn_tst;
415 __le32 wqe_sge_ba;
416 __le32 byte_12_sq_hop;
417 __le32 byte_16_buf_ba_pg_sz;
418 __le32 byte_20_smac_sgid_idx;
419 __le32 byte_24_mtu_tc;
420 __le32 byte_28_at_fl;
421 u8 dgid[GID_LEN_V2];
422 __le32 dmac;
423 __le32 byte_52_udpspn_dmac;
424 __le32 byte_56_dqpn_err;
425 __le32 byte_60_qpst_tempid;
426 __le32 qkey_xrcd;
427 __le32 byte_68_rq_db;
428 __le32 rq_db_record_addr;
429 __le32 byte_76_srqn_op_en;
430 __le32 byte_80_rnr_rx_cqn;
431 __le32 byte_84_rq_ci_pi;
432 __le32 rq_cur_blk_addr;
433 __le32 byte_92_srq_info;
434 __le32 byte_96_rx_reqmsn;
435 __le32 rq_nxt_blk_addr;
436 __le32 byte_104_rq_sge;
437 __le32 byte_108_rx_reqepsn;
438 __le32 rq_rnr_timer;
439 __le32 rx_msg_len;
440 __le32 rx_rkey_pkt_info;
441 __le64 rx_va;
442 __le32 byte_132_trrl;
443 __le32 trrl_ba;
444 __le32 byte_140_raq;
445 __le32 byte_144_raq;
446 __le32 byte_148_raq;
447 __le32 byte_152_raq;
448 __le32 byte_156_raq;
449 __le32 byte_160_sq_ci_pi;
450 __le32 sq_cur_blk_addr;
451 __le32 byte_168_irrl_idx;
452 __le32 byte_172_sq_psn;
453 __le32 byte_176_msg_pktn;
454 __le32 sq_cur_sge_blk_addr;
455 __le32 byte_184_irrl_idx;
456 __le32 cur_sge_offset;
457 __le32 byte_192_ext_sge;
458 __le32 byte_196_sq_psn;
459 __le32 byte_200_sq_max;
460 __le32 irrl_ba;
461 __le32 byte_208_irrl;
462 __le32 byte_212_lsn;
463 __le32 sq_timer;
464 __le32 byte_220_retry_psn_msn;
465 __le32 byte_224_retry_msg;
466 __le32 rx_sq_cur_blk_addr;
467 __le32 byte_232_irrl_sge;
468 __le32 irrl_cur_sge_offset;
469 __le32 byte_240_irrl_tail;
470 __le32 byte_244_rnr_rxack;
471 __le32 byte_248_ack_psn;
472 __le32 byte_252_err_txcqn;
473 __le32 byte_256_sqflush_rqcqe;
474
475 struct hns_roce_v2_qp_context_ex ext;
476 };
477
478 #define QPC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_qp_context, h, l)
479
480 #define QPC_TST QPC_FIELD_LOC(2, 0)
481 #define QPC_SGE_SHIFT QPC_FIELD_LOC(7, 3)
482 #define QPC_CNP_TIMER QPC_FIELD_LOC(31, 8)
483 #define QPC_WQE_SGE_BA_L QPC_FIELD_LOC(63, 32)
484 #define QPC_WQE_SGE_BA_H QPC_FIELD_LOC(92, 64)
485 #define QPC_SQ_HOP_NUM QPC_FIELD_LOC(94, 93)
486 #define QPC_CIRE_EN QPC_FIELD_LOC(95, 95)
487 #define QPC_WQE_SGE_BA_PG_SZ QPC_FIELD_LOC(99, 96)
488 #define QPC_WQE_SGE_BUF_PG_SZ QPC_FIELD_LOC(103, 100)
489 #define QPC_PD QPC_FIELD_LOC(127, 104)
490 #define QPC_RQ_HOP_NUM QPC_FIELD_LOC(129, 128)
491 #define QPC_SGE_HOP_NUM QPC_FIELD_LOC(131, 130)
492 #define QPC_RQWS QPC_FIELD_LOC(135, 132)
493 #define QPC_SQ_SHIFT QPC_FIELD_LOC(139, 136)
494 #define QPC_RQ_SHIFT QPC_FIELD_LOC(143, 140)
495 #define QPC_GMV_IDX QPC_FIELD_LOC(159, 144)
496 #define QPC_HOPLIMIT QPC_FIELD_LOC(167, 160)
497 #define QPC_TC QPC_FIELD_LOC(175, 168)
498 #define QPC_VLAN_ID QPC_FIELD_LOC(187, 176)
499 #define QPC_MTU QPC_FIELD_LOC(191, 188)
500 #define QPC_FL QPC_FIELD_LOC(211, 192)
501 #define QPC_SL QPC_FIELD_LOC(215, 212)
502 #define QPC_CNP_TX_FLAG QPC_FIELD_LOC(216, 216)
503 #define QPC_CE_FLAG QPC_FIELD_LOC(217, 217)
504 #define QPC_LBI QPC_FIELD_LOC(218, 218)
505 #define QPC_AT QPC_FIELD_LOC(223, 219)
506 #define QPC_DGID QPC_FIELD_LOC(351, 224)
507 #define QPC_DMAC_L QPC_FIELD_LOC(383, 352)
508 #define QPC_DMAC_H QPC_FIELD_LOC(399, 384)
509 #define QPC_UDPSPN QPC_FIELD_LOC(415, 400)
510 #define QPC_DQPN QPC_FIELD_LOC(439, 416)
511 #define QPC_SQ_TX_ERR QPC_FIELD_LOC(440, 440)
512 #define QPC_SQ_RX_ERR QPC_FIELD_LOC(441, 441)
513 #define QPC_RQ_TX_ERR QPC_FIELD_LOC(442, 442)
514 #define QPC_RQ_RX_ERR QPC_FIELD_LOC(443, 443)
515 #define QPC_LP_PKTN_INI QPC_FIELD_LOC(447, 444)
516 #define QPC_CONG_ALGO_TMPL_ID QPC_FIELD_LOC(455, 448)
517 #define QPC_SCC_TOKEN QPC_FIELD_LOC(474, 456)
518 #define QPC_SQ_DB_DOING QPC_FIELD_LOC(475, 475)
519 #define QPC_RQ_DB_DOING QPC_FIELD_LOC(476, 476)
520 #define QPC_QP_ST QPC_FIELD_LOC(479, 477)
521 #define QPC_QKEY_XRCD QPC_FIELD_LOC(511, 480)
522 #define QPC_RQ_RECORD_EN QPC_FIELD_LOC(512, 512)
523 #define QPC_RQ_DB_RECORD_ADDR_L QPC_FIELD_LOC(543, 513)
524 #define QPC_RQ_DB_RECORD_ADDR_H QPC_FIELD_LOC(575, 544)
525 #define QPC_SRQN QPC_FIELD_LOC(599, 576)
526 #define QPC_SRQ_EN QPC_FIELD_LOC(600, 600)
527 #define QPC_RRE QPC_FIELD_LOC(601, 601)
528 #define QPC_RWE QPC_FIELD_LOC(602, 602)
529 #define QPC_ATE QPC_FIELD_LOC(603, 603)
530 #define QPC_RQIE QPC_FIELD_LOC(604, 604)
531 #define QPC_EXT_ATE QPC_FIELD_LOC(605, 605)
532 #define QPC_RQ_VLAN_EN QPC_FIELD_LOC(606, 606)
533 #define QPC_RQ_RTY_TX_ERR QPC_FIELD_LOC(607, 607)
534 #define QPC_RX_CQN QPC_FIELD_LOC(631, 608)
535 #define QPC_XRC_QP_TYPE QPC_FIELD_LOC(632, 632)
536 #define QPC_RSV3 QPC_FIELD_LOC(634, 633)
537 #define QPC_MIN_RNR_TIME QPC_FIELD_LOC(639, 635)
538 #define QPC_RQ_PRODUCER_IDX QPC_FIELD_LOC(655, 640)
539 #define QPC_RQ_CONSUMER_IDX QPC_FIELD_LOC(671, 656)
540 #define QPC_RQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(703, 672)
541 #define QPC_RQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(723, 704)
542 #define QPC_SRQ_INFO QPC_FIELD_LOC(735, 724)
543 #define QPC_RX_REQ_MSN QPC_FIELD_LOC(759, 736)
544 #define QPC_REDUCE_CODE QPC_FIELD_LOC(766, 760)
545 #define QPC_RX_XRC_PKT_CQE_FLG QPC_FIELD_LOC(767, 767)
546 #define QPC_RQ_NXT_BLK_ADDR_L QPC_FIELD_LOC(799, 768)
547 #define QPC_RQ_NXT_BLK_ADDR_H QPC_FIELD_LOC(819, 800)
548 #define QPC_REDUCE_EN QPC_FIELD_LOC(820, 820)
549 #define QPC_FLUSH_EN QPC_FIELD_LOC(821, 821)
550 #define QPC_AW_EN QPC_FIELD_LOC(822, 822)
551 #define QPC_WN_EN QPC_FIELD_LOC(823, 823)
552 #define QPC_RQ_CUR_WQE_SGE_NUM QPC_FIELD_LOC(831, 824)
553 #define QPC_INV_CREDIT QPC_FIELD_LOC(832, 832)
554 #define QPC_LAST_WRITE_TYPE QPC_FIELD_LOC(834, 833)
555 #define QPC_RX_REQ_PSN_ERR QPC_FIELD_LOC(835, 835)
556 #define QPC_RX_REQ_LAST_OPTYPE QPC_FIELD_LOC(838, 836)
557 #define QPC_RX_REQ_RNR QPC_FIELD_LOC(839, 839)
558 #define QPC_RX_REQ_EPSN QPC_FIELD_LOC(863, 840)
559 #define QPC_RQ_RNR_TIMER QPC_FIELD_LOC(895, 864)
560 #define QPC_RX_MSG_LEN QPC_FIELD_LOC(927, 896)
561 #define QPC_RX_RKEY_PKT_INFO QPC_FIELD_LOC(959, 928)
562 #define QPC_RX_VA QPC_FIELD_LOC(1023, 960)
563 #define QPC_TRRL_HEAD_MAX QPC_FIELD_LOC(1031, 1024)
564 #define QPC_TRRL_TAIL_MAX QPC_FIELD_LOC(1039, 1032)
565 #define QPC_TRRL_BA_L QPC_FIELD_LOC(1055, 1040)
566 #define QPC_TRRL_BA_M QPC_FIELD_LOC(1087, 1056)
567 #define QPC_TRRL_BA_H QPC_FIELD_LOC(1099, 1088)
568 #define QPC_RR_MAX QPC_FIELD_LOC(1102, 1100)
569 #define QPC_RQ_RTY_WAIT_DO QPC_FIELD_LOC(1103, 1103)
570 #define QPC_RAQ_TRRL_HEAD QPC_FIELD_LOC(1111, 1104)
571 #define QPC_RAQ_TRRL_TAIL QPC_FIELD_LOC(1119, 1112)
572 #define QPC_RAQ_RTY_INI_PSN QPC_FIELD_LOC(1143, 1120)
573 #define QPC_CIRE_SLV_RQ_EN QPC_FIELD_LOC(1144, 1144)
574 #define QPC_RAQ_CREDIT QPC_FIELD_LOC(1149, 1145)
575 #define QPC_RQ_DB_IN_EXT QPC_FIELD_LOC(1150, 1150)
576 #define QPC_RESP_RTY_FLG QPC_FIELD_LOC(1151, 1151)
577 #define QPC_RAQ_MSN QPC_FIELD_LOC(1175, 1152)
578 #define QPC_RAQ_SYNDROME QPC_FIELD_LOC(1183, 1176)
579 #define QPC_RAQ_PSN QPC_FIELD_LOC(1207, 1184)
580 #define QPC_RAQ_TRRL_RTY_HEAD QPC_FIELD_LOC(1215, 1208)
581 #define QPC_RAQ_USE_PKTN QPC_FIELD_LOC(1239, 1216)
582 #define QPC_RQ_SCC_TOKEN QPC_FIELD_LOC(1245, 1240)
583 #define QPC_RVD10 QPC_FIELD_LOC(1247, 1246)
584 #define QPC_SQ_PRODUCER_IDX QPC_FIELD_LOC(1263, 1248)
585 #define QPC_SQ_CONSUMER_IDX QPC_FIELD_LOC(1279, 1264)
586 #define QPC_SQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(1311, 1280)
587 #define QPC_SQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(1331, 1312)
588 #define QPC_MSG_RTY_LP_FLG QPC_FIELD_LOC(1332, 1332)
589 #define QPC_SQ_INVLD_FLG QPC_FIELD_LOC(1333, 1333)
590 #define QPC_LP_SGEN_INI QPC_FIELD_LOC(1335, 1334)
591 #define QPC_SQ_VLAN_EN QPC_FIELD_LOC(1336, 1336)
592 #define QPC_POLL_DB_WAIT_DO QPC_FIELD_LOC(1337, 1337)
593 #define QPC_SCC_TOKEN_FORBID_SQ_DEQ QPC_FIELD_LOC(1338, 1338)
594 #define QPC_WAIT_ACK_TIMEOUT QPC_FIELD_LOC(1339, 1339)
595 #define QPC_IRRL_IDX_LSB QPC_FIELD_LOC(1343, 1340)
596 #define QPC_ACK_REQ_FREQ QPC_FIELD_LOC(1349, 1344)
597 #define QPC_MSG_RNR_FLG QPC_FIELD_LOC(1350, 1350)
598 #define QPC_FRE QPC_FIELD_LOC(1351, 1351)
599 #define QPC_SQ_CUR_PSN QPC_FIELD_LOC(1375, 1352)
600 #define QPC_MSG_USE_PKTN QPC_FIELD_LOC(1399, 1376)
601 #define QPC_IRRL_HEAD_PRE QPC_FIELD_LOC(1407, 1400)
602 #define QPC_SQ_CUR_SGE_BLK_ADDR_L QPC_FIELD_LOC(1439, 1408)
603 #define QPC_SQ_CUR_SGE_BLK_ADDR_H QPC_FIELD_LOC(1459, 1440)
604 #define QPC_IRRL_IDX_MSB QPC_FIELD_LOC(1471, 1460)
605 #define QPC_CUR_SGE_OFFSET QPC_FIELD_LOC(1503, 1472)
606 #define QPC_CUR_SGE_IDX QPC_FIELD_LOC(1527, 1504)
607 #define QPC_EXT_SGE_NUM_LEFT QPC_FIELD_LOC(1535, 1528)
608 #define QPC_OWNER_MODE QPC_FIELD_LOC(1536, 1536)
609 #define QPC_CIRE_SLV_SQ_EN QPC_FIELD_LOC(1537, 1537)
610 #define QPC_CIRE_DOING QPC_FIELD_LOC(1538, 1538)
611 #define QPC_CIRE_RESULT QPC_FIELD_LOC(1539, 1539)
612 #define QPC_OWNER_DB_WAIT_DO QPC_FIELD_LOC(1540, 1540)
613 #define QPC_SQ_WQE_INVLD QPC_FIELD_LOC(1541, 1541)
614 #define QPC_DCA_MODE QPC_FIELD_LOC(1542, 1542)
615 #define QPC_RTY_OWNER_NOCHK QPC_FIELD_LOC(1543, 1543)
616 #define QPC_V2_IRRL_HEAD QPC_FIELD_LOC(1543, 1536)
617 #define QPC_SQ_MAX_PSN QPC_FIELD_LOC(1567, 1544)
618 #define QPC_SQ_MAX_IDX QPC_FIELD_LOC(1583, 1568)
619 #define QPC_LCL_OPERATED_CNT QPC_FIELD_LOC(1599, 1584)
620 #define QPC_IRRL_BA_L QPC_FIELD_LOC(1631, 1600)
621 #define QPC_IRRL_BA_H QPC_FIELD_LOC(1657, 1632)
622 #define QPC_PKT_RNR_FLG QPC_FIELD_LOC(1658, 1658)
623 #define QPC_PKT_RTY_FLG QPC_FIELD_LOC(1659, 1659)
624 #define QPC_RMT_E2E QPC_FIELD_LOC(1660, 1660)
625 #define QPC_SR_MAX QPC_FIELD_LOC(1663, 1661)
626 #define QPC_LSN QPC_FIELD_LOC(1687, 1664)
627 #define QPC_RETRY_NUM_INIT QPC_FIELD_LOC(1690, 1688)
628 #define QPC_CHECK_FLG QPC_FIELD_LOC(1692, 1691)
629 #define QPC_RETRY_CNT QPC_FIELD_LOC(1695, 1693)
630 #define QPC_SQ_TIMER QPC_FIELD_LOC(1727, 1696)
631 #define QPC_RETRY_MSG_MSN QPC_FIELD_LOC(1743, 1728)
632 #define QPC_RETRY_MSG_PSN_L QPC_FIELD_LOC(1759, 1744)
633 #define QPC_RETRY_MSG_PSN_H QPC_FIELD_LOC(1767, 1760)
634 #define QPC_RETRY_MSG_FPKT_PSN QPC_FIELD_LOC(1791, 1768)
635 #define QPC_RX_SQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(1823, 1792)
636 #define QPC_RX_SQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(1843, 1824)
637 #define QPC_IRRL_SGE_IDX QPC_FIELD_LOC(1851, 1844)
638 #define QPC_LSAN_EN QPC_FIELD_LOC(1852, 1852)
639 #define QPC_SO_LP_VLD QPC_FIELD_LOC(1853, 1853)
640 #define QPC_FENCE_LP_VLD QPC_FIELD_LOC(1854, 1854)
641 #define QPC_IRRL_LP_VLD QPC_FIELD_LOC(1855, 1855)
642 #define QPC_IRRL_CUR_SGE_OFFSET QPC_FIELD_LOC(1887, 1856)
643 #define QPC_IRRL_TAIL_REAL QPC_FIELD_LOC(1895, 1888)
644 #define QPC_IRRL_TAIL_RD QPC_FIELD_LOC(1903, 1896)
645 #define QPC_RX_ACK_MSN QPC_FIELD_LOC(1919, 1904)
646 #define QPC_RX_ACK_EPSN QPC_FIELD_LOC(1943, 1920)
647 #define QPC_RNR_NUM_INIT QPC_FIELD_LOC(1946, 1944)
648 #define QPC_RNR_CNT QPC_FIELD_LOC(1949, 1947)
649 #define QPC_LCL_OP_FLG QPC_FIELD_LOC(1950, 1950)
650 #define QPC_IRRL_RD_FLG QPC_FIELD_LOC(1951, 1951)
651 #define QPC_IRRL_PSN QPC_FIELD_LOC(1975, 1952)
652 #define QPC_ACK_PSN_ERR QPC_FIELD_LOC(1976, 1976)
653 #define QPC_ACK_LAST_OPTYPE QPC_FIELD_LOC(1978, 1977)
654 #define QPC_IRRL_PSN_VLD QPC_FIELD_LOC(1979, 1979)
655 #define QPC_RNR_RETRY_FLAG QPC_FIELD_LOC(1980, 1980)
656 #define QPC_SQ_RTY_TX_ERR QPC_FIELD_LOC(1981, 1981)
657 #define QPC_LAST_IND QPC_FIELD_LOC(1982, 1982)
658 #define QPC_CQ_ERR_IND QPC_FIELD_LOC(1983, 1983)
659 #define QPC_TX_CQN QPC_FIELD_LOC(2007, 1984)
660 #define QPC_SIG_TYPE QPC_FIELD_LOC(2008, 2008)
661 #define QPC_ERR_TYPE QPC_FIELD_LOC(2015, 2009)
662 #define QPC_RQ_CQE_IDX QPC_FIELD_LOC(2031, 2016)
663 #define QPC_SQ_FLUSH_IDX QPC_FIELD_LOC(2047, 2032)
664
665 #define RETRY_MSG_PSN_SHIFT 16
666
667 #define QPCEX_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_qp_context_ex, h, l)
668
669 #define QPCEX_CONG_ALG_SEL QPCEX_FIELD_LOC(0, 0)
670 #define QPCEX_CONG_ALG_SUB_SEL QPCEX_FIELD_LOC(1, 1)
671 #define QPCEX_DIP_CTX_IDX_VLD QPCEX_FIELD_LOC(2, 2)
672 #define QPCEX_DIP_CTX_IDX QPCEX_FIELD_LOC(22, 3)
673 #define QPCEX_SQ_RQ_NOT_FORBID_EN QPCEX_FIELD_LOC(23, 23)
674 #define QPCEX_STASH QPCEX_FIELD_LOC(82, 82)
675
676 #define V2_QP_RWE_S 1 /* rdma write enable */
677 #define V2_QP_RRE_S 2 /* rdma read enable */
678 #define V2_QP_ATE_S 3 /* rdma atomic enable */
679
680 struct hns_roce_v2_cqe {
681 __le32 byte_4;
682 union {
683 __le32 rkey;
684 __le32 immtdata;
685 };
686 __le32 byte_12;
687 __le32 byte_16;
688 __le32 byte_cnt;
689 u8 smac[4];
690 __le32 byte_28;
691 __le32 byte_32;
692 __le32 rsv[8];
693 };
694
695 #define CQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_cqe, h, l)
696
697 #define CQE_OPCODE CQE_FIELD_LOC(4, 0)
698 #define CQE_RQ_INLINE CQE_FIELD_LOC(5, 5)
699 #define CQE_S_R CQE_FIELD_LOC(6, 6)
700 #define CQE_OWNER CQE_FIELD_LOC(7, 7)
701 #define CQE_STATUS CQE_FIELD_LOC(15, 8)
702 #define CQE_WQE_IDX CQE_FIELD_LOC(31, 16)
703 #define CQE_RKEY_IMMTDATA CQE_FIELD_LOC(63, 32)
704 #define CQE_XRC_SRQN CQE_FIELD_LOC(87, 64)
705 #define CQE_RSV0 CQE_FIELD_LOC(95, 88)
706 #define CQE_LCL_QPN CQE_FIELD_LOC(119, 96)
707 #define CQE_SUB_STATUS CQE_FIELD_LOC(127, 120)
708 #define CQE_BYTE_CNT CQE_FIELD_LOC(159, 128)
709 #define CQE_SMAC CQE_FIELD_LOC(207, 160)
710 #define CQE_PORT_TYPE CQE_FIELD_LOC(209, 208)
711 #define CQE_VID CQE_FIELD_LOC(221, 210)
712 #define CQE_VID_VLD CQE_FIELD_LOC(222, 222)
713 #define CQE_RSV2 CQE_FIELD_LOC(223, 223)
714 #define CQE_RMT_QPN CQE_FIELD_LOC(247, 224)
715 #define CQE_SL CQE_FIELD_LOC(250, 248)
716 #define CQE_PORTN CQE_FIELD_LOC(253, 251)
717 #define CQE_GRH CQE_FIELD_LOC(254, 254)
718 #define CQE_LPK CQE_FIELD_LOC(255, 255)
719 #define CQE_RSV3 CQE_FIELD_LOC(511, 256)
720
721 struct hns_roce_v2_mpt_entry {
722 __le32 byte_4_pd_hop_st;
723 __le32 byte_8_mw_cnt_en;
724 __le32 byte_12_mw_pa;
725 __le32 bound_lkey;
726 __le32 len_l;
727 __le32 len_h;
728 __le32 lkey;
729 __le32 va_l;
730 __le32 va_h;
731 __le32 pbl_size;
732 __le32 pbl_ba_l;
733 __le32 byte_48_mode_ba;
734 __le32 pa0_l;
735 __le32 byte_56_pa0_h;
736 __le32 pa1_l;
737 __le32 byte_64_buf_pa1;
738 };
739
740 #define MPT_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_mpt_entry, h, l)
741
742 #define MPT_ST MPT_FIELD_LOC(1, 0)
743 #define MPT_PBL_HOP_NUM MPT_FIELD_LOC(3, 2)
744 #define MPT_PBL_BA_PG_SZ MPT_FIELD_LOC(7, 4)
745 #define MPT_PD MPT_FIELD_LOC(31, 8)
746 #define MPT_RA_EN MPT_FIELD_LOC(32, 32)
747 #define MPT_R_INV_EN MPT_FIELD_LOC(33, 33)
748 #define MPT_L_INV_EN MPT_FIELD_LOC(34, 34)
749 #define MPT_BIND_EN MPT_FIELD_LOC(35, 35)
750 #define MPT_ATOMIC_EN MPT_FIELD_LOC(36, 36)
751 #define MPT_RR_EN MPT_FIELD_LOC(37, 37)
752 #define MPT_RW_EN MPT_FIELD_LOC(38, 38)
753 #define MPT_LW_EN MPT_FIELD_LOC(39, 39)
754 #define MPT_MW_CNT MPT_FIELD_LOC(63, 40)
755 #define MPT_FRE MPT_FIELD_LOC(64, 64)
756 #define MPT_PA MPT_FIELD_LOC(65, 65)
757 #define MPT_ZBVA MPT_FIELD_LOC(66, 66)
758 #define MPT_SHARE MPT_FIELD_LOC(67, 67)
759 #define MPT_MR_MW MPT_FIELD_LOC(68, 68)
760 #define MPT_BPD MPT_FIELD_LOC(69, 69)
761 #define MPT_BQP MPT_FIELD_LOC(70, 70)
762 #define MPT_INNER_PA_VLD MPT_FIELD_LOC(71, 71)
763 #define MPT_MW_BIND_QPN MPT_FIELD_LOC(95, 72)
764 #define MPT_BOUND_LKEY MPT_FIELD_LOC(127, 96)
765 #define MPT_LEN_L MPT_FIELD_LOC(159, 128)
766 #define MPT_LEN_H MPT_FIELD_LOC(191, 160)
767 #define MPT_LKEY MPT_FIELD_LOC(223, 192)
768 #define MPT_VA MPT_FIELD_LOC(287, 224)
769 #define MPT_PBL_SIZE MPT_FIELD_LOC(319, 288)
770 #define MPT_PBL_BA_L MPT_FIELD_LOC(351, 320)
771 #define MPT_PBL_BA_H MPT_FIELD_LOC(380, 352)
772 #define MPT_BLK_MODE MPT_FIELD_LOC(381, 381)
773 #define MPT_RSV0 MPT_FIELD_LOC(383, 382)
774 #define MPT_PA0_L MPT_FIELD_LOC(415, 384)
775 #define MPT_PA0_H MPT_FIELD_LOC(441, 416)
776 #define MPT_BOUND_VA MPT_FIELD_LOC(447, 442)
777 #define MPT_PA1_L MPT_FIELD_LOC(479, 448)
778 #define MPT_PA1_H MPT_FIELD_LOC(505, 480)
779 #define MPT_PERSIST_EN MPT_FIELD_LOC(506, 506)
780 #define MPT_RSV2 MPT_FIELD_LOC(507, 507)
781 #define MPT_PBL_BUF_PG_SZ MPT_FIELD_LOC(511, 508)
782
783 #define V2_MPT_BYTE_4_MPT_ST_S 0
784 #define V2_MPT_BYTE_4_MPT_ST_M GENMASK(1, 0)
785
786 #define V2_MPT_BYTE_4_PBL_HOP_NUM_S 2
787 #define V2_MPT_BYTE_4_PBL_HOP_NUM_M GENMASK(3, 2)
788
789 #define V2_MPT_BYTE_4_PBL_BA_PG_SZ_S 4
790 #define V2_MPT_BYTE_4_PBL_BA_PG_SZ_M GENMASK(7, 4)
791
792 #define V2_MPT_BYTE_4_PD_S 8
793 #define V2_MPT_BYTE_4_PD_M GENMASK(31, 8)
794
795 #define V2_MPT_BYTE_8_RA_EN_S 0
796
797 #define V2_MPT_BYTE_8_R_INV_EN_S 1
798
799 #define V2_MPT_BYTE_8_L_INV_EN_S 2
800
801 #define V2_MPT_BYTE_8_BIND_EN_S 3
802
803 #define V2_MPT_BYTE_8_ATOMIC_EN_S 4
804
805 #define V2_MPT_BYTE_8_RR_EN_S 5
806
807 #define V2_MPT_BYTE_8_RW_EN_S 6
808
809 #define V2_MPT_BYTE_8_LW_EN_S 7
810
811 #define V2_MPT_BYTE_8_MW_CNT_S 8
812 #define V2_MPT_BYTE_8_MW_CNT_M GENMASK(31, 8)
813
814 #define V2_MPT_BYTE_12_FRE_S 0
815
816 #define V2_MPT_BYTE_12_PA_S 1
817
818 #define V2_MPT_BYTE_12_MR_MW_S 4
819
820 #define V2_MPT_BYTE_12_BPD_S 5
821
822 #define V2_MPT_BYTE_12_BQP_S 6
823
824 #define V2_MPT_BYTE_12_INNER_PA_VLD_S 7
825
826 #define V2_MPT_BYTE_12_MW_BIND_QPN_S 8
827 #define V2_MPT_BYTE_12_MW_BIND_QPN_M GENMASK(31, 8)
828
829 #define V2_MPT_BYTE_48_PBL_BA_H_S 0
830 #define V2_MPT_BYTE_48_PBL_BA_H_M GENMASK(28, 0)
831
832 #define V2_MPT_BYTE_48_BLK_MODE_S 29
833
834 #define V2_MPT_BYTE_56_PA0_H_S 0
835 #define V2_MPT_BYTE_56_PA0_H_M GENMASK(25, 0)
836
837 #define V2_MPT_BYTE_64_PA1_H_S 0
838 #define V2_MPT_BYTE_64_PA1_H_M GENMASK(25, 0)
839
840 #define V2_MPT_BYTE_64_PBL_BUF_PG_SZ_S 28
841 #define V2_MPT_BYTE_64_PBL_BUF_PG_SZ_M GENMASK(31, 28)
842
843 struct hns_roce_v2_db {
844 __le32 data[2];
845 };
846
847 #define DB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_db, h, l)
848
849 #define DB_TAG DB_FIELD_LOC(23, 0)
850 #define DB_CMD DB_FIELD_LOC(27, 24)
851 #define DB_FLAG DB_FIELD_LOC(31, 31)
852 #define DB_PI DB_FIELD_LOC(47, 32)
853 #define DB_SL DB_FIELD_LOC(50, 48)
854 #define DB_CQ_CI DB_FIELD_LOC(55, 32)
855 #define DB_CQ_NOTIFY DB_FIELD_LOC(56, 56)
856 #define DB_CQ_CMD_SN DB_FIELD_LOC(58, 57)
857 #define EQ_DB_TAG DB_FIELD_LOC(7, 0)
858 #define EQ_DB_CMD DB_FIELD_LOC(17, 16)
859 #define EQ_DB_CI DB_FIELD_LOC(55, 32)
860
861 #define V2_DB_PRODUCER_IDX_S 0
862 #define V2_DB_PRODUCER_IDX_M GENMASK(15, 0)
863
864 #define V2_CQ_DB_CONS_IDX_S 0
865 #define V2_CQ_DB_CONS_IDX_M GENMASK(23, 0)
866
867 struct hns_roce_v2_ud_send_wqe {
868 __le32 byte_4;
869 __le32 msg_len;
870 __le32 immtdata;
871 __le32 byte_16;
872 __le32 byte_20;
873 __le32 byte_24;
874 __le32 qkey;
875 __le32 byte_32;
876 __le32 byte_36;
877 __le32 byte_40;
878 u8 dmac[ETH_ALEN];
879 u8 sgid_index;
880 u8 smac_index;
881 u8 dgid[GID_LEN_V2];
882 };
883
884 #define UD_SEND_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_ud_send_wqe, h, l)
885
886 #define UD_SEND_WQE_OPCODE UD_SEND_WQE_FIELD_LOC(4, 0)
887 #define UD_SEND_WQE_OWNER UD_SEND_WQE_FIELD_LOC(7, 7)
888 #define UD_SEND_WQE_CQE UD_SEND_WQE_FIELD_LOC(8, 8)
889 #define UD_SEND_WQE_SE UD_SEND_WQE_FIELD_LOC(11, 11)
890 #define UD_SEND_WQE_PD UD_SEND_WQE_FIELD_LOC(119, 96)
891 #define UD_SEND_WQE_SGE_NUM UD_SEND_WQE_FIELD_LOC(127, 120)
892 #define UD_SEND_WQE_MSG_START_SGE_IDX UD_SEND_WQE_FIELD_LOC(151, 128)
893 #define UD_SEND_WQE_UDPSPN UD_SEND_WQE_FIELD_LOC(191, 176)
894 #define UD_SEND_WQE_DQPN UD_SEND_WQE_FIELD_LOC(247, 224)
895 #define UD_SEND_WQE_VLAN UD_SEND_WQE_FIELD_LOC(271, 256)
896 #define UD_SEND_WQE_HOPLIMIT UD_SEND_WQE_FIELD_LOC(279, 272)
897 #define UD_SEND_WQE_TCLASS UD_SEND_WQE_FIELD_LOC(287, 280)
898 #define UD_SEND_WQE_FLOW_LABEL UD_SEND_WQE_FIELD_LOC(307, 288)
899 #define UD_SEND_WQE_SL UD_SEND_WQE_FIELD_LOC(311, 308)
900 #define UD_SEND_WQE_VLAN_EN UD_SEND_WQE_FIELD_LOC(318, 318)
901 #define UD_SEND_WQE_LBI UD_SEND_WQE_FIELD_LOC(319, 319)
902
903 struct hns_roce_v2_rc_send_wqe {
904 __le32 byte_4;
905 __le32 msg_len;
906 union {
907 __le32 inv_key;
908 __le32 immtdata;
909 };
910 __le32 byte_16;
911 __le32 byte_20;
912 __le32 rkey;
913 __le64 va;
914 };
915
916 #define RC_SEND_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_rc_send_wqe, h, l)
917
918 #define RC_SEND_WQE_OPCODE RC_SEND_WQE_FIELD_LOC(4, 0)
919 #define RC_SEND_WQE_DB_SL_L RC_SEND_WQE_FIELD_LOC(6, 5)
920 #define RC_SEND_WQE_DB_SL_H RC_SEND_WQE_FIELD_LOC(14, 13)
921 #define RC_SEND_WQE_OWNER RC_SEND_WQE_FIELD_LOC(7, 7)
922 #define RC_SEND_WQE_CQE RC_SEND_WQE_FIELD_LOC(8, 8)
923 #define RC_SEND_WQE_FENCE RC_SEND_WQE_FIELD_LOC(9, 9)
924 #define RC_SEND_WQE_SE RC_SEND_WQE_FIELD_LOC(11, 11)
925 #define RC_SEND_WQE_INLINE RC_SEND_WQE_FIELD_LOC(12, 12)
926 #define RC_SEND_WQE_WQE_INDEX RC_SEND_WQE_FIELD_LOC(30, 15)
927 #define RC_SEND_WQE_FLAG RC_SEND_WQE_FIELD_LOC(31, 31)
928 #define RC_SEND_WQE_XRC_SRQN RC_SEND_WQE_FIELD_LOC(119, 96)
929 #define RC_SEND_WQE_SGE_NUM RC_SEND_WQE_FIELD_LOC(127, 120)
930 #define RC_SEND_WQE_MSG_START_SGE_IDX RC_SEND_WQE_FIELD_LOC(151, 128)
931 #define RC_SEND_WQE_INL_TYPE RC_SEND_WQE_FIELD_LOC(159, 159)
932
933 struct hns_roce_wqe_frmr_seg {
934 __le32 pbl_size;
935 __le32 byte_40;
936 };
937
938 #define FRMR_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_wqe_frmr_seg, h, l)
939
940 #define FRMR_PBL_SIZE FRMR_WQE_FIELD_LOC(31, 0)
941 #define FRMR_BLOCK_SIZE FRMR_WQE_FIELD_LOC(35, 32)
942 #define FRMR_PBL_BUF_PG_SZ FRMR_WQE_FIELD_LOC(39, 36)
943 #define FRMR_BLK_MODE FRMR_WQE_FIELD_LOC(40, 40)
944 #define FRMR_ZBVA FRMR_WQE_FIELD_LOC(41, 41)
945 #define FRMR_BIND_EN FRMR_WQE_FIELD_LOC(42, 42)
946 #define FRMR_ATOMIC FRMR_WQE_FIELD_LOC(43, 43)
947 #define FRMR_RR FRMR_WQE_FIELD_LOC(44, 44)
948 #define FRMR_RW FRMR_WQE_FIELD_LOC(45, 45)
949 #define FRMR_LW FRMR_WQE_FIELD_LOC(46, 46)
950
951 struct hns_roce_v2_wqe_data_seg {
952 __le32 len;
953 __le32 lkey;
954 __le64 addr;
955 };
956
957 struct hns_roce_query_version {
958 __le16 rocee_vendor_id;
959 __le16 rocee_hw_version;
960 __le32 rsv[5];
961 };
962
963 struct hns_roce_query_fw_info {
964 __le32 fw_ver;
965 __le32 rsv[5];
966 };
967
968 struct hns_roce_func_clear {
969 __le32 rst_funcid_en;
970 __le32 func_done;
971 __le32 rsv[4];
972 };
973
974 #define FUNC_CLEAR_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_func_clear, h, l)
975
976 #define FUNC_CLEAR_RST_FUN_DONE FUNC_CLEAR_FIELD_LOC(32, 32)
977
978 /* Each physical function manages up to 248 virtual functions, it takes up to
979 * 100ms for each function to execute clear. If an abnormal reset occurs, it is
980 * executed twice at most, so it takes up to 249 * 2 * 100ms.
981 */
982 #define HNS_ROCE_V2_FUNC_CLEAR_TIMEOUT_MSECS (249 * 2 * 100)
983 #define HNS_ROCE_V2_READ_FUNC_CLEAR_FLAG_INTERVAL 40
984 #define HNS_ROCE_V2_READ_FUNC_CLEAR_FLAG_FAIL_WAIT 20
985
986 /* Fields of HNS_ROCE_OPC_EXT_CFG */
987 #define EXT_CFG_VF_ID CMQ_REQ_FIELD_LOC(31, 0)
988 #define EXT_CFG_QP_PI_IDX CMQ_REQ_FIELD_LOC(45, 32)
989 #define EXT_CFG_QP_PI_NUM CMQ_REQ_FIELD_LOC(63, 48)
990 #define EXT_CFG_QP_NUM CMQ_REQ_FIELD_LOC(87, 64)
991 #define EXT_CFG_QP_IDX CMQ_REQ_FIELD_LOC(119, 96)
992 #define EXT_CFG_LLM_IDX CMQ_REQ_FIELD_LOC(139, 128)
993 #define EXT_CFG_LLM_NUM CMQ_REQ_FIELD_LOC(156, 144)
994
995 #define CFG_LLM_A_BA_L CMQ_REQ_FIELD_LOC(31, 0)
996 #define CFG_LLM_A_BA_H CMQ_REQ_FIELD_LOC(63, 32)
997 #define CFG_LLM_A_DEPTH CMQ_REQ_FIELD_LOC(76, 64)
998 #define CFG_LLM_A_PGSZ CMQ_REQ_FIELD_LOC(83, 80)
999 #define CFG_LLM_A_INIT_EN CMQ_REQ_FIELD_LOC(84, 84)
1000 #define CFG_LLM_A_HEAD_BA_L CMQ_REQ_FIELD_LOC(127, 96)
1001 #define CFG_LLM_A_HEAD_BA_H CMQ_REQ_FIELD_LOC(147, 128)
1002 #define CFG_LLM_A_HEAD_NXTPTR CMQ_REQ_FIELD_LOC(159, 148)
1003 #define CFG_LLM_A_HEAD_PTR CMQ_REQ_FIELD_LOC(171, 160)
1004 #define CFG_LLM_B_TAIL_BA_L CMQ_REQ_FIELD_LOC(31, 0)
1005 #define CFG_LLM_B_TAIL_BA_H CMQ_REQ_FIELD_LOC(63, 32)
1006 #define CFG_LLM_B_TAIL_PTR CMQ_REQ_FIELD_LOC(75, 64)
1007
1008 /* Fields of HNS_ROCE_OPC_CFG_GLOBAL_PARAM */
1009 #define CFG_GLOBAL_PARAM_1US_CYCLES CMQ_REQ_FIELD_LOC(9, 0)
1010 #define CFG_GLOBAL_PARAM_UDP_PORT CMQ_REQ_FIELD_LOC(31, 16)
1011
1012 /*
1013 * Fields of HNS_ROCE_OPC_QUERY_PF_RES, HNS_ROCE_OPC_QUERY_VF_RES
1014 * and HNS_ROCE_OPC_ALLOC_VF_RES
1015 */
1016 #define FUNC_RES_A_VF_ID CMQ_REQ_FIELD_LOC(7, 0)
1017 #define FUNC_RES_A_QPC_BT_IDX CMQ_REQ_FIELD_LOC(42, 32)
1018 #define FUNC_RES_A_QPC_BT_NUM CMQ_REQ_FIELD_LOC(59, 48)
1019 #define FUNC_RES_A_SRQC_BT_IDX CMQ_REQ_FIELD_LOC(72, 64)
1020 #define FUNC_RES_A_SRQC_BT_NUM CMQ_REQ_FIELD_LOC(89, 80)
1021 #define FUNC_RES_A_CQC_BT_IDX CMQ_REQ_FIELD_LOC(104, 96)
1022 #define FUNC_RES_A_CQC_BT_NUM CMQ_REQ_FIELD_LOC(121, 112)
1023 #define FUNC_RES_A_MPT_BT_IDX CMQ_REQ_FIELD_LOC(136, 128)
1024 #define FUNC_RES_A_MPT_BT_NUM CMQ_REQ_FIELD_LOC(153, 144)
1025 #define FUNC_RES_A_EQC_BT_IDX CMQ_REQ_FIELD_LOC(168, 160)
1026 #define FUNC_RES_A_EQC_BT_NUM CMQ_REQ_FIELD_LOC(185, 176)
1027 #define FUNC_RES_B_SMAC_IDX CMQ_REQ_FIELD_LOC(39, 32)
1028 #define FUNC_RES_B_SMAC_NUM CMQ_REQ_FIELD_LOC(48, 40)
1029 #define FUNC_RES_B_SGID_IDX CMQ_REQ_FIELD_LOC(71, 64)
1030 #define FUNC_RES_B_SGID_NUM CMQ_REQ_FIELD_LOC(80, 72)
1031 #define FUNC_RES_B_QID_IDX CMQ_REQ_FIELD_LOC(105, 96)
1032 #define FUNC_RES_B_QID_NUM CMQ_REQ_FIELD_LOC(122, 112)
1033 #define FUNC_RES_V_QID_NUM CMQ_REQ_FIELD_LOC(115, 112)
1034
1035 #define FUNC_RES_B_SCCC_BT_IDX CMQ_REQ_FIELD_LOC(136, 128)
1036 #define FUNC_RES_B_SCCC_BT_NUM CMQ_REQ_FIELD_LOC(145, 137)
1037 #define FUNC_RES_B_GMV_BT_IDX CMQ_REQ_FIELD_LOC(167, 160)
1038 #define FUNC_RES_B_GMV_BT_NUM CMQ_REQ_FIELD_LOC(176, 168)
1039 #define FUNC_RES_V_GMV_BT_NUM CMQ_REQ_FIELD_LOC(184, 176)
1040
1041 /* Fields of HNS_ROCE_OPC_QUERY_PF_TIMER_RES */
1042 #define PF_TIMER_RES_QPC_ITEM_IDX CMQ_REQ_FIELD_LOC(43, 32)
1043 #define PF_TIMER_RES_QPC_ITEM_NUM CMQ_REQ_FIELD_LOC(60, 48)
1044 #define PF_TIMER_RES_CQC_ITEM_IDX CMQ_REQ_FIELD_LOC(74, 64)
1045 #define PF_TIMER_RES_CQC_ITEM_NUM CMQ_REQ_FIELD_LOC(91, 80)
1046
1047 struct hns_roce_vf_switch {
1048 __le32 rocee_sel;
1049 __le32 fun_id;
1050 __le32 cfg;
1051 __le32 resv1;
1052 __le32 resv2;
1053 __le32 resv3;
1054 };
1055
1056 #define VF_SWITCH_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_vf_switch, h, l)
1057
1058 #define VF_SWITCH_VF_ID VF_SWITCH_FIELD_LOC(42, 35)
1059 #define VF_SWITCH_ALW_LPBK VF_SWITCH_FIELD_LOC(65, 65)
1060 #define VF_SWITCH_ALW_LCL_LPBK VF_SWITCH_FIELD_LOC(66, 66)
1061 #define VF_SWITCH_ALW_DST_OVRD VF_SWITCH_FIELD_LOC(67, 67)
1062
1063 struct hns_roce_post_mbox {
1064 __le32 in_param_l;
1065 __le32 in_param_h;
1066 __le32 out_param_l;
1067 __le32 out_param_h;
1068 __le32 cmd_tag;
1069 __le32 token_event_en;
1070 };
1071
1072 struct hns_roce_mbox_status {
1073 __le32 mb_status_hw_run;
1074 __le32 rsv[5];
1075 };
1076
1077 #define HNS_ROCE_V2_GO_BIT_TIMEOUT_MSECS 10000
1078
1079 #define MB_ST_HW_RUN_M BIT(31)
1080 #define MB_ST_COMPLETE_M GENMASK(7, 0)
1081
1082 #define MB_ST_COMPLETE_SUCC 1
1083
1084 /* Fields of HNS_ROCE_OPC_CFG_BT_ATTR */
1085 #define CFG_BT_ATTR_QPC_BA_PGSZ CMQ_REQ_FIELD_LOC(3, 0)
1086 #define CFG_BT_ATTR_QPC_BUF_PGSZ CMQ_REQ_FIELD_LOC(7, 4)
1087 #define CFG_BT_ATTR_QPC_HOPNUM CMQ_REQ_FIELD_LOC(9, 8)
1088 #define CFG_BT_ATTR_SRQC_BA_PGSZ CMQ_REQ_FIELD_LOC(35, 32)
1089 #define CFG_BT_ATTR_SRQC_BUF_PGSZ CMQ_REQ_FIELD_LOC(39, 36)
1090 #define CFG_BT_ATTR_SRQC_HOPNUM CMQ_REQ_FIELD_LOC(41, 40)
1091 #define CFG_BT_ATTR_CQC_BA_PGSZ CMQ_REQ_FIELD_LOC(67, 64)
1092 #define CFG_BT_ATTR_CQC_BUF_PGSZ CMQ_REQ_FIELD_LOC(71, 68)
1093 #define CFG_BT_ATTR_CQC_HOPNUM CMQ_REQ_FIELD_LOC(73, 72)
1094 #define CFG_BT_ATTR_MPT_BA_PGSZ CMQ_REQ_FIELD_LOC(99, 96)
1095 #define CFG_BT_ATTR_MPT_BUF_PGSZ CMQ_REQ_FIELD_LOC(103, 100)
1096 #define CFG_BT_ATTR_MPT_HOPNUM CMQ_REQ_FIELD_LOC(105, 104)
1097 #define CFG_BT_ATTR_SCCC_BA_PGSZ CMQ_REQ_FIELD_LOC(131, 128)
1098 #define CFG_BT_ATTR_SCCC_BUF_PGSZ CMQ_REQ_FIELD_LOC(135, 132)
1099 #define CFG_BT_ATTR_SCCC_HOPNUM CMQ_REQ_FIELD_LOC(137, 136)
1100
1101 /* Fields of HNS_ROCE_OPC_CFG_ENTRY_SIZE */
1102 #define CFG_HEM_ENTRY_SIZE_TYPE CMQ_REQ_FIELD_LOC(31, 0)
1103 enum {
1104 HNS_ROCE_CFG_QPC_SIZE = BIT(0),
1105 HNS_ROCE_CFG_SCCC_SIZE = BIT(1),
1106 };
1107
1108 #define CFG_HEM_ENTRY_SIZE_VALUE CMQ_REQ_FIELD_LOC(191, 160)
1109
1110 /* Fields of HNS_ROCE_OPC_CFG_GMV_BT */
1111 #define CFG_GMV_BT_BA_L CMQ_REQ_FIELD_LOC(31, 0)
1112 #define CFG_GMV_BT_BA_H CMQ_REQ_FIELD_LOC(51, 32)
1113 #define CFG_GMV_BT_IDX CMQ_REQ_FIELD_LOC(95, 64)
1114
1115 /* Fields of HNS_ROCE_QUERY_RAM_ECC */
1116 #define QUERY_RAM_ECC_1BIT_ERR CMQ_REQ_FIELD_LOC(31, 0)
1117 #define QUERY_RAM_ECC_RES_TYPE CMQ_REQ_FIELD_LOC(63, 32)
1118 #define QUERY_RAM_ECC_TAG CMQ_REQ_FIELD_LOC(95, 64)
1119
1120 struct hns_roce_cfg_sgid_tb {
1121 __le32 table_idx_rsv;
1122 __le32 vf_sgid_l;
1123 __le32 vf_sgid_ml;
1124 __le32 vf_sgid_mh;
1125 __le32 vf_sgid_h;
1126 __le32 vf_sgid_type_rsv;
1127 };
1128
1129 #define SGID_TB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_sgid_tb, h, l)
1130
1131 #define CFG_SGID_TB_TABLE_IDX SGID_TB_FIELD_LOC(7, 0)
1132 #define CFG_SGID_TB_VF_SGID_TYPE SGID_TB_FIELD_LOC(161, 160)
1133
1134 struct hns_roce_cfg_smac_tb {
1135 __le32 tb_idx_rsv;
1136 __le32 vf_smac_l;
1137 __le32 vf_smac_h_rsv;
1138 __le32 rsv[3];
1139 };
1140
1141 #define SMAC_TB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_smac_tb, h, l)
1142
1143 #define CFG_SMAC_TB_IDX SMAC_TB_FIELD_LOC(7, 0)
1144 #define CFG_SMAC_TB_VF_SMAC_H SMAC_TB_FIELD_LOC(79, 64)
1145
1146 struct hns_roce_cfg_gmv_tb_a {
1147 __le32 vf_sgid_l;
1148 __le32 vf_sgid_ml;
1149 __le32 vf_sgid_mh;
1150 __le32 vf_sgid_h;
1151 __le32 vf_sgid_type_vlan;
1152 __le32 resv;
1153 };
1154
1155 #define GMV_TB_A_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_gmv_tb_a, h, l)
1156
1157 #define GMV_TB_A_VF_SGID_TYPE GMV_TB_A_FIELD_LOC(129, 128)
1158 #define GMV_TB_A_VF_VLAN_EN GMV_TB_A_FIELD_LOC(130, 130)
1159 #define GMV_TB_A_VF_VLAN_ID GMV_TB_A_FIELD_LOC(155, 144)
1160
1161 struct hns_roce_cfg_gmv_tb_b {
1162 __le32 vf_smac_l;
1163 __le32 vf_smac_h;
1164 __le32 table_idx_rsv;
1165 __le32 resv[3];
1166 };
1167
1168 #define GMV_TB_B_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_gmv_tb_b, h, l)
1169
1170 #define GMV_TB_B_SMAC_H GMV_TB_B_FIELD_LOC(47, 32)
1171 #define GMV_TB_B_SGID_IDX GMV_TB_B_FIELD_LOC(71, 64)
1172
1173 #define HNS_ROCE_QUERY_PF_CAPS_CMD_NUM 5
1174 struct hns_roce_query_pf_caps_a {
1175 u8 number_ports;
1176 u8 local_ca_ack_delay;
1177 __le16 max_sq_sg;
1178 __le16 max_sq_inline;
1179 __le16 max_rq_sg;
1180 __le32 rsv0;
1181 __le16 num_qpc_timer;
1182 __le16 num_cqc_timer;
1183 __le16 max_srq_sges;
1184 u8 num_aeq_vectors;
1185 u8 num_other_vectors;
1186 u8 max_sq_desc_sz;
1187 u8 max_rq_desc_sz;
1188 u8 rsv1;
1189 u8 cqe_sz;
1190 };
1191
1192 struct hns_roce_query_pf_caps_b {
1193 u8 mtpt_entry_sz;
1194 u8 irrl_entry_sz;
1195 u8 trrl_entry_sz;
1196 u8 cqc_entry_sz;
1197 u8 srqc_entry_sz;
1198 u8 idx_entry_sz;
1199 u8 sccc_sz;
1200 u8 max_mtu;
1201 __le16 qpc_sz;
1202 __le16 qpc_timer_entry_sz;
1203 __le16 cqc_timer_entry_sz;
1204 u8 min_cqes;
1205 u8 min_wqes;
1206 __le32 page_size_cap;
1207 u8 pkey_table_len;
1208 u8 phy_num_uars;
1209 u8 ctx_hop_num;
1210 u8 pbl_hop_num;
1211 };
1212
1213 struct hns_roce_query_pf_caps_c {
1214 __le32 cap_flags_num_pds;
1215 __le32 max_gid_num_cqs;
1216 __le32 cq_depth;
1217 __le32 num_mrws;
1218 __le32 ord_num_qps;
1219 __le16 sq_depth;
1220 __le16 rq_depth;
1221 };
1222
1223 #define PF_CAPS_C_FIELD_LOC(h, l) \
1224 FIELD_LOC(struct hns_roce_query_pf_caps_c, h, l)
1225
1226 #define PF_CAPS_C_NUM_PDS PF_CAPS_C_FIELD_LOC(19, 0)
1227 #define PF_CAPS_C_CAP_FLAGS PF_CAPS_C_FIELD_LOC(31, 20)
1228 #define PF_CAPS_C_NUM_CQS PF_CAPS_C_FIELD_LOC(51, 32)
1229 #define PF_CAPS_C_MAX_GID PF_CAPS_C_FIELD_LOC(60, 52)
1230 #define PF_CAPS_C_CQ_DEPTH PF_CAPS_C_FIELD_LOC(86, 64)
1231 #define PF_CAPS_C_NUM_MRWS PF_CAPS_C_FIELD_LOC(115, 96)
1232 #define PF_CAPS_C_NUM_QPS PF_CAPS_C_FIELD_LOC(147, 128)
1233 #define PF_CAPS_C_MAX_ORD PF_CAPS_C_FIELD_LOC(155, 148)
1234
1235 struct hns_roce_query_pf_caps_d {
1236 __le32 wq_hop_num_max_srqs;
1237 __le16 srq_depth;
1238 __le16 cap_flags_ex;
1239 __le32 num_ceqs_ceq_depth;
1240 __le32 arm_st_aeq_depth;
1241 __le32 num_uars_rsv_pds;
1242 __le32 rsv_uars_rsv_qps;
1243 };
1244
1245 #define PF_CAPS_D_FIELD_LOC(h, l) \
1246 FIELD_LOC(struct hns_roce_query_pf_caps_d, h, l)
1247
1248 #define PF_CAPS_D_NUM_SRQS PF_CAPS_D_FIELD_LOC(19, 0)
1249 #define PF_CAPS_D_RQWQE_HOP_NUM PF_CAPS_D_FIELD_LOC(21, 20)
1250 #define PF_CAPS_D_EX_SGE_HOP_NUM PF_CAPS_D_FIELD_LOC(23, 22)
1251 #define PF_CAPS_D_SQWQE_HOP_NUM PF_CAPS_D_FIELD_LOC(25, 24)
1252 #define PF_CAPS_D_CONG_TYPE PF_CAPS_D_FIELD_LOC(29, 26)
1253 #define PF_CAPS_D_CEQ_DEPTH PF_CAPS_D_FIELD_LOC(85, 64)
1254 #define PF_CAPS_D_NUM_CEQS PF_CAPS_D_FIELD_LOC(95, 86)
1255 #define PF_CAPS_D_AEQ_DEPTH PF_CAPS_D_FIELD_LOC(117, 96)
1256 #define PF_CAPS_D_AEQ_ARM_ST PF_CAPS_D_FIELD_LOC(119, 118)
1257 #define PF_CAPS_D_CEQ_ARM_ST PF_CAPS_D_FIELD_LOC(121, 120)
1258 #define PF_CAPS_D_RSV_PDS PF_CAPS_D_FIELD_LOC(147, 128)
1259 #define PF_CAPS_D_NUM_UARS PF_CAPS_D_FIELD_LOC(155, 148)
1260 #define PF_CAPS_D_RSV_QPS PF_CAPS_D_FIELD_LOC(179, 160)
1261 #define PF_CAPS_D_RSV_UARS PF_CAPS_D_FIELD_LOC(187, 180)
1262
1263 #define HNS_ROCE_CAP_FLAGS_EX_SHIFT 12
1264
1265 struct hns_roce_congestion_algorithm {
1266 u8 alg_sel;
1267 u8 alg_sub_sel;
1268 u8 dip_vld;
1269 u8 wnd_mode_sel;
1270 };
1271
1272 struct hns_roce_query_pf_caps_e {
1273 __le32 chunk_size_shift_rsv_mrws;
1274 __le32 rsv_cqs;
1275 __le32 rsv_srqs;
1276 __le32 rsv_lkey;
1277 __le16 ceq_max_cnt;
1278 __le16 ceq_period;
1279 __le16 aeq_max_cnt;
1280 __le16 aeq_period;
1281 };
1282
1283 #define PF_CAPS_E_FIELD_LOC(h, l) \
1284 FIELD_LOC(struct hns_roce_query_pf_caps_e, h, l)
1285
1286 #define PF_CAPS_E_RSV_MRWS PF_CAPS_E_FIELD_LOC(19, 0)
1287 #define PF_CAPS_E_CHUNK_SIZE_SHIFT PF_CAPS_E_FIELD_LOC(31, 20)
1288 #define PF_CAPS_E_RSV_CQS PF_CAPS_E_FIELD_LOC(51, 32)
1289 #define PF_CAPS_E_RSV_SRQS PF_CAPS_E_FIELD_LOC(83, 64)
1290 #define PF_CAPS_E_RSV_LKEYS PF_CAPS_E_FIELD_LOC(115, 96)
1291
1292 struct hns_roce_cmq_req {
1293 __le32 data[6];
1294 };
1295
1296 #define CMQ_REQ_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cmq_req, h, l)
1297
1298 struct hns_roce_cmq_desc {
1299 __le16 opcode;
1300 __le16 flag;
1301 __le16 retval;
1302 __le16 rsv;
1303 union {
1304 __le32 data[6];
1305 struct {
1306 __le32 own_func_num;
1307 __le32 own_mac_id;
1308 __le32 rsv[4];
1309 } func_info;
1310 };
1311 };
1312
1313 struct hns_roce_v2_cmq_ring {
1314 dma_addr_t desc_dma_addr;
1315 struct hns_roce_cmq_desc *desc;
1316 u32 head;
1317 u16 buf_size;
1318 u16 desc_num;
1319 u8 flag;
1320 spinlock_t lock; /* command queue lock */
1321 };
1322
1323 struct hns_roce_v2_cmq {
1324 struct hns_roce_v2_cmq_ring csq;
1325 u16 tx_timeout;
1326 };
1327
1328 struct hns_roce_link_table {
1329 struct hns_roce_buf_list table;
1330 struct hns_roce_buf *buf;
1331 };
1332
1333 #define HNS_ROCE_EXT_LLM_ENTRY(addr, id) (((id) << (64 - 12)) | ((addr) >> 12))
1334 #define HNS_ROCE_EXT_LLM_MIN_PAGES(que_num) ((que_num) * 4 + 2)
1335
1336 struct hns_roce_v2_free_mr {
1337 struct hns_roce_qp *rsv_qp[HNS_ROCE_FREE_MR_USED_QP_NUM];
1338 struct hns_roce_cq *rsv_cq;
1339 struct hns_roce_pd *rsv_pd;
1340 struct mutex mutex;
1341 };
1342
1343 struct hns_roce_v2_priv {
1344 struct hnae3_handle *handle;
1345 struct hns_roce_v2_cmq cmq;
1346 struct hns_roce_link_table ext_llm;
1347 struct hns_roce_v2_free_mr free_mr;
1348 };
1349
1350 struct hns_roce_dip {
1351 u8 dgid[GID_LEN_V2];
1352 u32 dip_idx;
1353 struct list_head node; /* all dips are on a list */
1354 };
1355
1356 struct fmea_ram_ecc {
1357 u32 is_ecc_err;
1358 u32 res_type;
1359 u32 index;
1360 };
1361
1362 /* only for RNR timeout issue of HIP08 */
1363 #define HNS_ROCE_CLOCK_ADJUST 1000
1364 #define HNS_ROCE_MAX_CQ_PERIOD 65
1365 #define HNS_ROCE_MAX_EQ_PERIOD 65
1366 #define HNS_ROCE_RNR_TIMER_10NS 1
1367 #define HNS_ROCE_1US_CFG 999
1368 #define HNS_ROCE_1NS_CFG 0
1369
1370 #define HNS_ROCE_AEQ_DEFAULT_BURST_NUM 0x0
1371 #define HNS_ROCE_AEQ_DEFAULT_INTERVAL 0x0
1372 #define HNS_ROCE_CEQ_DEFAULT_BURST_NUM 0x0
1373 #define HNS_ROCE_CEQ_DEFAULT_INTERVAL 0x0
1374
1375 #define HNS_ROCE_V2_EQ_STATE_INVALID 0
1376 #define HNS_ROCE_V2_EQ_STATE_VALID 1
1377 #define HNS_ROCE_V2_EQ_STATE_OVERFLOW 2
1378 #define HNS_ROCE_V2_EQ_STATE_FAILURE 3
1379
1380 #define HNS_ROCE_V2_EQ_OVER_IGNORE_0 0
1381 #define HNS_ROCE_V2_EQ_OVER_IGNORE_1 1
1382
1383 #define HNS_ROCE_V2_EQ_COALESCE_0 0
1384 #define HNS_ROCE_V2_EQ_COALESCE_1 1
1385
1386 #define HNS_ROCE_V2_EQ_FIRED 0
1387 #define HNS_ROCE_V2_EQ_ARMED 1
1388 #define HNS_ROCE_V2_EQ_ALWAYS_ARMED 3
1389
1390 #define HNS_ROCE_EQ_INIT_EQE_CNT 0
1391 #define HNS_ROCE_EQ_INIT_PROD_IDX 0
1392 #define HNS_ROCE_EQ_INIT_REPORT_TIMER 0
1393 #define HNS_ROCE_EQ_INIT_MSI_IDX 0
1394 #define HNS_ROCE_EQ_INIT_CONS_IDX 0
1395 #define HNS_ROCE_EQ_INIT_NXT_EQE_BA 0
1396
1397 #define HNS_ROCE_V2_COMP_EQE_NUM 0x1000
1398 #define HNS_ROCE_V2_ASYNC_EQE_NUM 0x1000
1399
1400 #define HNS_ROCE_V2_VF_INT_ST_AEQ_OVERFLOW_S 0
1401
1402 #define HNS_ROCE_EQ_DB_CMD_AEQ 0x0
1403 #define HNS_ROCE_EQ_DB_CMD_AEQ_ARMED 0x1
1404 #define HNS_ROCE_EQ_DB_CMD_CEQ 0x2
1405 #define HNS_ROCE_EQ_DB_CMD_CEQ_ARMED 0x3
1406
1407 #define EQ_ENABLE 1
1408 #define EQ_DISABLE 0
1409
1410 #define EQ_REG_OFFSET 0x4
1411
1412 #define HNS_ROCE_INT_NAME_LEN 32
1413 #define HNS_ROCE_V2_EQN_M GENMASK(23, 0)
1414
1415 #define HNS_ROCE_V2_VF_ABN_INT_EN_S 0
1416 #define HNS_ROCE_V2_VF_ABN_INT_EN_M GENMASK(0, 0)
1417 #define HNS_ROCE_V2_VF_ABN_INT_ST_M GENMASK(2, 0)
1418 #define HNS_ROCE_V2_VF_ABN_INT_CFG_M GENMASK(2, 0)
1419 #define HNS_ROCE_V2_VF_EVENT_INT_EN_M GENMASK(0, 0)
1420
1421 struct hns_roce_eq_context {
1422 __le32 data[16];
1423 };
1424
1425 #define EQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_eq_context, h, l)
1426
1427 #define EQC_EQ_ST EQC_FIELD_LOC(1, 0)
1428 #define EQC_EQE_HOP_NUM EQC_FIELD_LOC(3, 2)
1429 #define EQC_OVER_IGNORE EQC_FIELD_LOC(4, 4)
1430 #define EQC_COALESCE EQC_FIELD_LOC(5, 5)
1431 #define EQC_ARM_ST EQC_FIELD_LOC(7, 6)
1432 #define EQC_EQN EQC_FIELD_LOC(15, 8)
1433 #define EQC_EQE_CNT EQC_FIELD_LOC(31, 16)
1434 #define EQC_EQE_BA_PG_SZ EQC_FIELD_LOC(35, 32)
1435 #define EQC_EQE_BUF_PG_SZ EQC_FIELD_LOC(39, 36)
1436 #define EQC_EQ_PROD_INDX EQC_FIELD_LOC(63, 40)
1437 #define EQC_EQ_MAX_CNT EQC_FIELD_LOC(79, 64)
1438 #define EQC_EQ_PERIOD EQC_FIELD_LOC(95, 80)
1439 #define EQC_EQE_REPORT_TIMER EQC_FIELD_LOC(127, 96)
1440 #define EQC_EQE_BA_L EQC_FIELD_LOC(159, 128)
1441 #define EQC_EQE_BA_H EQC_FIELD_LOC(188, 160)
1442 #define EQC_SHIFT EQC_FIELD_LOC(199, 192)
1443 #define EQC_MSI_INDX EQC_FIELD_LOC(207, 200)
1444 #define EQC_CUR_EQE_BA_L EQC_FIELD_LOC(223, 208)
1445 #define EQC_CUR_EQE_BA_M EQC_FIELD_LOC(255, 224)
1446 #define EQC_CUR_EQE_BA_H EQC_FIELD_LOC(259, 256)
1447 #define EQC_EQ_CONS_INDX EQC_FIELD_LOC(287, 264)
1448 #define EQC_NEX_EQE_BA_L EQC_FIELD_LOC(319, 288)
1449 #define EQC_NEX_EQE_BA_H EQC_FIELD_LOC(339, 320)
1450 #define EQC_EQE_SIZE EQC_FIELD_LOC(341, 340)
1451
1452 #define MAX_SERVICE_LEVEL 0x7
1453
1454 struct hns_roce_wqe_atomic_seg {
1455 __le64 fetchadd_swap_data;
1456 __le64 cmp_data;
1457 };
1458
1459 struct hns_roce_sccc_clr {
1460 __le32 qpn;
1461 __le32 rsv[5];
1462 };
1463
1464 struct hns_roce_sccc_clr_done {
1465 __le32 clr_done;
1466 __le32 rsv[5];
1467 };
1468
1469 int hns_roce_v2_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata);
1470
hns_roce_write64(struct hns_roce_dev * hr_dev,__le32 val[2],void __iomem * dest)1471 static inline void hns_roce_write64(struct hns_roce_dev *hr_dev, __le32 val[2],
1472 void __iomem *dest)
1473 {
1474 struct hns_roce_v2_priv *priv = hr_dev->priv;
1475 struct hnae3_handle *handle = priv->handle;
1476 const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
1477
1478 if (!hr_dev->dis_db && !ops->get_hw_reset_stat(handle))
1479 hns_roce_write64_k(val, dest);
1480 }
1481
1482 #endif
1483