Lines Matching full:access

37 pair may be organized into different ranked access classes to represent
40 the highest access class, 0. Any given target may have one or more
46 relationship for the access class "0" memory initiators and targets::
54 A memory initiator may have multiple memory targets in the same access
56 nodes' access characteristics share the same performance relative to other
57 linked initiator nodes. Each target within an initiator's access class,
60 The access class "1" is used to allow differentiation between initiators
62 IO initiators such as GPUs and NICs.  Unlike access class 0, only
72 memory node's access class 0 initiators as follows::
77 are linked under the this access's initiators.
96 Access class 1 takes the same form but only includes values for CPU to
107 higher performing memory to transparently cache access to progressively
112 initiator access, and the term "near memory" represents the fastest