Lines Matching +full:assigned +full:- +full:clock +full:- +full:parents
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yunfei Dong <yunfei.dong@mediatek.com>
20 - mediatek,mt8173-vcodec-enc-vp8
21 - mediatek,mt8173-vcodec-enc
22 - mediatek,mt8183-vcodec-enc
23 - mediatek,mt8188-vcodec-enc
24 - mediatek,mt8192-vcodec-enc
25 - mediatek,mt8195-vcodec-enc
37 clock-names:
41 assigned-clocks: true
43 assigned-clock-parents: true
62 power-domains:
65 "#address-cells":
68 "#size-cells":
72 - compatible
73 - reg
74 - interrupts
75 - clocks
76 - clock-names
77 - iommus
78 - assigned-clocks
79 - assigned-clock-parents
82 - if:
87 - mediatek,mt8183-vcodec-enc
88 - mediatek,mt8188-vcodec-enc
89 - mediatek,mt8192-vcodec-enc
90 - mediatek,mt8195-vcodec-enc
94 - mediatek,scp
96 - if:
101 - mediatek,mt8173-vcodec-enc-vp8
102 - mediatek,mt8173-vcodec-enc
106 - mediatek,vpu
108 - if:
112 - mediatek,mt8173-vcodec-enc
113 - mediatek,mt8188-vcodec-enc
114 - mediatek,mt8192-vcodec-enc
115 - mediatek,mt8195-vcodec-enc
119 clock:
123 clock-names:
125 - const: venc_sel
128 clock:
132 clock-names:
134 - const: venc_lt_sel
139 - |
140 #include <dt-bindings/interrupt-controller/arm-gic.h>
141 #include <dt-bindings/clock/mt8173-clk.h>
142 #include <dt-bindings/memory/mt8173-larb-port.h>
143 #include <dt-bindings/interrupt-controller/irq.h>
146 compatible = "mediatek,mt8173-vcodec-enc";
162 clock-names = "venc_sel";
163 assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
164 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>;
168 compatible = "mediatek,mt8173-vcodec-enc-vp8";
182 clock-names = "venc_lt_sel";
183 assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
184 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;