Lines Matching +full:clock +full:- +full:names
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/allwinner,sun6i-a31-prcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
17 const: allwinner,sun6i-a31-prcm
30 - allwinner,sun4i-a10-mod0-clk
31 - allwinner,sun6i-a31-apb0-clk
32 - allwinner,sun6i-a31-apb0-gates-clk
33 - allwinner,sun6i-a31-ar100-clk
34 - allwinner,sun6i-a31-clock-reset
35 - fixed-factor-clock
38 - compatible
41 - if:
45 const: fixed-factor-clock
48 $ref: /schemas/clock/fixed-factor-clock.yaml#
50 - if:
54 const: allwinner,sun4i-a10-mod0-clk
58 "#clock-cells":
64 clock-output-names:
68 - "#clock-cells"
69 - clocks
70 - clock-output-names
72 - if:
76 const: allwinner,sun6i-a31-apb0-clk
80 "#clock-cells":
86 clock-output-names:
90 - "#clock-cells"
91 - clocks
92 - clock-output-names
94 - if:
98 const: allwinner,sun6i-a31-apb0-gates-clk
102 "#clock-cells":
105 This additional argument passed to that clock is the
112 clock-output-names:
117 - "#clock-cells"
118 - clocks
119 - clock-output-names
121 - if:
125 const: allwinner,sun6i-a31-ar100-clk
129 "#clock-cells":
138 clock-output-names:
142 - "#clock-cells"
143 - clocks
144 - clock-output-names
146 - if:
150 const: allwinner,sun6i-a31-clock-reset
154 "#reset-cells":
158 - "#reset-cells"
161 - compatible
162 - reg
167 - |
168 #include <dt-bindings/clock/sun6i-a31-ccu.h>
171 compatible = "allwinner,sun6i-a31-prcm";
175 compatible = "allwinner,sun6i-a31-ar100-clk";
176 #clock-cells = <0>;
180 clock-output-names = "ar100";
184 compatible = "fixed-factor-clock";
185 #clock-cells = <0>;
186 clock-div = <1>;
187 clock-mult = <1>;
189 clock-output-names = "ahb0";
193 compatible = "allwinner,sun6i-a31-apb0-clk";
194 #clock-cells = <0>;
196 clock-output-names = "apb0";
200 compatible = "allwinner,sun6i-a31-apb0-gates-clk";
201 #clock-cells = <1>;
203 clock-output-names = "apb0_pio", "apb0_ir",
210 #clock-cells = <0>;
211 compatible = "allwinner,sun4i-a10-mod0-clk";
213 clock-output-names = "ir";
217 compatible = "allwinner,sun6i-a31-clock-reset";
218 #reset-cells = <1>;