Lines Matching full:32

12 #	8, 16, 32	register bits (default is 8)
15 #	float_ireal	iReal or IEEE 754; 32 bits
47 serial_number				0x001c	32
74 frame_format_descriptor_4(n)		0x0060	32	f
307 requested_link_rate			0x0820	32	u16.16
541 ADC_bit_depth_capability		0x10f4	32	v1.1
544 min_ext_clk_freq_mhz			0x1100	32	float_ireal
545 max_ext_clk_freq_mhz			0x1104	32	float_ireal
550 min_pll_ip_clk_freq_mhz			0x110c	32	float_ireal
551 # min_vt_pll_ip_clk_freq_mhz		0x110c	32	float_ireal
552 max_pll_ip_clk_freq_mhz			0x1110	32	float_ireal
553 # max_vt_pll_ip_clk_freq_mhz		0x1110	32	float_ireal
558 min_pll_op_clk_freq_mhz			0x1118	32	float_ireal
559 max_pll_op_clk_freq_mhz			0x111c	32	float_ireal
564 min_vt_sys_clk_freq_mhz			0x1124	32	float_ireal
565 max_vt_sys_clk_freq_mhz			0x1128	32	float_ireal
566 min_vt_pix_clk_freq_mhz			0x112c	32	float_ireal
567 max_vt_pix_clk_freq_mhz			0x1130	32	float_ireal
601 min_op_sys_clk_freq_mhz			0x1164	32	float_ireal
602 max_op_sys_clk_freq_mhz			0x1168	32	float_ireal
605 min_op_pix_clk_freq_mhz			0x1170	32	float_ireal
606 max_op_pix_clk_freq_mhz			0x1174	32	float_ireal
634 min_op_pll_ip_clk_freq_mhz		0x11a4	32	float_ireal
635 max_op_pll_ip_clk_freq_mhz		0x11a8	32	float_ireal
638 min_op_pll_op_clk_freq_mhz		0x11b0	32	float_ireal
639 max_op_pll_op_clk_freq_mhz		0x11b4	32	float_ireal
728 min_op_sys_clk_freq_rev_mhz		0x123c	32	v1.1	float_ireal
729 max_op_sys_clk_freq_rev_mhz		0x1240	32	v1.1	float_ireal
730 min_op_pix_clk_freq_rev_mhz		0x1244	32	v1.1	float_ireal
731 max_op_pix_clk_freq_rev_mhz		0x1248	32	v1.1	float_ireal
732 max_bitrate_rev_d_mode_mbps		0x124c	32	v1.1	ireal
733 max_symrate_rev_c_mode_msps		0x1250	32	v1.1	ireal
813 max_per_lane_bitrate_lane_d_mode_mbps(n)	0x1608	32	ireal
819 max_per_lane_bitrate_lane_c_mode_mbps(n)	0x161a	32	ireal