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6 be very unlikely, and if they happen it should be limited to single bit
7 errors. Examples of this design can be found in the synchronization
11 The errors can be detected with multiple mechanisms:
16    Improvements could be invalidating an entire programming sequence and
20    impact its audibility (most-significant bits will be more impacted in PCM),
21    and after a number of such errors are detected the bus might be reset. Note
24    be distinguished, although a recurring bus clash when audio is enabled is a
27    not be responsible for the errors so resetting them individually is not a
32    that the command was received and will be executed by the end of the
34    be applied. In case of a bad programming (command sent to non-existent
37    command to be retransmitted several times.  If the retransmission fails,
38    backtracking and restarting the entire programming sequence might be a
54    difficult to backtrack from. Retransmitting the Bank Switch command may be
57    such as frame reconfiguration would be handled at different times). A global
58    hard-reset might be the best solution.