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Lines Matching refs:val

276 	u64 lpcr, val;  in init_xlate_regs()  local
282 val = 0ULL; in init_xlate_regs()
283 val = SET_FIELD(VAS_XLATE_MSR_HV, val, 1); in init_xlate_regs()
284 val = SET_FIELD(VAS_XLATE_MSR_SF, val, 1); in init_xlate_regs()
286 val = SET_FIELD(VAS_XLATE_MSR_DR, val, 1); in init_xlate_regs()
287 val = SET_FIELD(VAS_XLATE_MSR_PR, val, 1); in init_xlate_regs()
289 write_hvwc_reg(window, VREG(XLATE_MSR), val); in init_xlate_regs()
292 val = 0ULL; in init_xlate_regs()
300 val = SET_FIELD(VAS_XLATE_LPCR_PAGE_SIZE, val, 5); in init_xlate_regs()
301 val = SET_FIELD(VAS_XLATE_LPCR_ISL, val, lpcr & LPCR_ISL); in init_xlate_regs()
302 val = SET_FIELD(VAS_XLATE_LPCR_TC, val, lpcr & LPCR_TC); in init_xlate_regs()
303 val = SET_FIELD(VAS_XLATE_LPCR_SC, val, 0); in init_xlate_regs()
304 write_hvwc_reg(window, VREG(XLATE_LPCR), val); in init_xlate_regs()
313 val = 0ULL; in init_xlate_regs()
314 val = SET_FIELD(VAS_XLATE_MODE, val, radix_enabled() ? 3 : 2); in init_xlate_regs()
315 write_hvwc_reg(window, VREG(XLATE_CTL), val); in init_xlate_regs()
320 val = 0ULL; in init_xlate_regs()
321 val = SET_FIELD(VAS_AMR, val, mfspr(SPRN_AMR)); in init_xlate_regs()
322 write_hvwc_reg(window, VREG(AMR), val); in init_xlate_regs()
324 val = 0ULL; in init_xlate_regs()
325 val = SET_FIELD(VAS_SEIDR, val, 0); in init_xlate_regs()
326 write_hvwc_reg(window, VREG(SEIDR), val); in init_xlate_regs()
364 u64 val; in init_winctx_regs() local
369 val = 0ULL; in init_winctx_regs()
370 val = SET_FIELD(VAS_LPID, val, winctx->lpid); in init_winctx_regs()
371 write_hvwc_reg(window, VREG(LPID), val); in init_winctx_regs()
373 val = 0ULL; in init_winctx_regs()
374 val = SET_FIELD(VAS_PID_ID, val, winctx->pidr); in init_winctx_regs()
375 write_hvwc_reg(window, VREG(PID), val); in init_winctx_regs()
379 val = 0ULL; in init_winctx_regs()
380 val = SET_FIELD(VAS_FAULT_TX_WIN, val, winctx->fault_win_id); in init_winctx_regs()
381 write_hvwc_reg(window, VREG(FAULT_TX_WIN), val); in init_winctx_regs()
386 val = 0ULL; in init_winctx_regs()
387 val = SET_FIELD(VAS_HV_INTR_SRC_RA, val, winctx->irq_port); in init_winctx_regs()
388 write_hvwc_reg(window, VREG(HV_INTR_SRC_RA), val); in init_winctx_regs()
390 val = 0ULL; in init_winctx_regs()
391 val = SET_FIELD(VAS_PSWID_EA_HANDLE, val, winctx->pswid); in init_winctx_regs()
392 write_hvwc_reg(window, VREG(PSWID), val); in init_winctx_regs()
407 val = winctx->rx_fifo; in init_winctx_regs()
408 val = SET_FIELD(VAS_PAGE_MIGRATION_SELECT, val, 0); in init_winctx_regs()
409 write_hvwc_reg(window, VREG(LFIFO_BAR), val); in init_winctx_regs()
411 val = 0ULL; in init_winctx_regs()
412 val = SET_FIELD(VAS_LDATA_STAMP, val, winctx->data_stamp); in init_winctx_regs()
413 write_hvwc_reg(window, VREG(LDATA_STAMP_CTL), val); in init_winctx_regs()
415 val = 0ULL; in init_winctx_regs()
416 val = SET_FIELD(VAS_LDMA_TYPE, val, winctx->dma_type); in init_winctx_regs()
417 val = SET_FIELD(VAS_LDMA_FIFO_DISABLE, val, winctx->fifo_disable); in init_winctx_regs()
418 write_hvwc_reg(window, VREG(LDMA_CACHE_CTL), val); in init_winctx_regs()
424 val = 0ULL; in init_winctx_regs()
425 val = SET_FIELD(VAS_LRX_WCRED, val, winctx->wcreds_max); in init_winctx_regs()
426 write_hvwc_reg(window, VREG(LRX_WCRED), val); in init_winctx_regs()
428 val = 0ULL; in init_winctx_regs()
429 val = SET_FIELD(VAS_TX_WCRED, val, winctx->wcreds_max); in init_winctx_regs()
430 write_hvwc_reg(window, VREG(TX_WCRED), val); in init_winctx_regs()
437 val = 0ULL; in init_winctx_regs()
438 val = SET_FIELD(VAS_LFIFO_SIZE, val, ilog2(fifo_size)); in init_winctx_regs()
439 write_hvwc_reg(window, VREG(LFIFO_SIZE), val); in init_winctx_regs()
451 val = 0ULL; in init_winctx_regs()
452 val = SET_FIELD(VAS_LRX_WIN_ID, val, winctx->rx_win_id); in init_winctx_regs()
453 write_hvwc_reg(window, VREG(LRFIFO_WIN_PTR), val); in init_winctx_regs()
457 val = 0ULL; in init_winctx_regs()
458 val = SET_FIELD(VAS_NOTIFY_DISABLE, val, winctx->notify_disable); in init_winctx_regs()
459 val = SET_FIELD(VAS_INTR_DISABLE, val, winctx->intr_disable); in init_winctx_regs()
460 val = SET_FIELD(VAS_NOTIFY_EARLY, val, winctx->notify_early); in init_winctx_regs()
461 val = SET_FIELD(VAS_NOTIFY_OSU_INTR, val, winctx->notify_os_intr_reg); in init_winctx_regs()
462 write_hvwc_reg(window, VREG(LNOTIFY_CTL), val); in init_winctx_regs()
464 val = 0ULL; in init_winctx_regs()
465 val = SET_FIELD(VAS_LNOTIFY_PID, val, winctx->lnotify_pid); in init_winctx_regs()
466 write_hvwc_reg(window, VREG(LNOTIFY_PID), val); in init_winctx_regs()
468 val = 0ULL; in init_winctx_regs()
469 val = SET_FIELD(VAS_LNOTIFY_LPID, val, winctx->lnotify_lpid); in init_winctx_regs()
470 write_hvwc_reg(window, VREG(LNOTIFY_LPID), val); in init_winctx_regs()
472 val = 0ULL; in init_winctx_regs()
473 val = SET_FIELD(VAS_LNOTIFY_TID, val, winctx->lnotify_tid); in init_winctx_regs()
474 write_hvwc_reg(window, VREG(LNOTIFY_TID), val); in init_winctx_regs()
476 val = 0ULL; in init_winctx_regs()
477 val = SET_FIELD(VAS_LNOTIFY_MIN_SCOPE, val, winctx->min_scope); in init_winctx_regs()
478 val = SET_FIELD(VAS_LNOTIFY_MAX_SCOPE, val, winctx->max_scope); in init_winctx_regs()
479 write_hvwc_reg(window, VREG(LNOTIFY_SCOPE), val); in init_winctx_regs()
488 val = 0ULL; in init_winctx_regs()
489 val = SET_FIELD(VAS_PUSH_TO_MEM, val, 1); in init_winctx_regs()
490 write_hvwc_reg(window, VREG(WIN_CTX_CACHING_CTL), val); in init_winctx_regs()
493 val = 0ULL; in init_winctx_regs()
494 val = SET_FIELD(VAS_WINCTL_REJ_NO_CREDIT, val, winctx->rej_no_credit); in init_winctx_regs()
495 val = SET_FIELD(VAS_WINCTL_PIN, val, winctx->pin_win); in init_winctx_regs()
496 val = SET_FIELD(VAS_WINCTL_TX_WCRED_MODE, val, winctx->tx_wcred_mode); in init_winctx_regs()
497 val = SET_FIELD(VAS_WINCTL_RX_WCRED_MODE, val, winctx->rx_wcred_mode); in init_winctx_regs()
498 val = SET_FIELD(VAS_WINCTL_TX_WORD_MODE, val, winctx->tx_word_mode); in init_winctx_regs()
499 val = SET_FIELD(VAS_WINCTL_RX_WORD_MODE, val, winctx->rx_word_mode); in init_winctx_regs()
500 val = SET_FIELD(VAS_WINCTL_FAULT_WIN, val, winctx->fault_win); in init_winctx_regs()
501 val = SET_FIELD(VAS_WINCTL_NX_WIN, val, winctx->nx_win); in init_winctx_regs()
502 val = SET_FIELD(VAS_WINCTL_OPEN, val, 1); in init_winctx_regs()
503 write_hvwc_reg(window, VREG(WINCTL), val); in init_winctx_regs()
1103 uint64_t val; in vas_paste_crb() local
1121 val = SET_FIELD(RMA_LSMP_REPORT_ENABLE, 0ULL, 1); in vas_paste_crb()
1122 addr += val; in vas_paste_crb()
1157 u64 val; in poll_window_credits() local
1161 val = read_hvwc_reg(window, VREG(WINCTL)); in poll_window_credits()
1163 mode = GET_FIELD(VAS_WINCTL_TX_WCRED_MODE, val); in poll_window_credits()
1165 mode = GET_FIELD(VAS_WINCTL_RX_WCRED_MODE, val); in poll_window_credits()
1171 val = read_hvwc_reg(window, VREG(TX_WCRED)); in poll_window_credits()
1172 creds = GET_FIELD(VAS_TX_WCRED, val); in poll_window_credits()
1174 val = read_hvwc_reg(window, VREG(LRX_WCRED)); in poll_window_credits()
1175 creds = GET_FIELD(VAS_LRX_WCRED, val); in poll_window_credits()
1186 val = 0; in poll_window_credits()
1212 u64 val; in poll_window_busy_state() local
1216 val = read_hvwc_reg(window, VREG(WIN_STATUS)); in poll_window_busy_state()
1217 busy = GET_FIELD(VAS_WIN_BUSY, val); in poll_window_busy_state()
1219 val = 0; in poll_window_busy_state()
1263 u64 val; in unpin_close_window() local
1265 val = read_hvwc_reg(window, VREG(WINCTL)); in unpin_close_window()
1266 val = SET_FIELD(VAS_WINCTL_PIN, val, 0); in unpin_close_window()
1267 val = SET_FIELD(VAS_WINCTL_OPEN, val, 0); in unpin_close_window()
1268 write_hvwc_reg(window, VREG(WINCTL), val); in unpin_close_window()
1349 uint64_t val; in vas_return_credit() local
1351 val = 0ULL; in vas_return_credit()
1353 val = SET_FIELD(VAS_TX_WCRED, val, 1); in vas_return_credit()
1354 write_hvwc_reg(window, VREG(TX_WCRED_ADDER), val); in vas_return_credit()
1356 val = SET_FIELD(VAS_LRX_WCRED, val, 1); in vas_return_credit()
1357 write_hvwc_reg(window, VREG(LRX_WCRED_ADDER), val); in vas_return_credit()