655 	u32 con0, con1;  in samsung_pll45xx_set_rate()  local
666 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
668 	if (!(samsung_pll45xx_mp_change(con0, con1, rate))) {  in samsung_pll45xx_set_rate()
686 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
687 	con1 &= ~(PLL45XX_AFC_MASK << PLL45XX_AFC_SHIFT);  in samsung_pll45xx_set_rate()
688 	con1 |= (rate->afc << PLL45XX_AFC_SHIFT);  in samsung_pll45xx_set_rate()
703 	writel_relaxed(con1, pll->con_reg + 0x4);  in samsung_pll45xx_set_rate()
792 	u32 con0, con1, lock;  in samsung_pll46xx_set_rate()  local
803 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
805 	if (!(samsung_pll46xx_mpk_change(con0, con1, rate))) {  in samsung_pll46xx_set_rate()
838 	con1 = readl_relaxed(pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
839 	con1 &= ~((PLL46XX_KDIV_MASK << PLL46XX_KDIV_SHIFT) |  in samsung_pll46xx_set_rate()
842 	con1 |= (rate->kdiv << PLL46XX_KDIV_SHIFT) |  in samsung_pll46xx_set_rate()
849 	writel_relaxed(con1, pll->con_reg + 0x4);  in samsung_pll46xx_set_rate()
1125 	u32 con0, con1;  in samsung_pll2650x_set_rate()  local
1136 	con1 = readl_relaxed(pll->con_reg + 4);  in samsung_pll2650x_set_rate()
1151 	con1 &= ~(PLL2650X_K_MASK << PLL2650X_K_SHIFT);  in samsung_pll2650x_set_rate()
1152 	con1 |= ((rate->kdiv & PLL2650X_K_MASK) << PLL2650X_K_SHIFT);  in samsung_pll2650x_set_rate()
1153 	writel_relaxed(con1, pll->con_reg + 4);  in samsung_pll2650x_set_rate()