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Lines Matching refs:tmp

172 	uint32_t tmp;  in mmhub_v3_0_1_init_system_aperture_regs()  local
204 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL2); in mmhub_v3_0_1_init_system_aperture_regs()
205 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL2, in mmhub_v3_0_1_init_system_aperture_regs()
207 WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL2, tmp); in mmhub_v3_0_1_init_system_aperture_regs()
212 uint32_t tmp; in mmhub_v3_0_1_init_tlb_regs() local
215 tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL); in mmhub_v3_0_1_init_tlb_regs()
217 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 1); in mmhub_v3_0_1_init_tlb_regs()
218 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, 3); in mmhub_v3_0_1_init_tlb_regs()
219 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, in mmhub_v3_0_1_init_tlb_regs()
221 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, in mmhub_v3_0_1_init_tlb_regs()
223 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, ECO_BITS, 0); in mmhub_v3_0_1_init_tlb_regs()
224 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, in mmhub_v3_0_1_init_tlb_regs()
227 WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp); in mmhub_v3_0_1_init_tlb_regs()
232 uint32_t tmp; in mmhub_v3_0_1_init_cache_regs() local
235 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL); in mmhub_v3_0_1_init_cache_regs()
236 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 1); in mmhub_v3_0_1_init_cache_regs()
237 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 0); in mmhub_v3_0_1_init_cache_regs()
238 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_1_init_cache_regs()
241 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, L2_PDE0_CACHE_TAG_GENERATION_MODE, in mmhub_v3_0_1_init_cache_regs()
243 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 0); in mmhub_v3_0_1_init_cache_regs()
244 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1); in mmhub_v3_0_1_init_cache_regs()
245 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, IDENTITY_MODE_FRAGMENT_SIZE, 0); in mmhub_v3_0_1_init_cache_regs()
246 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp); in mmhub_v3_0_1_init_cache_regs()
248 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2); in mmhub_v3_0_1_init_cache_regs()
249 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v3_0_1_init_cache_regs()
250 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v3_0_1_init_cache_regs()
251 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL2, tmp); in mmhub_v3_0_1_init_cache_regs()
253 tmp = regMMVM_L2_CNTL3_DEFAULT; in mmhub_v3_0_1_init_cache_regs()
255 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 12); in mmhub_v3_0_1_init_cache_regs()
256 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_1_init_cache_regs()
259 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, BANK_SELECT, 9); in mmhub_v3_0_1_init_cache_regs()
260 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_1_init_cache_regs()
263 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL3, tmp); in mmhub_v3_0_1_init_cache_regs()
265 tmp = regMMVM_L2_CNTL4_DEFAULT; in mmhub_v3_0_1_init_cache_regs()
266 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 0); in mmhub_v3_0_1_init_cache_regs()
267 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 0); in mmhub_v3_0_1_init_cache_regs()
268 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL4, tmp); in mmhub_v3_0_1_init_cache_regs()
270 tmp = regMMVM_L2_CNTL5_DEFAULT; in mmhub_v3_0_1_init_cache_regs()
271 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL5, L2_CACHE_SMALLK_FRAGMENT_SIZE, 0); in mmhub_v3_0_1_init_cache_regs()
272 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL5, tmp); in mmhub_v3_0_1_init_cache_regs()
277 uint32_t tmp; in mmhub_v3_0_1_enable_system_domain() local
279 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_CNTL); in mmhub_v3_0_1_enable_system_domain()
280 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_0_1_enable_system_domain()
281 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0); in mmhub_v3_0_1_enable_system_domain()
282 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_1_enable_system_domain()
284 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_CNTL, tmp); in mmhub_v3_0_1_enable_system_domain()
311 uint32_t tmp; in mmhub_v3_0_1_setup_vmid_config() local
314 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, i); in mmhub_v3_0_1_setup_vmid_config()
315 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1); in mmhub_v3_0_1_setup_vmid_config()
316 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH, in mmhub_v3_0_1_setup_vmid_config()
318 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
320 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
323 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
325 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
327 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
329 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
331 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
333 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
337 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
341 i * hub->ctx_distance, tmp); in mmhub_v3_0_1_setup_vmid_config()
354 hub->vm_cntx_cntl = tmp; in mmhub_v3_0_1_setup_vmid_config()
389 u32 tmp; in mmhub_v3_0_1_gart_disable() local
398 tmp = RREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL); in mmhub_v3_0_1_gart_disable()
399 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 0); in mmhub_v3_0_1_gart_disable()
400 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, in mmhub_v3_0_1_gart_disable()
402 WREG32_SOC15(MMHUB, 0, regMMMC_VM_MX_L1_TLB_CNTL, tmp); in mmhub_v3_0_1_gart_disable()
405 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL); in mmhub_v3_0_1_gart_disable()
406 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 0); in mmhub_v3_0_1_gart_disable()
407 WREG32_SOC15(MMHUB, 0, regMMVM_L2_CNTL, tmp); in mmhub_v3_0_1_gart_disable()
420 u32 tmp; in mmhub_v3_0_1_set_fault_enable_default() local
422 tmp = RREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL); in mmhub_v3_0_1_set_fault_enable_default()
423 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
425 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
427 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
429 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
431 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
434 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
436 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
438 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
440 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
442 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
444 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
447 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
449 tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL, in mmhub_v3_0_1_set_fault_enable_default()
452 WREG32_SOC15(MMHUB, 0, regMMVM_L2_PROTECTION_FAULT_CNTL, tmp); in mmhub_v3_0_1_set_fault_enable_default()