Lines Matching refs:pool
679 static void dcn21_resource_destruct(struct dcn21_resource_pool *pool) in dcn21_resource_destruct() argument
683 for (i = 0; i < pool->base.stream_enc_count; i++) { in dcn21_resource_destruct()
684 if (pool->base.stream_enc[i] != NULL) { in dcn21_resource_destruct()
685 kfree(DCN10STRENC_FROM_STRENC(pool->base.stream_enc[i])); in dcn21_resource_destruct()
686 pool->base.stream_enc[i] = NULL; in dcn21_resource_destruct()
690 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_destruct()
691 if (pool->base.dscs[i] != NULL) in dcn21_resource_destruct()
692 dcn20_dsc_destroy(&pool->base.dscs[i]); in dcn21_resource_destruct()
695 if (pool->base.mpc != NULL) { in dcn21_resource_destruct()
696 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn21_resource_destruct()
697 pool->base.mpc = NULL; in dcn21_resource_destruct()
699 if (pool->base.hubbub != NULL) { in dcn21_resource_destruct()
700 kfree(pool->base.hubbub); in dcn21_resource_destruct()
701 pool->base.hubbub = NULL; in dcn21_resource_destruct()
703 for (i = 0; i < pool->base.pipe_count; i++) { in dcn21_resource_destruct()
704 if (pool->base.dpps[i] != NULL) in dcn21_resource_destruct()
705 dcn20_dpp_destroy(&pool->base.dpps[i]); in dcn21_resource_destruct()
707 if (pool->base.ipps[i] != NULL) in dcn21_resource_destruct()
708 pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]); in dcn21_resource_destruct()
710 if (pool->base.hubps[i] != NULL) { in dcn21_resource_destruct()
711 kfree(TO_DCN20_HUBP(pool->base.hubps[i])); in dcn21_resource_destruct()
712 pool->base.hubps[i] = NULL; in dcn21_resource_destruct()
715 if (pool->base.irqs != NULL) { in dcn21_resource_destruct()
716 dal_irq_service_destroy(&pool->base.irqs); in dcn21_resource_destruct()
720 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn21_resource_destruct()
721 if (pool->base.engines[i] != NULL) in dcn21_resource_destruct()
722 dce110_engine_destroy(&pool->base.engines[i]); in dcn21_resource_destruct()
723 if (pool->base.hw_i2cs[i] != NULL) { in dcn21_resource_destruct()
724 kfree(pool->base.hw_i2cs[i]); in dcn21_resource_destruct()
725 pool->base.hw_i2cs[i] = NULL; in dcn21_resource_destruct()
727 if (pool->base.sw_i2cs[i] != NULL) { in dcn21_resource_destruct()
728 kfree(pool->base.sw_i2cs[i]); in dcn21_resource_destruct()
729 pool->base.sw_i2cs[i] = NULL; in dcn21_resource_destruct()
733 for (i = 0; i < pool->base.res_cap->num_opp; i++) { in dcn21_resource_destruct()
734 if (pool->base.opps[i] != NULL) in dcn21_resource_destruct()
735 pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]); in dcn21_resource_destruct()
738 for (i = 0; i < pool->base.res_cap->num_timing_generator; i++) { in dcn21_resource_destruct()
739 if (pool->base.timing_generators[i] != NULL) { in dcn21_resource_destruct()
740 kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i])); in dcn21_resource_destruct()
741 pool->base.timing_generators[i] = NULL; in dcn21_resource_destruct()
745 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn21_resource_destruct()
746 if (pool->base.dwbc[i] != NULL) { in dcn21_resource_destruct()
747 kfree(TO_DCN20_DWBC(pool->base.dwbc[i])); in dcn21_resource_destruct()
748 pool->base.dwbc[i] = NULL; in dcn21_resource_destruct()
750 if (pool->base.mcif_wb[i] != NULL) { in dcn21_resource_destruct()
751 kfree(TO_DCN20_MMHUBBUB(pool->base.mcif_wb[i])); in dcn21_resource_destruct()
752 pool->base.mcif_wb[i] = NULL; in dcn21_resource_destruct()
756 for (i = 0; i < pool->base.audio_count; i++) { in dcn21_resource_destruct()
757 if (pool->base.audios[i]) in dcn21_resource_destruct()
758 dce_aud_destroy(&pool->base.audios[i]); in dcn21_resource_destruct()
761 for (i = 0; i < pool->base.clk_src_count; i++) { in dcn21_resource_destruct()
762 if (pool->base.clock_sources[i] != NULL) { in dcn21_resource_destruct()
763 dcn20_clock_source_destroy(&pool->base.clock_sources[i]); in dcn21_resource_destruct()
764 pool->base.clock_sources[i] = NULL; in dcn21_resource_destruct()
768 if (pool->base.dp_clock_source != NULL) { in dcn21_resource_destruct()
769 dcn20_clock_source_destroy(&pool->base.dp_clock_source); in dcn21_resource_destruct()
770 pool->base.dp_clock_source = NULL; in dcn21_resource_destruct()
773 if (pool->base.abm != NULL) { in dcn21_resource_destruct()
774 if (pool->base.abm->ctx->dc->config.disable_dmcu) in dcn21_resource_destruct()
775 dmub_abm_destroy(&pool->base.abm); in dcn21_resource_destruct()
777 dce_abm_destroy(&pool->base.abm); in dcn21_resource_destruct()
780 if (pool->base.dmcu != NULL) in dcn21_resource_destruct()
781 dce_dmcu_destroy(&pool->base.dmcu); in dcn21_resource_destruct()
783 if (pool->base.psr != NULL) in dcn21_resource_destruct()
784 dmub_psr_destroy(&pool->base.psr); in dcn21_resource_destruct()
786 if (pool->base.dccg != NULL) in dcn21_resource_destruct()
787 dcn_dccg_destroy(&pool->base.dccg); in dcn21_resource_destruct()
789 if (pool->base.pp_smu != NULL) in dcn21_resource_destruct()
790 dcn21_pp_smu_destroy(&pool->base.pp_smu); in dcn21_resource_destruct()
962 static void dcn21_destroy_resource_pool(struct resource_pool **pool) in dcn21_destroy_resource_pool() argument
964 struct dcn21_resource_pool *dcn21_pool = TO_DCN21_RES_POOL(*pool); in dcn21_destroy_resource_pool()
968 *pool = NULL; in dcn21_destroy_resource_pool()
1403 struct dcn21_resource_pool *pool) in dcn21_resource_construct() argument
1413 pool->base.res_cap = &res_cap_rn; in dcn21_resource_construct()
1417 pool->base.res_cap = &res_cap_rn_FPGA_4pipe; in dcn21_resource_construct()
1420 pool->base.funcs = &dcn21_res_pool_funcs; in dcn21_resource_construct()
1425 pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE; in dcn21_resource_construct()
1428 pool->base.pipe_count = pool->base.res_cap->num_timing_generator; in dcn21_resource_construct()
1494 pool->base.clock_sources[DCN20_CLK_SRC_PLL0] = in dcn21_resource_construct()
1498 pool->base.clock_sources[DCN20_CLK_SRC_PLL1] = in dcn21_resource_construct()
1502 pool->base.clock_sources[DCN20_CLK_SRC_PLL2] = in dcn21_resource_construct()
1506 pool->base.clock_sources[DCN20_CLK_SRC_PLL3] = in dcn21_resource_construct()
1510 pool->base.clock_sources[DCN20_CLK_SRC_PLL4] = in dcn21_resource_construct()
1515 pool->base.clk_src_count = DCN20_CLK_SRC_TOTAL_DCN21; in dcn21_resource_construct()
1518 pool->base.dp_clock_source = in dcn21_resource_construct()
1523 for (i = 0; i < pool->base.clk_src_count; i++) { in dcn21_resource_construct()
1524 if (pool->base.clock_sources[i] == NULL) { in dcn21_resource_construct()
1531 pool->base.dccg = dccg21_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask); in dcn21_resource_construct()
1532 if (pool->base.dccg == NULL) { in dcn21_resource_construct()
1539 pool->base.dmcu = dcn21_dmcu_create(ctx, in dcn21_resource_construct()
1543 if (pool->base.dmcu == NULL) { in dcn21_resource_construct()
1553 pool->base.psr = dmub_psr_create(ctx); in dcn21_resource_construct()
1555 if (pool->base.psr == NULL) { in dcn21_resource_construct()
1563 pool->base.abm = dmub_abm_create(ctx, in dcn21_resource_construct()
1568 pool->base.abm = dce_abm_create(ctx, in dcn21_resource_construct()
1573 pool->base.pp_smu = dcn21_pp_smu_create(ctx); in dcn21_resource_construct()
1586 pool->base.irqs = dal_irq_service_dcn21_create(&init_data); in dcn21_resource_construct()
1587 if (!pool->base.irqs) in dcn21_resource_construct()
1592 for (i = 0; i < pool->base.pipe_count; i++) { in dcn21_resource_construct()
1599 pool->base.hubps[j] = dcn21_hubp_create(ctx, i); in dcn21_resource_construct()
1600 if (pool->base.hubps[j] == NULL) { in dcn21_resource_construct()
1607 pool->base.ipps[j] = dcn21_ipp_create(ctx, i); in dcn21_resource_construct()
1608 if (pool->base.ipps[j] == NULL) { in dcn21_resource_construct()
1615 pool->base.dpps[j] = dcn21_dpp_create(ctx, i); in dcn21_resource_construct()
1616 if (pool->base.dpps[j] == NULL) { in dcn21_resource_construct()
1623 pool->base.opps[j] = dcn21_opp_create(ctx, i); in dcn21_resource_construct()
1624 if (pool->base.opps[j] == NULL) { in dcn21_resource_construct()
1631 pool->base.timing_generators[j] = dcn21_timing_generator_create( in dcn21_resource_construct()
1633 if (pool->base.timing_generators[j] == NULL) { in dcn21_resource_construct()
1641 for (i = 0; i < pool->base.res_cap->num_ddc; i++) { in dcn21_resource_construct()
1642 pool->base.engines[i] = dcn21_aux_engine_create(ctx, i); in dcn21_resource_construct()
1643 if (pool->base.engines[i] == NULL) { in dcn21_resource_construct()
1649 pool->base.hw_i2cs[i] = dcn21_i2c_hw_create(ctx, i); in dcn21_resource_construct()
1650 if (pool->base.hw_i2cs[i] == NULL) { in dcn21_resource_construct()
1656 pool->base.sw_i2cs[i] = NULL; in dcn21_resource_construct()
1659 pool->base.timing_generator_count = j; in dcn21_resource_construct()
1660 pool->base.pipe_count = j; in dcn21_resource_construct()
1661 pool->base.mpcc_count = j; in dcn21_resource_construct()
1663 pool->base.mpc = dcn21_mpc_create(ctx); in dcn21_resource_construct()
1664 if (pool->base.mpc == NULL) { in dcn21_resource_construct()
1670 pool->base.hubbub = dcn21_hubbub_create(ctx); in dcn21_resource_construct()
1671 if (pool->base.hubbub == NULL) { in dcn21_resource_construct()
1677 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_construct()
1678 pool->base.dscs[i] = dcn21_dsc_create(ctx, i); in dcn21_resource_construct()
1679 if (pool->base.dscs[i] == NULL) { in dcn21_resource_construct()
1686 if (!dcn20_dwbc_create(ctx, &pool->base)) { in dcn21_resource_construct()
1691 if (!dcn20_mmhubbub_create(ctx, &pool->base)) { in dcn21_resource_construct()
1697 if (!resource_construct(num_virtual_links, dc, &pool->base, in dcn21_resource_construct()
1703 dc->caps.max_planes = pool->base.pipe_count; in dcn21_resource_construct()
1714 dcn21_resource_destruct(pool); in dcn21_resource_construct()
1723 struct dcn21_resource_pool *pool = in dcn21_create_resource_pool() local
1726 if (!pool) in dcn21_create_resource_pool()
1729 if (dcn21_resource_construct(init_data->num_virtual_links, dc, pool)) in dcn21_create_resource_pool()
1730 return &pool->base; in dcn21_create_resource_pool()
1733 kfree(pool); in dcn21_create_resource_pool()