127 	unsigned int	(*top_read)(struct meson_dw_hdmi *dw_hdmi,
129 	void		(*top_write)(struct meson_dw_hdmi *dw_hdmi,
131 	unsigned int	(*dwc_read)(struct meson_dw_hdmi *dw_hdmi,
133 	void		(*dwc_write)(struct meson_dw_hdmi *dw_hdmi,
149 	struct dw_hdmi *hdmi;
153 static inline int dw_hdmi_is_compatible(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_is_compatible()  argument
156 	return of_device_is_compatible(dw_hdmi->dev->of_node, compat);  in dw_hdmi_is_compatible()
161 static unsigned int dw_hdmi_top_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_top_read()  argument
170 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_read()
171 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_read()
174 	data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);  in dw_hdmi_top_read()
175 	data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);  in dw_hdmi_top_read()
182 static unsigned int dw_hdmi_g12a_top_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_top_read()  argument
185 	return readl(dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));  in dw_hdmi_g12a_top_read()
188 static inline void dw_hdmi_top_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_top_write()  argument
196 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_write()
197 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_write()
200 	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);  in dw_hdmi_top_write()
205 static inline void dw_hdmi_g12a_top_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_top_write()  argument
208 	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));  in dw_hdmi_g12a_top_write()
212 static inline void dw_hdmi_top_write_bits(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_top_write_bits()  argument
217 	unsigned int data = dw_hdmi->data->top_read(dw_hdmi, addr);  in dw_hdmi_top_write_bits()
222 	dw_hdmi->data->top_write(dw_hdmi, addr, data);  in dw_hdmi_top_write_bits()
225 static unsigned int dw_hdmi_dwc_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_dwc_read()  argument
234 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_read()
235 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_read()
238 	data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);  in dw_hdmi_dwc_read()
239 	data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);  in dw_hdmi_dwc_read()
246 static unsigned int dw_hdmi_g12a_dwc_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_dwc_read()  argument
249 	return readb(dw_hdmi->hdmitx + addr);  in dw_hdmi_g12a_dwc_read()
252 static inline void dw_hdmi_dwc_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_dwc_write()  argument
260 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_write()
261 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_write()
264 	writel(data, dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);  in dw_hdmi_dwc_write()
269 static inline void dw_hdmi_g12a_dwc_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_dwc_write()  argument
272 	writeb(data, dw_hdmi->hdmitx + addr);  in dw_hdmi_g12a_dwc_write()
276 static inline void dw_hdmi_dwc_write_bits(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_dwc_write_bits()  argument
281 	unsigned int data = dw_hdmi->data->dwc_read(dw_hdmi, addr);  in dw_hdmi_dwc_write_bits()
286 	dw_hdmi->data->dwc_write(dw_hdmi, addr, data);  in dw_hdmi_dwc_write_bits()
292 static void meson_hdmi_phy_setup_mode(struct meson_dw_hdmi *dw_hdmi,  in meson_hdmi_phy_setup_mode()  argument
296 	struct meson_drm *priv = dw_hdmi->priv;  in meson_hdmi_phy_setup_mode()
302 	if (dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxl-dw-hdmi") ||  in meson_hdmi_phy_setup_mode()
303 	    dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxm-dw-hdmi")) {  in meson_hdmi_phy_setup_mode()
321 	} else if (dw_hdmi_is_compatible(dw_hdmi,  in meson_hdmi_phy_setup_mode()
336 	} else if (dw_hdmi_is_compatible(dw_hdmi,  in meson_hdmi_phy_setup_mode()
357 static inline void meson_dw_hdmi_phy_reset(struct meson_dw_hdmi *dw_hdmi)  in meson_dw_hdmi_phy_reset()  argument
359 	struct meson_drm *priv = dw_hdmi->priv;  in meson_dw_hdmi_phy_reset()
372 static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,  in dw_hdmi_phy_init()
376 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_phy_init()  local
378 	struct meson_drm *priv = dw_hdmi->priv;  in dw_hdmi_phy_init()
393 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,  in dw_hdmi_phy_init()
395 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,  in dw_hdmi_phy_init()
398 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,  in dw_hdmi_phy_init()
400 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,  in dw_hdmi_phy_init()
405 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x1);  in dw_hdmi_phy_init()
407 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x2);  in dw_hdmi_phy_init()
410 	meson_hdmi_phy_setup_mode(dw_hdmi, mode, mode_is_420);  in dw_hdmi_phy_init()
420 	meson_dw_hdmi_phy_reset(dw_hdmi);  in dw_hdmi_phy_init()
421 	meson_dw_hdmi_phy_reset(dw_hdmi);  in dw_hdmi_phy_init()
422 	meson_dw_hdmi_phy_reset(dw_hdmi);  in dw_hdmi_phy_init()
457 static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi,  in dw_hdmi_phy_disable()
460 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_phy_disable()  local
461 	struct meson_drm *priv = dw_hdmi->priv;  in dw_hdmi_phy_disable()
466 	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL1, dw_hdmi->data->cntl1_init);  in dw_hdmi_phy_disable()
467 	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, dw_hdmi->data->cntl0_init);  in dw_hdmi_phy_disable()
470 static enum drm_connector_status dw_hdmi_read_hpd(struct dw_hdmi *hdmi,  in dw_hdmi_read_hpd()
473 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_read_hpd()  local
475 	return !!dw_hdmi->data->top_read(dw_hdmi, HDMITX_TOP_STAT0) ?  in dw_hdmi_read_hpd()
479 static void dw_hdmi_setup_hpd(struct dw_hdmi *hdmi,  in dw_hdmi_setup_hpd()
482 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_setup_hpd()  local
485 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_HPD_FILTER,  in dw_hdmi_setup_hpd()
489 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,  in dw_hdmi_setup_hpd()
493 	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_INTR_MASKN,  in dw_hdmi_setup_hpd()
507 	struct meson_dw_hdmi *dw_hdmi = dev_id;  in dw_hdmi_top_irq()  local
510 	stat = dw_hdmi->data->top_read(dw_hdmi, HDMITX_TOP_INTR_STAT);  in dw_hdmi_top_irq()
511 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_INTR_STAT_CLR, stat);  in dw_hdmi_top_irq()
515 		dw_hdmi->irq_stat = stat;  in dw_hdmi_top_irq()
531 	struct meson_dw_hdmi *dw_hdmi = dev_id;  in dw_hdmi_top_thread_irq()  local
532 	u32 stat = dw_hdmi->irq_stat;  in dw_hdmi_top_thread_irq()
541 		dw_hdmi_setup_rx_sense(dw_hdmi->hdmi, hpd_connected,  in dw_hdmi_top_thread_irq()
544 		drm_helper_hpd_irq_event(dw_hdmi->bridge->dev);  in dw_hdmi_top_thread_irq()
545 		drm_bridge_hpd_notify(dw_hdmi->bridge,  in dw_hdmi_top_thread_irq()
558 	struct meson_dw_hdmi *dw_hdmi = context;  in meson_dw_hdmi_reg_read()  local
560 	*result = dw_hdmi->data->dwc_read(dw_hdmi, reg);  in meson_dw_hdmi_reg_read()
569 	struct meson_dw_hdmi *dw_hdmi = context;  in meson_dw_hdmi_reg_write()  local
571 	dw_hdmi->data->dwc_write(dw_hdmi, reg, val);  in meson_dw_hdmi_reg_write()