251 #define s6e3ha2_dcs_write_seq_static(ctx, seq...) do {	\  macro
267 	s6e3ha2_dcs_write_seq_static(ctx, 0xf0, 0x5a, 0x5a);  in s6e3ha2_test_key_on_f0()
273 	s6e3ha2_dcs_write_seq_static(ctx, 0xf0, 0xa5, 0xa5);  in s6e3ha2_test_key_off_f0()
279 	s6e3ha2_dcs_write_seq_static(ctx, 0xfc, 0x5a, 0x5a);  in s6e3ha2_test_key_on_fc()
285 	s6e3ha2_dcs_write_seq_static(ctx, 0xfc, 0xa5, 0xa5);  in s6e3ha2_test_key_off_fc()
291 	s6e3ha2_dcs_write_seq_static(ctx, 0xf2, 0x67);  in s6e3ha2_single_dsi_set()
292 	s6e3ha2_dcs_write_seq_static(ctx, 0xf9, 0x09);  in s6e3ha2_single_dsi_set()
298 	s6e3ha2_dcs_write_seq_static(ctx, 0xfd, 0x1c);  in s6e3ha2_freq_calibration()
300 		s6e3ha2_dcs_write_seq_static(ctx, 0xf2, 0x67, 0x40, 0xc5);  in s6e3ha2_freq_calibration()
301 	s6e3ha2_dcs_write_seq_static(ctx, 0xfe, 0x20, 0x39);  in s6e3ha2_freq_calibration()
302 	s6e3ha2_dcs_write_seq_static(ctx, 0xfe, 0xa0);  in s6e3ha2_freq_calibration()
303 	s6e3ha2_dcs_write_seq_static(ctx, 0xfe, 0x20);  in s6e3ha2_freq_calibration()
306 		s6e3ha2_dcs_write_seq_static(ctx, 0xce, 0x03, 0x3b, 0x12, 0x62,  in s6e3ha2_freq_calibration()
310 		s6e3ha2_dcs_write_seq_static(ctx, 0xce, 0x03, 0x3b, 0x14, 0x6d,  in s6e3ha2_freq_calibration()
319 	s6e3ha2_dcs_write_seq_static(ctx, 0xb2, 0x03, 0x10);  in s6e3ha2_aor_control()
325 	s6e3ha2_dcs_write_seq_static(ctx, 0xb6, 0x9c, 0x0a);  in s6e3ha2_caps_elvss_set()
331 	s6e3ha2_dcs_write_seq_static(ctx, 0x55, 0x00);  in s6e3ha2_acl_off()
337 	s6e3ha2_dcs_write_seq_static(ctx, 0xb5, 0x40);  in s6e3ha2_acl_off_opr()
343 	s6e3ha2_dcs_write_seq_static(ctx, 0xb0, 0x07);  in s6e3ha2_test_global()
349 	s6e3ha2_dcs_write_seq_static(ctx, 0xb8, 0x19);  in s6e3ha2_test()
355 	s6e3ha2_dcs_write_seq_static(ctx, 0xbd, 0x33, 0x11, 0x02,  in s6e3ha2_touch_hsync_on1()
362 	s6e3ha2_dcs_write_seq_static(ctx, 0xc0, 0x00, 0x00, 0xd8, 0xd8);  in s6e3ha2_pentile_control()
368 	s6e3ha2_dcs_write_seq_static(ctx, 0xb0, 0x20);  in s6e3ha2_poc_global()
374 	s6e3ha2_dcs_write_seq_static(ctx, 0xfe, 0x08);  in s6e3ha2_poc_setting()
380 	s6e3ha2_dcs_write_seq_static(ctx, 0xcc, 0x40, 0x51);  in s6e3ha2_pcd_set_off()
386 	s6e3ha2_dcs_write_seq_static(ctx, 0xed, 0x44);  in s6e3ha2_err_fg_set()
392 	s6e3ha2_dcs_write_seq_static(ctx, 0x53, 0x00);  in s6e3ha2_hbm_off()
398 	s6e3ha2_dcs_write_seq_static(ctx, 0xb9, 0x10, 0x09, 0xff, 0x00, 0x09);  in s6e3ha2_te_start_setting()
404 	s6e3ha2_dcs_write_seq_static(ctx, 0xf7, 0x03);  in s6e3ha2_gamma_update()
406 	s6e3ha2_dcs_write_seq_static(ctx, 0xf7, 0x00);  in s6e3ha2_gamma_update()