Lines Matching refs:tmp
66 uint32_t tmp; in rs400_gart_tlb_flush() local
71 tmp = RREG32_MC(RS480_GART_CACHE_CNTRL); in rs400_gart_tlb_flush()
72 if ((tmp & RS480_GART_CACHE_INVALIDATE) == 0) in rs400_gart_tlb_flush()
113 uint32_t tmp; in rs400_gart_enable() local
115 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_gart_enable()
116 tmp |= RS690_DIS_OUT_OF_PCI_GART_ACCESS; in rs400_gart_enable()
117 WREG32_MC(RS690_AIC_CTRL_SCRATCH, tmp); in rs400_gart_enable()
152 tmp = REG_SET(RS690_MC_AGP_TOP, rdev->mc.gtt_end >> 16); in rs400_gart_enable()
153 tmp |= REG_SET(RS690_MC_AGP_START, rdev->mc.gtt_start >> 16); in rs400_gart_enable()
155 WREG32_MC(RS690_MCCFG_AGP_LOCATION, tmp); in rs400_gart_enable()
156 tmp = RREG32(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS; in rs400_gart_enable()
157 WREG32(RADEON_BUS_CNTL, tmp); in rs400_gart_enable()
159 WREG32(RADEON_MC_AGP_LOCATION, tmp); in rs400_gart_enable()
160 tmp = RREG32(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS; in rs400_gart_enable()
161 WREG32(RADEON_BUS_CNTL, tmp); in rs400_gart_enable()
164 tmp = (u32)rdev->gart.table_addr & 0xfffff000; in rs400_gart_enable()
165 tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4; in rs400_gart_enable()
167 WREG32_MC(RS480_GART_BASE, tmp); in rs400_gart_enable()
179 tmp = RREG32_MC(RS480_MC_MISC_CNTL); in rs400_gart_enable()
180 tmp |= RS480_GART_INDEX_REG_EN | RS690_BLOCK_GFX_D3_EN; in rs400_gart_enable()
181 WREG32_MC(RS480_MC_MISC_CNTL, tmp); in rs400_gart_enable()
183 tmp = RREG32_MC(RS480_MC_MISC_CNTL); in rs400_gart_enable()
184 tmp |= RS480_GART_INDEX_REG_EN; in rs400_gart_enable()
185 WREG32_MC(RS480_MC_MISC_CNTL, tmp); in rs400_gart_enable()
199 uint32_t tmp; in rs400_gart_disable() local
201 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_gart_disable()
202 tmp |= RS690_DIS_OUT_OF_PCI_GART_ACCESS; in rs400_gart_disable()
203 WREG32_MC(RS690_AIC_CTRL_SCRATCH, tmp); in rs400_gart_disable()
243 uint32_t tmp; in rs400_mc_wait_for_idle() local
247 tmp = RREG32(RADEON_MC_STATUS); in rs400_mc_wait_for_idle()
248 if (tmp & RADEON_MC_IDLE) { in rs400_mc_wait_for_idle()
311 uint32_t tmp; in rs400_debugfs_gart_info_show() local
313 tmp = RREG32(RADEON_HOST_PATH_CNTL); in rs400_debugfs_gart_info_show()
314 seq_printf(m, "HOST_PATH_CNTL 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
315 tmp = RREG32(RADEON_BUS_CNTL); in rs400_debugfs_gart_info_show()
316 seq_printf(m, "BUS_CNTL 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
317 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_debugfs_gart_info_show()
318 seq_printf(m, "AIC_CTRL_SCRATCH 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
320 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE); in rs400_debugfs_gart_info_show()
321 seq_printf(m, "MCCFG_AGP_BASE 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
322 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE_2); in rs400_debugfs_gart_info_show()
323 seq_printf(m, "MCCFG_AGP_BASE_2 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
324 tmp = RREG32_MC(RS690_MCCFG_AGP_LOCATION); in rs400_debugfs_gart_info_show()
325 seq_printf(m, "MCCFG_AGP_LOCATION 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
326 tmp = RREG32_MC(RS690_MCCFG_FB_LOCATION); in rs400_debugfs_gart_info_show()
327 seq_printf(m, "MCCFG_FB_LOCATION 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
328 tmp = RREG32(RS690_HDP_FB_LOCATION); in rs400_debugfs_gart_info_show()
329 seq_printf(m, "HDP_FB_LOCATION 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
331 tmp = RREG32(RADEON_AGP_BASE); in rs400_debugfs_gart_info_show()
332 seq_printf(m, "AGP_BASE 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
333 tmp = RREG32(RS480_AGP_BASE_2); in rs400_debugfs_gart_info_show()
334 seq_printf(m, "AGP_BASE_2 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
335 tmp = RREG32(RADEON_MC_AGP_LOCATION); in rs400_debugfs_gart_info_show()
336 seq_printf(m, "MC_AGP_LOCATION 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
338 tmp = RREG32_MC(RS480_GART_BASE); in rs400_debugfs_gart_info_show()
339 seq_printf(m, "GART_BASE 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
340 tmp = RREG32_MC(RS480_GART_FEATURE_ID); in rs400_debugfs_gart_info_show()
341 seq_printf(m, "GART_FEATURE_ID 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
342 tmp = RREG32_MC(RS480_AGP_MODE_CNTL); in rs400_debugfs_gart_info_show()
343 seq_printf(m, "AGP_MODE_CONTROL 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
344 tmp = RREG32_MC(RS480_MC_MISC_CNTL); in rs400_debugfs_gart_info_show()
345 seq_printf(m, "MC_MISC_CNTL 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
346 tmp = RREG32_MC(0x5F); in rs400_debugfs_gart_info_show()
347 seq_printf(m, "MC_MISC_UMA_CNTL 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
348 tmp = RREG32_MC(RS480_AGP_ADDRESS_SPACE_SIZE); in rs400_debugfs_gart_info_show()
349 seq_printf(m, "AGP_ADDRESS_SPACE_SIZE 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
350 tmp = RREG32_MC(RS480_GART_CACHE_CNTRL); in rs400_debugfs_gart_info_show()
351 seq_printf(m, "GART_CACHE_CNTRL 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
352 tmp = RREG32_MC(0x3B); in rs400_debugfs_gart_info_show()
353 seq_printf(m, "MC_GART_ERROR_ADDRESS 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
354 tmp = RREG32_MC(0x3C); in rs400_debugfs_gart_info_show()
355 seq_printf(m, "MC_GART_ERROR_ADDRESS_HI 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
356 tmp = RREG32_MC(0x30); in rs400_debugfs_gart_info_show()
357 seq_printf(m, "GART_ERROR_0 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
358 tmp = RREG32_MC(0x31); in rs400_debugfs_gart_info_show()
359 seq_printf(m, "GART_ERROR_1 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
360 tmp = RREG32_MC(0x32); in rs400_debugfs_gart_info_show()
361 seq_printf(m, "GART_ERROR_2 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
362 tmp = RREG32_MC(0x33); in rs400_debugfs_gart_info_show()
363 seq_printf(m, "GART_ERROR_3 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
364 tmp = RREG32_MC(0x34); in rs400_debugfs_gart_info_show()
365 seq_printf(m, "GART_ERROR_4 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
366 tmp = RREG32_MC(0x35); in rs400_debugfs_gart_info_show()
367 seq_printf(m, "GART_ERROR_5 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
368 tmp = RREG32_MC(0x36); in rs400_debugfs_gart_info_show()
369 seq_printf(m, "GART_ERROR_6 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()
370 tmp = RREG32_MC(0x37); in rs400_debugfs_gart_info_show()
371 seq_printf(m, "GART_ERROR_7 0x%08x\n", tmp); in rs400_debugfs_gart_info_show()