Lines Matching refs:tmp
41 u32 tmp; in vce_v2_0_set_sw_cg() local
44 tmp = RREG32(VCE_CLOCK_GATING_B); in vce_v2_0_set_sw_cg()
45 tmp |= 0xe70000; in vce_v2_0_set_sw_cg()
46 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_sw_cg()
48 tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v2_0_set_sw_cg()
49 tmp |= 0xff000000; in vce_v2_0_set_sw_cg()
50 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v2_0_set_sw_cg()
52 tmp = RREG32(VCE_UENC_REG_CLOCK_GATING); in vce_v2_0_set_sw_cg()
53 tmp &= ~0x3fc; in vce_v2_0_set_sw_cg()
54 WREG32(VCE_UENC_REG_CLOCK_GATING, tmp); in vce_v2_0_set_sw_cg()
58 tmp = RREG32(VCE_CLOCK_GATING_B); in vce_v2_0_set_sw_cg()
59 tmp |= 0xe7; in vce_v2_0_set_sw_cg()
60 tmp &= ~0xe70000; in vce_v2_0_set_sw_cg()
61 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_sw_cg()
63 tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v2_0_set_sw_cg()
64 tmp |= 0x1fe000; in vce_v2_0_set_sw_cg()
65 tmp &= ~0xff000000; in vce_v2_0_set_sw_cg()
66 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v2_0_set_sw_cg()
68 tmp = RREG32(VCE_UENC_REG_CLOCK_GATING); in vce_v2_0_set_sw_cg()
69 tmp |= 0x3fc; in vce_v2_0_set_sw_cg()
70 WREG32(VCE_UENC_REG_CLOCK_GATING, tmp); in vce_v2_0_set_sw_cg()
76 u32 orig, tmp; in vce_v2_0_set_dyn_cg() local
78 tmp = RREG32(VCE_CLOCK_GATING_B); in vce_v2_0_set_dyn_cg()
79 tmp &= ~0x00060006; in vce_v2_0_set_dyn_cg()
81 tmp |= 0xe10000; in vce_v2_0_set_dyn_cg()
83 tmp |= 0xe1; in vce_v2_0_set_dyn_cg()
84 tmp &= ~0xe10000; in vce_v2_0_set_dyn_cg()
86 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_set_dyn_cg()
88 orig = tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v2_0_set_dyn_cg()
89 tmp &= ~0x1fe000; in vce_v2_0_set_dyn_cg()
90 tmp &= ~0xff000000; in vce_v2_0_set_dyn_cg()
91 if (tmp != orig) in vce_v2_0_set_dyn_cg()
92 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v2_0_set_dyn_cg()
94 orig = tmp = RREG32(VCE_UENC_REG_CLOCK_GATING); in vce_v2_0_set_dyn_cg()
95 tmp &= ~0x3fc; in vce_v2_0_set_dyn_cg()
96 if (tmp != orig) in vce_v2_0_set_dyn_cg()
97 WREG32(VCE_UENC_REG_CLOCK_GATING, tmp); in vce_v2_0_set_dyn_cg()
133 u32 tmp; in vce_v2_0_init_cg() local
135 tmp = RREG32(VCE_CLOCK_GATING_A); in vce_v2_0_init_cg()
136 tmp &= ~(CGC_CLK_GATE_DLY_TIMER_MASK | CGC_CLK_GATER_OFF_DLY_TIMER_MASK); in vce_v2_0_init_cg()
137 tmp |= (CGC_CLK_GATE_DLY_TIMER(0) | CGC_CLK_GATER_OFF_DLY_TIMER(4)); in vce_v2_0_init_cg()
138 tmp |= CGC_UENC_WAIT_AWAKE; in vce_v2_0_init_cg()
139 WREG32(VCE_CLOCK_GATING_A, tmp); in vce_v2_0_init_cg()
141 tmp = RREG32(VCE_UENC_CLOCK_GATING); in vce_v2_0_init_cg()
142 tmp &= ~(CLOCK_ON_DELAY_MASK | CLOCK_OFF_DELAY_MASK); in vce_v2_0_init_cg()
143 tmp |= (CLOCK_ON_DELAY(0) | CLOCK_OFF_DELAY(4)); in vce_v2_0_init_cg()
144 WREG32(VCE_UENC_CLOCK_GATING, tmp); in vce_v2_0_init_cg()
146 tmp = RREG32(VCE_CLOCK_GATING_B); in vce_v2_0_init_cg()
147 tmp |= 0x10; in vce_v2_0_init_cg()
148 tmp &= ~0x100000; in vce_v2_0_init_cg()
149 WREG32(VCE_CLOCK_GATING_B, tmp); in vce_v2_0_init_cg()