367 	unsigned int pll2;  member
1451 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_power_down()
1453 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_power_down()
1461 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_power_down()
1464 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_power_down()
2282 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2284 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2297 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2299 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2303 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2306 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2765 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2767 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2779 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2782 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2786 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2789 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
3283 	.pll2 = 0x19,
3455 	.pll2 = 0x19,
3516 	.pll2 = 0x165,
3599 	.pll2 = 0x16b,