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Lines Matching refs:au8522_writereg

178 	au8522_writereg(state, AU8522_TVDEC_SHARPNESSREG009H, 0x07);  in setup_decoder_defaults()
179 au8522_writereg(state, AU8522_TVDEC_BRIGHTNESS_REG00AH, 0xed); in setup_decoder_defaults()
180 au8522_writereg(state, AU8522_TVDEC_CONTRAST_REG00BH, 0x79); in setup_decoder_defaults()
181 au8522_writereg(state, AU8522_TVDEC_SATURATION_CB_REG00CH, 0x80); in setup_decoder_defaults()
182 au8522_writereg(state, AU8522_TVDEC_SATURATION_CR_REG00DH, 0x80); in setup_decoder_defaults()
183 au8522_writereg(state, AU8522_TVDEC_HUE_H_REG00EH, 0x00); in setup_decoder_defaults()
184 au8522_writereg(state, AU8522_TVDEC_HUE_L_REG00FH, 0x00); in setup_decoder_defaults()
187 au8522_writereg(state, AU8522_TVDEC_INT_MASK_REG010H, 0x00); in setup_decoder_defaults()
190 au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x04); in setup_decoder_defaults()
192 au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x00); in setup_decoder_defaults()
194 au8522_writereg(state, AU8522_TVDEC_PGA_REG012H, in setup_decoder_defaults()
196 au8522_writereg(state, AU8522_TVDEC_COMB_MODE_REG015H, in setup_decoder_defaults()
198 au8522_writereg(state, AU8522_TVDED_DBG_MODE_REG060H, in setup_decoder_defaults()
202 au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H, in setup_decoder_defaults()
206 au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H, in setup_decoder_defaults()
210 au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H, in setup_decoder_defaults()
214 au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H, in setup_decoder_defaults()
217 au8522_writereg(state, AU8522_TVDEC_VCR_DET_LLIM_REG063H, in setup_decoder_defaults()
219 au8522_writereg(state, AU8522_TVDEC_VCR_DET_HLIM_REG064H, in setup_decoder_defaults()
221 au8522_writereg(state, AU8522_TVDEC_COMB_VDIF_THR1_REG065H, in setup_decoder_defaults()
223 au8522_writereg(state, AU8522_TVDEC_COMB_VDIF_THR2_REG066H, in setup_decoder_defaults()
225 au8522_writereg(state, AU8522_TVDEC_COMB_VDIF_THR3_REG067H, in setup_decoder_defaults()
227 au8522_writereg(state, AU8522_TVDEC_COMB_NOTCH_THR_REG068H, in setup_decoder_defaults()
229 au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR1_REG069H, in setup_decoder_defaults()
231 au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR2_REG06AH, in setup_decoder_defaults()
233 au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH, in setup_decoder_defaults()
236 au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH, in setup_decoder_defaults()
238 au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH, in setup_decoder_defaults()
241 au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH, in setup_decoder_defaults()
243 au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH, in setup_decoder_defaults()
246 au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR3_REG06EH, in setup_decoder_defaults()
248 au8522_writereg(state, AU8522_TVDEC_UV_SEP_THR_REG06FH, in setup_decoder_defaults()
250 au8522_writereg(state, AU8522_TVDEC_COMB_DC_THR1_NTSC_REG070H, in setup_decoder_defaults()
252 au8522_writereg(state, AU8522_REG071H, AU8522_REG071H_CVBS); in setup_decoder_defaults()
253 au8522_writereg(state, AU8522_REG072H, AU8522_REG072H_CVBS); in setup_decoder_defaults()
254 au8522_writereg(state, AU8522_TVDEC_COMB_DC_THR2_NTSC_REG073H, in setup_decoder_defaults()
256 au8522_writereg(state, AU8522_REG074H, AU8522_REG074H_CVBS); in setup_decoder_defaults()
257 au8522_writereg(state, AU8522_REG075H, AU8522_REG075H_CVBS); in setup_decoder_defaults()
258 au8522_writereg(state, AU8522_TVDEC_DCAGC_CTRL_REG077H, in setup_decoder_defaults()
260 au8522_writereg(state, AU8522_TVDEC_PIC_START_ADJ_REG078H, in setup_decoder_defaults()
262 au8522_writereg(state, AU8522_TVDEC_AGC_HIGH_LIMIT_REG079H, in setup_decoder_defaults()
264 au8522_writereg(state, AU8522_TVDEC_MACROVISION_SYNC_THR_REG07AH, in setup_decoder_defaults()
266 au8522_writereg(state, AU8522_TVDEC_INTRP_CTRL_REG07BH, in setup_decoder_defaults()
268 au8522_writereg(state, AU8522_TVDEC_AGC_LOW_LIMIT_REG0E4H, in setup_decoder_defaults()
270 au8522_writereg(state, AU8522_TOREGAAGC_REG0E5H, in setup_decoder_defaults()
272 au8522_writereg(state, AU8522_REG016H, AU8522_REG016H_CVBS); in setup_decoder_defaults()
283 au8522_writereg(state, filter_coef[i].reg_name, in setup_decoder_defaults()
289 au8522_writereg(state, AU8522_REG42EH, 0x87); in setup_decoder_defaults()
290 au8522_writereg(state, AU8522_REG42FH, 0xa2); in setup_decoder_defaults()
291 au8522_writereg(state, AU8522_REG430H, 0xbf); in setup_decoder_defaults()
292 au8522_writereg(state, AU8522_REG431H, 0xcb); in setup_decoder_defaults()
293 au8522_writereg(state, AU8522_REG432H, 0xa1); in setup_decoder_defaults()
294 au8522_writereg(state, AU8522_REG433H, 0x41); in setup_decoder_defaults()
295 au8522_writereg(state, AU8522_REG434H, 0x88); in setup_decoder_defaults()
296 au8522_writereg(state, AU8522_REG435H, 0xc2); in setup_decoder_defaults()
297 au8522_writereg(state, AU8522_REG436H, 0x3c); in setup_decoder_defaults()
303 au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H, in au8522_setup_cvbs_mode()
307 au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00); in au8522_setup_cvbs_mode()
310 au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00); in au8522_setup_cvbs_mode()
312 au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); in au8522_setup_cvbs_mode()
316 au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, in au8522_setup_cvbs_mode()
324 au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H, in au8522_setup_cvbs_tuner_mode()
329 au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00); in au8522_setup_cvbs_tuner_mode()
332 au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x0e); in au8522_setup_cvbs_tuner_mode()
335 au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x10); in au8522_setup_cvbs_tuner_mode()
338 au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); in au8522_setup_cvbs_tuner_mode()
342 au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, in au8522_setup_cvbs_tuner_mode()
349 au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H, in au8522_setup_svideo_mode()
353 au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); in au8522_setup_svideo_mode()
356 au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00); in au8522_setup_svideo_mode()
359 au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00); in au8522_setup_svideo_mode()
363 au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, in au8522_setup_svideo_mode()
371 au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x00); in disable_audio_input()
372 au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x00); in disable_audio_input()
373 au8522_writereg(state, AU8522_AUDIO_VOLUME_REG0F4H, 0x00); in disable_audio_input()
375 au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H, 0x04); in disable_audio_input()
376 au8522_writereg(state, AU8522_I2S_CTRL_2_REG112H, 0x02); in disable_audio_input()
378 au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, in disable_audio_input()
405 au8522_writereg(state, lpfilter_coef[i].reg_name, in set_audio_input()
410 au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x7F); in set_audio_input()
411 au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x7F); in set_audio_input()
412 au8522_writereg(state, AU8522_AUDIO_VOLUME_REG0F4H, 0xff); in set_audio_input()
415 au8522_writereg(state, AU8522_REG0F9H, AU8522_REG0F9H_AUDIO); in set_audio_input()
418 au8522_writereg(state, AU8522_AUDIO_MODE_REG0F1H, 0x82); in set_audio_input()
422 au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, 0x9d); in set_audio_input()
425 au8522_writereg(state, AU8522_AUDIOFREQ_REG606H, 0x03); in set_audio_input()
428 au8522_writereg(state, AU8522_I2S_CTRL_2_REG112H, 0xc2); in set_audio_input()
431 au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H, 0x09); in set_audio_input()
443 au8522_writereg(state, AU8522_TVDEC_BRIGHTNESS_REG00AH, in au8522_s_ctrl()
447 au8522_writereg(state, AU8522_TVDEC_CONTRAST_REG00BH, in au8522_s_ctrl()
451 au8522_writereg(state, AU8522_TVDEC_SATURATION_CB_REG00CH, in au8522_s_ctrl()
453 au8522_writereg(state, AU8522_TVDEC_SATURATION_CR_REG00DH, in au8522_s_ctrl()
457 au8522_writereg(state, AU8522_TVDEC_HUE_H_REG00EH, in au8522_s_ctrl()
459 au8522_writereg(state, AU8522_TVDEC_HUE_L_REG00FH, in au8522_s_ctrl()
486 au8522_writereg(state, reg->reg, reg->val & 0xff); in au8522_s_register()
495 au8522_writereg(state, 0xa4, 1 << 5); in au8522_video_set()
542 au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, in au8522_s_stream()
553 au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, in au8522_s_stream()
755 au8522_writereg(state, 0x106, 1); in au8522_probe()