65 static u8 s5h1420_readreg(struct s5h1420_state *state, u8 reg)  in s5h1420_readreg()  function
123 				 (s5h1420_readreg(state, 0x3c) & 0xfe) | 0x02);  in s5h1420_set_voltage()
127 		s5h1420_writereg(state, 0x3c, s5h1420_readreg(state, 0x3c) | 0x03);  in s5h1420_set_voltage()
131 		s5h1420_writereg(state, 0x3c, s5h1420_readreg(state, 0x3c) & 0xfd);  in s5h1420_set_voltage()
148 				 (s5h1420_readreg(state, 0x3b) & 0x74) | 0x08);  in s5h1420_set_tone()
153 				 (s5h1420_readreg(state, 0x3b) & 0x74) | 0x01);  in s5h1420_set_tone()
175 	val = s5h1420_readreg(state, 0x3b);  in s5h1420_send_master_cmd()
185 	s5h1420_writereg(state, 0x3b, s5h1420_readreg(state, 0x3b) |  in s5h1420_send_master_cmd()
191 		if (!(s5h1420_readreg(state, 0x3b) & 0x08))  in s5h1420_send_master_cmd()
217 	val = s5h1420_readreg(state, 0x3b);  in s5h1420_recv_slave_reply()
224 		if (!(s5h1420_readreg(state, 0x3b) & 0x80)) /* FIXME: do we test DIS_RDY(0x08) or RCV_EN(0x80)? */  in s5h1420_recv_slave_reply()
236 	if (s5h1420_readreg(state, 0x49)) {  in s5h1420_recv_slave_reply()
242 	length = (s5h1420_readreg(state, 0x3b) & 0x70) >> 4;  in s5h1420_recv_slave_reply()
251 		reply->msg[i] = s5h1420_readreg(state, 0x3d + i);  in s5h1420_recv_slave_reply()
270 	val = s5h1420_readreg(state, 0x3b);  in s5h1420_send_burst()
271 	s5h1420_writereg(state, 0x3b, (s5h1420_readreg(state, 0x3b) & 0x70) | 0x01);  in s5h1420_send_burst()
275 		s5h1420_writereg(state, 0x3b, s5h1420_readreg(state, 0x3b) | 0x04);  in s5h1420_send_burst()
280 	s5h1420_writereg(state, 0x3b, s5h1420_readreg(state, 0x3b) | 0x08);  in s5h1420_send_burst()
285 		if (!(s5h1420_readreg(state, 0x3b) & 0x08))  in s5h1420_send_burst()
304 	val = s5h1420_readreg(state, 0x14);  in s5h1420_get_status_bits()
309 	val = s5h1420_readreg(state, 0x36);  in s5h1420_get_status_bits()
337 		val = s5h1420_readreg(state, Vit10);  in s5h1420_read_status()
355 		switch (s5h1420_readreg(state, Vit10) & 0x07) {  in s5h1420_read_status()
395 		val = s5h1420_readreg(state, Mpeg02);  in s5h1420_read_status()
399 		val = s5h1420_readreg(state, QPSK01) & 0x7f;  in s5h1420_read_status()
428 	*ber = (s5h1420_readreg(state, 0x48) << 8) | s5h1420_readreg(state, 0x47);  in s5h1420_read_ber()
437 	u8 val = s5h1420_readreg(state, 0x15);  in s5h1420_read_signal_strength()
451 	*ucblocks = (s5h1420_readreg(state, 0x48) << 8) | s5h1420_readreg(state, 0x47);  in s5h1420_read_ucblocks()
479 	v = s5h1420_readreg(state, Loop01);  in s5h1420_setsymbolrate()
506 	v = s5h1420_readreg(state, Loop01);  in s5h1420_setfreqoffset()
519 	s5h1420_writereg(state, 0x06, s5h1420_readreg(state, 0x06) | 0x08);  in s5h1420_getfreqoffset()
520 	val  = s5h1420_readreg(state, 0x0e) << 16;  in s5h1420_getfreqoffset()
521 	val |= s5h1420_readreg(state, 0x0f) << 8;  in s5h1420_getfreqoffset()
522 	val |= s5h1420_readreg(state, 0x10);  in s5h1420_getfreqoffset()
523 	s5h1420_writereg(state, 0x06, s5h1420_readreg(state, 0x06) & 0xf7);  in s5h1420_getfreqoffset()
596 	switch(s5h1420_readreg(state, 0x32) & 0x07) {  in s5h1420_getfec()
622 	if (s5h1420_readreg(state, 0x32) & 0x08)  in s5h1420_getinversion()
734 	s5h1420_writereg(state, QPSK01, s5h1420_readreg(state, QPSK01) | 1);  in s5h1420_set_frontend()
891 	i = s5h1420_readreg(state, ID01);  in s5h1420_attach()
898 		state->shadow[i] = s5h1420_readreg(state, i);  in s5h1420_attach()