Lines Matching refs:btwrite
3202 btwrite(0x000000, BT848_GPIO_REG_INP); in init_lmlbt4x()
3282 btwrite((1<<7), 0x058); in bttv_reset_audio()
3284 btwrite( 0, 0x058); in bttv_reset_audio()
4163 btwrite(BT848_ADC_RESERVED|BT848_ADC_AGC_EN, BT848_ADC); in init_PXC200()
4180 btwrite(val, BT848_GPIO_DMA_CTL); in init_PXC200()
4241 btwrite (0x00c3feff, BT848_GPIO_OUT_EN); in init_RTV24()
4243 btwrite (0 + watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4245 btwrite (0x10 + watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4247 btwrite (0 + watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4256 btwrite (0x4400 + watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4258 btwrite (0x4410 + watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4260 btwrite (watchdog_value, BT848_GPIO_DATA); in init_RTV24()
4310 btwrite(0x080002, BT848_GPIO_OUT_EN); in init_PCI8604PW()
4322 btwrite(0x080000, BT848_GPIO_DATA); in init_PCI8604PW()
4324 btwrite(0x000000, BT848_GPIO_DATA); in init_PCI8604PW()
4581 btwrite (0x08<<16,BT848_GPIO_DATA);/*GPIO[19] [==> 4053 B+C] set to 1 */ in picolo_tetra_init()
4582 btwrite (0x04<<16,BT848_GPIO_DATA);/*GPIO[18] [==> 4053 A] set to 1*/ in picolo_tetra_init()
4590 btwrite (input<<20,BT848_GPIO_DATA); in picolo_tetra_muxsel()
4717 btwrite(bitmask, BT848_GPIO_OUT_EN); in PXC200_muxsel()
4724 btwrite(bitmask,BT848_GPIO_DATA); in PXC200_muxsel()