Lines Matching refs:XGMAC_SET_BITS
404 XGMAC_SET_BITS(pdata->rss_table[i], MAC_RSSDR, DMCH, table[i]); in xgbe_set_rss_lookup_table()
552 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 0); in xgbe_disable_tx_flow_control()
596 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 1); in xgbe_enable_tx_flow_control()
598 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, PT, 0xffff); in xgbe_enable_tx_flow_control()
685 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, NIE20, 1); in xgbe_enable_dma_interrupts()
686 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, AIE20, 1); in xgbe_enable_dma_interrupts()
688 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, NIE, 1); in xgbe_enable_dma_interrupts()
689 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, AIE, 1); in xgbe_enable_dma_interrupts()
691 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, FBEE, 1); in xgbe_enable_dma_interrupts()
700 XGMAC_SET_BITS(channel->curr_ier, in xgbe_enable_dma_interrupts()
710 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RBUE, 1); in xgbe_enable_dma_interrupts()
712 XGMAC_SET_BITS(channel->curr_ier, in xgbe_enable_dma_interrupts()
741 XGMAC_SET_BITS(mac_ier, MAC_IER, TSIE, 1); in xgbe_enable_mac_interrupts()
1006 XGMAC_SET_BITS(mac_addr_hi, MAC_MACA1HR, AE, 1); in xgbe_set_mac_reg()
1302 XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, RA, reg); in xgbe_create_mdio_sca_c22()
1303 XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, PA, port); in xgbe_create_mdio_sca_c22()
1313 XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, RA, reg); in xgbe_create_mdio_sca_c45()
1314 XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, PA, port); in xgbe_create_mdio_sca_c45()
1315 XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, DA, da); in xgbe_create_mdio_sca_c45()
1330 XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, DATA, val); in xgbe_write_ext_mii_regs()
1331 XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, CMD, 1); in xgbe_write_ext_mii_regs()
1332 XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, BUSY, 1); in xgbe_write_ext_mii_regs()
1373 XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, CMD, 3); in xgbe_read_ext_mii_regs()
1374 XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, BUSY, 1); in xgbe_read_ext_mii_regs()
1661 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_get_rx_tstamp()
1671 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1); in xgbe_config_tstamp()
1674 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1); in xgbe_config_tstamp()
1677 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1); in xgbe_config_tstamp()
1990 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1992 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
1998 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, CONTEXT, 0); in xgbe_dev_read()
2002 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2007 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2014 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2020 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2043 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2051 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2053 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2059 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2067 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2082 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2095 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2097 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2101 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2103 XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, in xgbe_dev_read()
2107 XGMAC_SET_BITS(packet->errors, RX_PACKET_ERRORS, in xgbe_dev_read()
2138 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 1); in xgbe_enable_int()
2141 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TXSE, 1); in xgbe_enable_int()
2144 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TBUE, 1); in xgbe_enable_int()
2147 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 1); in xgbe_enable_int()
2150 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RBUE, 1); in xgbe_enable_int()
2153 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RSE, 1); in xgbe_enable_int()
2156 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 1); in xgbe_enable_int()
2157 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 1); in xgbe_enable_int()
2160 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, FBEE, 1); in xgbe_enable_int()
2179 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 0); in xgbe_disable_int()
2182 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TXSE, 0); in xgbe_disable_int()
2185 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TBUE, 0); in xgbe_disable_int()
2188 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 0); in xgbe_disable_int()
2191 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RBUE, 0); in xgbe_disable_int()
2194 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RSE, 0); in xgbe_disable_int()
2197 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 0); in xgbe_disable_int()
2198 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 0); in xgbe_disable_int()
2201 XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, FBEE, 0); in xgbe_disable_int()
2283 XGMAC_SET_BITS(sbmr, DMA_SBMR, EAME, 1); in xgbe_config_dma_bus()
2286 XGMAC_SET_BITS(sbmr, DMA_SBMR, UNDEF, 1); in xgbe_config_dma_bus()
2287 XGMAC_SET_BITS(sbmr, DMA_SBMR, BLEN, pdata->blen >> 2); in xgbe_config_dma_bus()
2288 XGMAC_SET_BITS(sbmr, DMA_SBMR, AAL, pdata->aal); in xgbe_config_dma_bus()
2289 XGMAC_SET_BITS(sbmr, DMA_SBMR, RD_OSR_LMT, pdata->rd_osr_limit - 1); in xgbe_config_dma_bus()
2290 XGMAC_SET_BITS(sbmr, DMA_SBMR, WR_OSR_LMT, pdata->wr_osr_limit - 1); in xgbe_config_dma_bus()