33 					     struct link_params *params,
215 static int bnx2x_check_half_open_conn(struct link_params *params,
218 				      struct link_params *params);
246 static int bnx2x_check_lfa(struct link_params *params)  in bnx2x_check_lfa()  argument
251 	struct bnx2x *bp = params->bp;  in bnx2x_check_lfa()
254 		REG_RD(bp, params->lfa_base +  in bnx2x_check_lfa()
262 		REG_WR(bp, params->lfa_base +  in bnx2x_check_lfa()
269 	link_status = REG_RD(bp, params->shmem_base +  in bnx2x_check_lfa()
271 				      port_mb[params->port].link_status));  in bnx2x_check_lfa()
278 	if (params->feature_config_flags & FEATURE_CONFIG_BOOT_FROM_SAN)  in bnx2x_check_lfa()
282 	if (params->loopback_mode)  in bnx2x_check_lfa()
286 	if (!params->lfa_base)  in bnx2x_check_lfa()
289 	if (params->num_phys == 3) {  in bnx2x_check_lfa()
298 	saved_val = REG_RD(bp, params->lfa_base +  in bnx2x_check_lfa()
300 	req_val = params->req_duplex[0] | (params->req_duplex[1] << 16);  in bnx2x_check_lfa()
307 	saved_val = REG_RD(bp, params->lfa_base +  in bnx2x_check_lfa()
309 	req_val = params->req_flow_ctrl[0] | (params->req_flow_ctrl[1] << 16);  in bnx2x_check_lfa()
316 	saved_val = REG_RD(bp, params->lfa_base +  in bnx2x_check_lfa()
318 	req_val = params->req_line_speed[0] | (params->req_line_speed[1] << 16);  in bnx2x_check_lfa()
326 		cur_speed_cap_mask = REG_RD(bp, params->lfa_base +  in bnx2x_check_lfa()
330 		if (cur_speed_cap_mask != params->speed_cap_mask[cfg_idx]) {  in bnx2x_check_lfa()
333 				       params->speed_cap_mask[cfg_idx]);  in bnx2x_check_lfa()
339 		REG_RD(bp, params->lfa_base +  in bnx2x_check_lfa()
343 	if ((u16)cur_req_fc_auto_adv != params->req_fc_auto_adv) {  in bnx2x_check_lfa()
345 			       cur_req_fc_auto_adv, params->req_fc_auto_adv);  in bnx2x_check_lfa()
349 	eee_status = REG_RD(bp, params->shmem2_base +  in bnx2x_check_lfa()
351 				     eee_status[params->port]));  in bnx2x_check_lfa()
354 	     (params->eee_mode & EEE_MODE_ENABLE_LPI)) ||  in bnx2x_check_lfa()
356 	     (params->eee_mode & EEE_MODE_ADV_LPI))) {  in bnx2x_check_lfa()
357 		DP(NETIF_MSG_LINK, "EEE mismatch %x vs. %x\n", params->eee_mode,  in bnx2x_check_lfa()
440 static void bnx2x_ets_e2e3a0_disabled(struct link_params *params)  in bnx2x_ets_e2e3a0_disabled()  argument
443 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e2e3a0_disabled()
531 	const struct link_params *params,  in bnx2x_ets_e3b0_set_credit_upper_bound_nig()  argument
534 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e3b0_set_credit_upper_bound_nig()
535 	const u8 port = params->port;  in bnx2x_ets_e3b0_set_credit_upper_bound_nig()
569 static void bnx2x_ets_e3b0_nig_disabled(const struct link_params *params,  in bnx2x_ets_e3b0_nig_disabled()  argument
572 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e3b0_nig_disabled()
573 	const u8 port = params->port;  in bnx2x_ets_e3b0_nig_disabled()
645 	bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val);  in bnx2x_ets_e3b0_nig_disabled()
653 	const struct link_params *params,  in bnx2x_ets_e3b0_set_credit_upper_bound_pbf()  argument
656 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e3b0_set_credit_upper_bound_pbf()
659 	const u8 port = params->port;  in bnx2x_ets_e3b0_set_credit_upper_bound_pbf()
686 static void bnx2x_ets_e3b0_pbf_disabled(const struct link_params *params)  in bnx2x_ets_e3b0_pbf_disabled()  argument
688 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e3b0_pbf_disabled()
689 	const u8 port = params->port;  in bnx2x_ets_e3b0_pbf_disabled()
737 	bnx2x_ets_e3b0_set_credit_upper_bound_pbf(params, min_w_val_pbf);  in bnx2x_ets_e3b0_pbf_disabled()
744 static int bnx2x_ets_e3b0_disabled(const struct link_params *params,  in bnx2x_ets_e3b0_disabled()  argument
747 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e3b0_disabled()
755 	bnx2x_ets_e3b0_nig_disabled(params, vars);  in bnx2x_ets_e3b0_disabled()
757 	bnx2x_ets_e3b0_pbf_disabled(params);  in bnx2x_ets_e3b0_disabled()
767 int bnx2x_ets_disabled(struct link_params *params,  in bnx2x_ets_disabled()  argument
770 	struct bnx2x *bp = params->bp;  in bnx2x_ets_disabled()
774 		bnx2x_ets_e2e3a0_disabled(params);  in bnx2x_ets_disabled()
776 		bnx2x_status = bnx2x_ets_e3b0_disabled(params, vars);  in bnx2x_ets_disabled()
790 static int bnx2x_ets_e3b0_cli_map(const struct link_params *params,  in bnx2x_ets_e3b0_cli_map()  argument
795 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e3b0_cli_map()
796 	const u8 port = params->port;  in bnx2x_ets_e3b0_cli_map()
893 	const struct link_params *params,  in bnx2x_ets_e3b0_get_total_bw()  argument
897 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e3b0_get_total_bw()
906 			if (!ets_params->cos[cos_idx].params.bw_params.bw) {  in bnx2x_ets_e3b0_get_total_bw()
912 				ets_params->cos[cos_idx].params.bw_params.bw  in bnx2x_ets_e3b0_get_total_bw()
916 				ets_params->cos[cos_idx].params.bw_params.bw;  in bnx2x_ets_e3b0_get_total_bw()
953 static int bnx2x_ets_e3b0_sp_pri_to_cos_set(const struct link_params *params,  in bnx2x_ets_e3b0_sp_pri_to_cos_set()  argument
957 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e3b0_sp_pri_to_cos_set()
958 	const u8 port = params->port;  in bnx2x_ets_e3b0_sp_pri_to_cos_set()
1035 static int bnx2x_ets_e3b0_sp_set_pri_cli_reg(const struct link_params *params,  in bnx2x_ets_e3b0_sp_set_pri_cli_reg()  argument
1038 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e3b0_sp_set_pri_cli_reg()
1040 	const u8 port = params->port;  in bnx2x_ets_e3b0_sp_set_pri_cli_reg()
1128 int bnx2x_ets_e3b0_config(const struct link_params *params,  in bnx2x_ets_e3b0_config()  argument
1132 	struct bnx2x *bp = params->bp;  in bnx2x_ets_e3b0_config()
1134 	const u8 port = params->port;  in bnx2x_ets_e3b0_config()
1161 	bnx2x_status = bnx2x_ets_e3b0_get_total_bw(params, ets_params,  in bnx2x_ets_e3b0_config()
1172 	bnx2x_ets_e3b0_set_credit_upper_bound_nig(params, min_w_val_nig);  in bnx2x_ets_e3b0_config()
1173 	bnx2x_ets_e3b0_set_credit_upper_bound_pbf(params, min_w_val_pbf);  in bnx2x_ets_e3b0_config()
1185 				ets_params->cos[cos_entry].params.bw_params.bw,  in bnx2x_ets_e3b0_config()
1192 				params,  in bnx2x_ets_e3b0_config()
1194 				ets_params->cos[cos_entry].params.sp_params.pri,  in bnx2x_ets_e3b0_config()
1210 	bnx2x_status = bnx2x_ets_e3b0_sp_set_pri_cli_reg(params,  in bnx2x_ets_e3b0_config()
1220 	bnx2x_status = bnx2x_ets_e3b0_cli_map(params, ets_params,  in bnx2x_ets_e3b0_config()
1230 static void bnx2x_ets_bw_limit_common(const struct link_params *params)  in bnx2x_ets_bw_limit_common()  argument
1233 	struct bnx2x *bp = params->bp;  in bnx2x_ets_bw_limit_common()
1274 void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw,  in bnx2x_ets_bw_limit()  argument
1278 	struct bnx2x *bp = params->bp;  in bnx2x_ets_bw_limit()
1297 	bnx2x_ets_bw_limit_common(params);  in bnx2x_ets_bw_limit()
1306 int bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)  in bnx2x_ets_strict()  argument
1309 	struct bnx2x *bp = params->bp;  in bnx2x_ets_strict()
1349 static void bnx2x_update_pfc_xmac(struct link_params *params,  in bnx2x_update_pfc_xmac()  argument
1353 	struct bnx2x *bp = params->bp;  in bnx2x_update_pfc_xmac()
1358 	xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in bnx2x_update_pfc_xmac()
1366 	if (!(params->feature_config_flags &  in bnx2x_update_pfc_xmac()
1399 	       ((params->mac_addr[2] << 24) |  in bnx2x_update_pfc_xmac()
1400 		(params->mac_addr[3] << 16) |  in bnx2x_update_pfc_xmac()
1401 		(params->mac_addr[4] << 8) |  in bnx2x_update_pfc_xmac()
1402 		(params->mac_addr[5])));  in bnx2x_update_pfc_xmac()
1404 	       ((params->mac_addr[0] << 8) |  in bnx2x_update_pfc_xmac()
1405 		(params->mac_addr[1])));  in bnx2x_update_pfc_xmac()
1444 					struct link_params *params)  in bnx2x_set_mdio_emac_per_phy()  argument
1448 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in bnx2x_set_mdio_emac_per_phy()
1450 		bnx2x_set_mdio_clk(bp, params->chip_id,  in bnx2x_set_mdio_emac_per_phy()
1451 				   params->phy[phy_index].mdio_ctrl);  in bnx2x_set_mdio_emac_per_phy()
1467 static void bnx2x_emac_init(struct link_params *params,  in bnx2x_emac_init()  argument
1471 	struct bnx2x *bp = params->bp;  in bnx2x_emac_init()
1472 	u8 port = params->port;  in bnx2x_emac_init()
1499 	bnx2x_set_mdio_emac_per_phy(bp, params);  in bnx2x_emac_init()
1501 	val = ((params->mac_addr[0] << 8) |  in bnx2x_emac_init()
1502 		params->mac_addr[1]);  in bnx2x_emac_init()
1505 	val = ((params->mac_addr[2] << 24) |  in bnx2x_emac_init()
1506 	       (params->mac_addr[3] << 16) |  in bnx2x_emac_init()
1507 	       (params->mac_addr[4] << 8) |  in bnx2x_emac_init()
1508 		params->mac_addr[5]);  in bnx2x_emac_init()
1512 static void bnx2x_set_xumac_nig(struct link_params *params,  in bnx2x_set_xumac_nig()  argument
1516 	struct bnx2x *bp = params->bp;  in bnx2x_set_xumac_nig()
1518 	REG_WR(bp, params->port ? NIG_REG_P1_MAC_IN_EN : NIG_REG_P0_MAC_IN_EN,  in bnx2x_set_xumac_nig()
1520 	REG_WR(bp, params->port ? NIG_REG_P1_MAC_OUT_EN : NIG_REG_P0_MAC_OUT_EN,  in bnx2x_set_xumac_nig()
1522 	REG_WR(bp, params->port ? NIG_REG_P1_MAC_PAUSE_OUT_EN :  in bnx2x_set_xumac_nig()
1526 static void bnx2x_set_umac_rxtx(struct link_params *params, u8 en)  in bnx2x_set_umac_rxtx()  argument
1528 	u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0;  in bnx2x_set_umac_rxtx()
1530 	struct bnx2x *bp = params->bp;  in bnx2x_set_umac_rxtx()
1532 		   (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port)))  in bnx2x_set_umac_rxtx()
1545 static void bnx2x_umac_enable(struct link_params *params,  in bnx2x_umac_enable()  argument
1549 	u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0;  in bnx2x_umac_enable()
1550 	struct bnx2x *bp = params->bp;  in bnx2x_umac_enable()
1553 	       (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port));  in bnx2x_umac_enable()
1557 	       (MISC_REGISTERS_RESET_REG_2_UMAC0 << params->port));  in bnx2x_umac_enable()
1562 	REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1);  in bnx2x_umac_enable()
1610 	       ((params->mac_addr[2] << 24) |  in bnx2x_umac_enable()
1611 		(params->mac_addr[3] << 16) |  in bnx2x_umac_enable()
1612 		(params->mac_addr[4] << 8) |  in bnx2x_umac_enable()
1613 		(params->mac_addr[5])));  in bnx2x_umac_enable()
1615 	       ((params->mac_addr[0] << 8) |  in bnx2x_umac_enable()
1616 		(params->mac_addr[1])));  in bnx2x_umac_enable()
1637 	bnx2x_set_xumac_nig(params,  in bnx2x_umac_enable()
1644 static void bnx2x_xmac_init(struct link_params *params, u32 max_speed)  in bnx2x_xmac_init()  argument
1646 	struct bnx2x *bp = params->bp;  in bnx2x_xmac_init()
1706 static void bnx2x_set_xmac_rxtx(struct link_params *params, u8 en)  in bnx2x_set_xmac_rxtx()  argument
1708 	u8 port = params->port;  in bnx2x_set_xmac_rxtx()
1709 	struct bnx2x *bp = params->bp;  in bnx2x_set_xmac_rxtx()
1734 static int bnx2x_xmac_enable(struct link_params *params,  in bnx2x_xmac_enable()  argument
1738 	struct bnx2x *bp = params->bp;  in bnx2x_xmac_enable()
1741 	xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in bnx2x_xmac_enable()
1743 	bnx2x_xmac_init(params, vars->line_speed);  in bnx2x_xmac_enable()
1752 	REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 0);  in bnx2x_xmac_enable()
1757 	if (!(params->phy[INT_PHY].flags & FLAGS_TX_ERROR_CHECK)) {  in bnx2x_xmac_enable()
1773 	bnx2x_update_pfc_xmac(params, vars, 0);  in bnx2x_xmac_enable()
1788 	    (params->phy[INT_PHY].supported &  in bnx2x_xmac_enable()
1796 	bnx2x_set_xumac_nig(params,  in bnx2x_xmac_enable()
1804 static int bnx2x_emac_enable(struct link_params *params,  in bnx2x_emac_enable()  argument
1807 	struct bnx2x *bp = params->bp;  in bnx2x_emac_enable()
1808 	u8 port = params->port;  in bnx2x_emac_enable()
1823 		u32 ser_lane = ((params->lane_config &  in bnx2x_emac_enable()
1851 	if (!(params->feature_config_flags &  in bnx2x_emac_enable()
1879 	if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) {  in bnx2x_emac_enable()
1923 	if ((params->feature_config_flags &  in bnx2x_emac_enable()
1937 static void bnx2x_update_pfc_bmac1(struct link_params *params,  in bnx2x_update_pfc_bmac1()  argument
1941 	struct bnx2x *bp = params->bp;  in bnx2x_update_pfc_bmac1()
1942 	u32 bmac_addr =  params->port ? NIG_REG_INGRESS_BMAC1_MEM :  in bnx2x_update_pfc_bmac1()
1946 	if ((!(params->feature_config_flags &  in bnx2x_update_pfc_bmac1()
1957 	if (!(params->feature_config_flags &  in bnx2x_update_pfc_bmac1()
1966 static void bnx2x_update_pfc_bmac2(struct link_params *params,  in bnx2x_update_pfc_bmac2()  argument
1974 	struct bnx2x *bp = params->bp;  in bnx2x_update_pfc_bmac2()
1975 	u32 bmac_addr = params->port ? NIG_REG_INGRESS_BMAC1_MEM :  in bnx2x_update_pfc_bmac2()
1979 	if ((!(params->feature_config_flags &  in bnx2x_update_pfc_bmac2()
1991 	if (!(params->feature_config_flags &  in bnx2x_update_pfc_bmac2()
1999 	if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) {  in bnx2x_update_pfc_bmac2()
2028 	if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED)  in bnx2x_update_pfc_bmac2()
2043 	if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED)  in bnx2x_update_pfc_bmac2()
2099 static void bnx2x_update_mng(struct link_params *params, u32 link_status)  in bnx2x_update_mng()  argument
2101 	struct bnx2x *bp = params->bp;  in bnx2x_update_mng()
2103 	REG_WR(bp, params->shmem_base +  in bnx2x_update_mng()
2105 			port_mb[params->port].link_status), link_status);  in bnx2x_update_mng()
2108 static void bnx2x_update_link_attr(struct link_params *params, u32 link_attr)  in bnx2x_update_link_attr()  argument
2110 	struct bnx2x *bp = params->bp;  in bnx2x_update_link_attr()
2113 		REG_WR(bp, params->shmem2_base +  in bnx2x_update_link_attr()
2115 				link_attr_sync[params->port]), link_attr);  in bnx2x_update_link_attr()
2118 static void bnx2x_update_pfc_nig(struct link_params *params,  in bnx2x_update_pfc_nig()  argument
2125 	struct bnx2x *bp = params->bp;  in bnx2x_update_pfc_nig()
2126 	u8 port = params->port;  in bnx2x_update_pfc_nig()
2128 	int set_pfc = params->feature_config_flags &  in bnx2x_update_pfc_nig()
2214 int bnx2x_update_pfc(struct link_params *params,  in bnx2x_update_pfc()  argument
2223 	struct bnx2x *bp = params->bp;  in bnx2x_update_pfc()
2224 	u8 bmac_loopback = (params->loopback_mode == LOOPBACK_BMAC);  in bnx2x_update_pfc()
2226 	if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED)  in bnx2x_update_pfc()
2231 	bnx2x_update_mng(params, vars->link_status);  in bnx2x_update_pfc()
2234 	bnx2x_update_pfc_nig(params, vars, pfc_params);  in bnx2x_update_pfc()
2243 			bnx2x_update_pfc_xmac(params, vars, 0);  in bnx2x_update_pfc()
2247 		     (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port))  in bnx2x_update_pfc()
2250 			bnx2x_emac_enable(params, vars, 0);  in bnx2x_update_pfc()
2254 			bnx2x_update_pfc_bmac2(params, vars, bmac_loopback);  in bnx2x_update_pfc()
2256 			bnx2x_update_pfc_bmac1(params, vars);  in bnx2x_update_pfc()
2259 		if ((params->feature_config_flags &  in bnx2x_update_pfc()
2263 		REG_WR(bp, NIG_REG_BMAC0_PAUSE_OUT_EN + params->port*4, val);  in bnx2x_update_pfc()
2268 static int bnx2x_bmac1_enable(struct link_params *params,  in bnx2x_bmac1_enable()  argument
2272 	struct bnx2x *bp = params->bp;  in bnx2x_bmac1_enable()
2273 	u8 port = params->port;  in bnx2x_bmac1_enable()
2288 	wb_data[0] = ((params->mac_addr[2] << 24) |  in bnx2x_bmac1_enable()
2289 		       (params->mac_addr[3] << 16) |  in bnx2x_bmac1_enable()
2290 		       (params->mac_addr[4] << 8) |  in bnx2x_bmac1_enable()
2291 			params->mac_addr[5]);  in bnx2x_bmac1_enable()
2292 	wb_data[1] = ((params->mac_addr[0] << 8) |  in bnx2x_bmac1_enable()
2293 			params->mac_addr[1]);  in bnx2x_bmac1_enable()
2311 	bnx2x_update_pfc_bmac1(params, vars);  in bnx2x_bmac1_enable()
2332 static int bnx2x_bmac2_enable(struct link_params *params,  in bnx2x_bmac2_enable()  argument
2336 	struct bnx2x *bp = params->bp;  in bnx2x_bmac2_enable()
2337 	u8 port = params->port;  in bnx2x_bmac2_enable()
2358 	wb_data[0] = ((params->mac_addr[2] << 24) |  in bnx2x_bmac2_enable()
2359 		       (params->mac_addr[3] << 16) |  in bnx2x_bmac2_enable()
2360 		       (params->mac_addr[4] << 8) |  in bnx2x_bmac2_enable()
2361 			params->mac_addr[5]);  in bnx2x_bmac2_enable()
2362 	wb_data[1] = ((params->mac_addr[0] << 8) |  in bnx2x_bmac2_enable()
2363 			params->mac_addr[1]);  in bnx2x_bmac2_enable()
2392 	bnx2x_update_pfc_bmac2(params, vars, is_lb);  in bnx2x_bmac2_enable()
2397 static int bnx2x_bmac_enable(struct link_params *params,  in bnx2x_bmac_enable()  argument
2402 	u8 port = params->port;  in bnx2x_bmac_enable()
2403 	struct bnx2x *bp = params->bp;  in bnx2x_bmac_enable()
2420 		rc = bnx2x_bmac2_enable(params, vars, is_lb);  in bnx2x_bmac_enable()
2422 		rc = bnx2x_bmac1_enable(params, vars, is_lb);  in bnx2x_bmac_enable()
2427 	if ((params->feature_config_flags &  in bnx2x_bmac_enable()
2468 static int bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl,  in bnx2x_pbf_update()  argument
2471 	struct bnx2x *bp = params->bp;  in bnx2x_pbf_update()
2472 	u8 port = params->port;  in bnx2x_pbf_update()
2816 static u8 bnx2x_eee_has_cap(struct link_params *params)  in bnx2x_eee_has_cap()  argument
2818 	struct bnx2x *bp = params->bp;  in bnx2x_eee_has_cap()
2820 	if (REG_RD(bp, params->shmem2_base) <=  in bnx2x_eee_has_cap()
2821 		   offsetof(struct shmem2_region, eee_status[params->port]))  in bnx2x_eee_has_cap()
2867 static u32 bnx2x_eee_calc_timer(struct link_params *params)  in bnx2x_eee_calc_timer()  argument
2870 	struct bnx2x *bp = params->bp;  in bnx2x_eee_calc_timer()
2872 	if (params->eee_mode & EEE_MODE_OVERRIDE_NVRAM) {  in bnx2x_eee_calc_timer()
2873 		if (params->eee_mode & EEE_MODE_OUTPUT_TIME) {  in bnx2x_eee_calc_timer()
2875 			eee_idle = params->eee_mode & EEE_MODE_TIMER_MASK;  in bnx2x_eee_calc_timer()
2878 			if (bnx2x_eee_nvram_to_time(params->eee_mode &  in bnx2x_eee_calc_timer()
2885 		eee_mode = ((REG_RD(bp, params->shmem_base +  in bnx2x_eee_calc_timer()
2887 				    port_feature_config[params->port].  in bnx2x_eee_calc_timer()
2899 static int bnx2x_eee_set_timers(struct link_params *params,  in bnx2x_eee_set_timers()  argument
2903 	struct bnx2x *bp = params->bp;  in bnx2x_eee_set_timers()
2905 	eee_idle = bnx2x_eee_calc_timer(params);  in bnx2x_eee_set_timers()
2908 		REG_WR(bp, MISC_REG_CPMU_LP_IDLE_THR_P0 + (params->port << 2),  in bnx2x_eee_set_timers()
2910 	} else if ((params->eee_mode & EEE_MODE_ENABLE_LPI) &&  in bnx2x_eee_set_timers()
2911 		   (params->eee_mode & EEE_MODE_OVERRIDE_NVRAM) &&  in bnx2x_eee_set_timers()
2912 		   (params->eee_mode & EEE_MODE_OUTPUT_TIME)) {  in bnx2x_eee_set_timers()
2918 	if (params->eee_mode & EEE_MODE_OUTPUT_TIME) {  in bnx2x_eee_set_timers()
2932 static int bnx2x_eee_initial_config(struct link_params *params,  in bnx2x_eee_initial_config()  argument
2938 	if (params->eee_mode & EEE_MODE_ENABLE_LPI)  in bnx2x_eee_initial_config()
2943 	if (params->eee_mode & EEE_MODE_ADV_LPI)  in bnx2x_eee_initial_config()
2948 	return bnx2x_eee_set_timers(params, vars);  in bnx2x_eee_initial_config()
2952 				struct link_params *params,  in bnx2x_eee_disable()  argument
2955 	struct bnx2x *bp = params->bp;  in bnx2x_eee_disable()
2958 	REG_WR(bp, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2), 0);  in bnx2x_eee_disable()
2968 				  struct link_params *params,  in bnx2x_eee_advertise()  argument
2971 	struct bnx2x *bp = params->bp;  in bnx2x_eee_advertise()
2975 	REG_WR(bp, MISC_REG_CPMU_LP_MASK_EXT_P0 + (params->port << 2), 0xfc20);  in bnx2x_eee_advertise()
2994 static void bnx2x_update_mng_eee(struct link_params *params, u32 eee_status)  in bnx2x_update_mng_eee()  argument
2996 	struct bnx2x *bp = params->bp;  in bnx2x_update_mng_eee()
2998 	if (bnx2x_eee_has_cap(params))  in bnx2x_update_mng_eee()
2999 		REG_WR(bp, params->shmem2_base +  in bnx2x_update_mng_eee()
3001 				eee_status[params->port]), eee_status);  in bnx2x_update_mng_eee()
3005 				  struct link_params *params,  in bnx2x_eee_an_resolve()  argument
3008 	struct bnx2x *bp = params->bp;  in bnx2x_eee_an_resolve()
3054 static void bnx2x_bsc_module_sel(struct link_params *params)  in bnx2x_bsc_module_sel()  argument
3059 	struct bnx2x *bp = params->bp;  in bnx2x_bsc_module_sel()
3060 	u8 port = params->port;  in bnx2x_bsc_module_sel()
3062 	board_cfg = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3070 	sfp_ctrl = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3080 static int bnx2x_bsc_read(struct link_params *params,  in bnx2x_bsc_read()  argument
3097 	bnx2x_bsc_module_sel(params);  in bnx2x_bsc_read()
3188 int bnx2x_phy_read(struct link_params *params, u8 phy_addr,  in bnx2x_phy_read()  argument
3195 	for (phy_index = 0; phy_index < params->num_phys; phy_index++) {  in bnx2x_phy_read()
3196 		if (params->phy[phy_index].addr == phy_addr) {  in bnx2x_phy_read()
3197 			return bnx2x_cl45_read(params->bp,  in bnx2x_phy_read()
3198 					       &params->phy[phy_index], devad,  in bnx2x_phy_read()
3205 int bnx2x_phy_write(struct link_params *params, u8 phy_addr,  in bnx2x_phy_write()  argument
3212 	for (phy_index = 0; phy_index < params->num_phys; phy_index++) {  in bnx2x_phy_write()
3213 		if (params->phy[phy_index].addr == phy_addr) {  in bnx2x_phy_write()
3214 			return bnx2x_cl45_write(params->bp,  in bnx2x_phy_write()
3215 						&params->phy[phy_index], devad,  in bnx2x_phy_write()
3222 				  struct link_params *params)  in bnx2x_get_warpcore_lane()  argument
3225 	struct bnx2x *bp = params->bp;  in bnx2x_get_warpcore_lane()
3230 	port = params->port;  in bnx2x_get_warpcore_lane()
3275 static void bnx2x_set_aer_mmd(struct link_params *params,  in bnx2x_set_aer_mmd()  argument
3280 	struct bnx2x *bp = params->bp;  in bnx2x_set_aer_mmd()
3281 	ser_lane = ((params->lane_config &  in bnx2x_set_aer_mmd()
3289 		aer_val = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_set_aer_mmd()
3346 				     struct link_params *params,  in bnx2x_xgxs_specific_func()  argument
3349 	struct bnx2x *bp = params->bp;  in bnx2x_xgxs_specific_func()
3353 		REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + params->port*0x18, 0);  in bnx2x_xgxs_specific_func()
3354 		REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + params->port*0x18,  in bnx2x_xgxs_specific_func()
3360 static void bnx2x_xgxs_deassert(struct link_params *params)  in bnx2x_xgxs_deassert()  argument
3362 	struct bnx2x *bp = params->bp;  in bnx2x_xgxs_deassert()
3366 	port = params->port;  in bnx2x_xgxs_deassert()
3374 	bnx2x_xgxs_specific_func(&params->phy[INT_PHY], params,  in bnx2x_xgxs_deassert()
3379 				     struct link_params *params, u16 *ieee_fc)  in bnx2x_calc_ieee_aneg_adv()  argument
3381 	struct bnx2x *bp = params->bp;  in bnx2x_calc_ieee_aneg_adv()
3389 		switch (params->req_fc_auto_adv) {  in bnx2x_calc_ieee_aneg_adv()
3419 static void set_phy_vars(struct link_params *params,  in set_phy_vars()  argument
3422 	struct bnx2x *bp = params->bp;  in set_phy_vars()
3424 	u8 phy_config_swapped = params->multi_phy_config &  in set_phy_vars()
3426 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in set_phy_vars()
3436 		params->phy[actual_phy_idx].req_flow_ctrl =  in set_phy_vars()
3437 			params->req_flow_ctrl[link_cfg_idx];  in set_phy_vars()
3439 		params->phy[actual_phy_idx].req_line_speed =  in set_phy_vars()
3440 			params->req_line_speed[link_cfg_idx];  in set_phy_vars()
3442 		params->phy[actual_phy_idx].speed_cap_mask =  in set_phy_vars()
3443 			params->speed_cap_mask[link_cfg_idx];  in set_phy_vars()
3445 		params->phy[actual_phy_idx].req_duplex =  in set_phy_vars()
3446 			params->req_duplex[link_cfg_idx];  in set_phy_vars()
3448 		if (params->req_line_speed[link_cfg_idx] ==  in set_phy_vars()
3454 			   params->phy[actual_phy_idx].req_flow_ctrl,  in set_phy_vars()
3455 			   params->phy[actual_phy_idx].req_line_speed,  in set_phy_vars()
3456 			   params->phy[actual_phy_idx].speed_cap_mask);  in set_phy_vars()
3460 static void bnx2x_ext_phy_set_pause(struct link_params *params,  in bnx2x_ext_phy_set_pause()  argument
3465 	struct bnx2x *bp = params->bp;  in bnx2x_ext_phy_set_pause()
3472 	bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);  in bnx2x_ext_phy_set_pause()
3488 				struct link_params *params,  in bnx2x_pause_resolve()  argument
3492 	struct bnx2x *bp = params->bp;  in bnx2x_pause_resolve()
3513 		if (params->req_fc_auto_adv == BNX2X_FLOW_CTRL_BOTH) {  in bnx2x_pause_resolve()
3535 					struct link_params *params,  in bnx2x_ext_phy_update_adv_fc()  argument
3541 	struct bnx2x *bp = params->bp;  in bnx2x_ext_phy_update_adv_fc()
3546 		SINGLE_MEDIA_DIRECT(params)) {  in bnx2x_ext_phy_update_adv_fc()
3547 		u8 lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_ext_phy_update_adv_fc()
3585 	bnx2x_pause_resolve(phy, params, vars, pause_result);  in bnx2x_ext_phy_update_adv_fc()
3590 				   struct link_params *params,  in bnx2x_ext_phy_resolve_fc()  argument
3598 			bnx2x_ext_phy_update_adv_fc(phy, params, vars);  in bnx2x_ext_phy_resolve_fc()
3602 		vars->flow_ctrl = params->req_fc_auto_adv;  in bnx2x_ext_phy_resolve_fc()
3605 		bnx2x_ext_phy_update_adv_fc(phy, params, vars);  in bnx2x_ext_phy_resolve_fc()
3629 					 struct link_params *params,  in bnx2x_warpcore_enable_AN_KR2()  argument
3632 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_enable_AN_KR2()
3663 	params->link_attr_sync |= LINK_ATTR_SYNC_KR2_ENABLE;  in bnx2x_warpcore_enable_AN_KR2()
3664 	bnx2x_update_link_attr(params, params->link_attr_sync);  in bnx2x_warpcore_enable_AN_KR2()
3667 static void bnx2x_disable_kr2(struct link_params *params,  in bnx2x_disable_kr2()  argument
3671 	struct bnx2x *bp = params->bp;  in bnx2x_disable_kr2()
3696 	params->link_attr_sync &= ~LINK_ATTR_SYNC_KR2_ENABLE;  in bnx2x_disable_kr2()
3697 	bnx2x_update_link_attr(params, params->link_attr_sync);  in bnx2x_disable_kr2()
3703 					       struct link_params *params)  in bnx2x_warpcore_set_lpi_passthrough()  argument
3705 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_set_lpi_passthrough()
3715 					 struct link_params *params)  in bnx2x_warpcore_restart_AN_KR()  argument
3718 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_restart_AN_KR()
3719 	u16 lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_restart_AN_KR()
3726 	bnx2x_set_aer_mmd(params, phy);  in bnx2x_warpcore_restart_AN_KR()
3730 					struct link_params *params,  in bnx2x_warpcore_enable_AN_KR()  argument
3734 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_enable_AN_KR()
3780 		bnx2x_set_aer_mmd(params, phy);  in bnx2x_warpcore_enable_AN_KR()
3785 	lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_enable_AN_KR()
3812 	if (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
3814 			    port_hw_config[params->port].default_cfg)) &  in bnx2x_warpcore_enable_AN_KR()
3823 	bnx2x_ext_phy_set_pause(params, phy, vars);  in bnx2x_warpcore_enable_AN_KR()
3845 		bnx2x_set_aer_mmd(params, phy);  in bnx2x_warpcore_enable_AN_KR()
3847 		bnx2x_warpcore_enable_AN_KR2(phy, params, vars);  in bnx2x_warpcore_enable_AN_KR()
3852 		wc_lane_config = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
3874 		bnx2x_disable_kr2(params, vars, phy);  in bnx2x_warpcore_enable_AN_KR()
3878 	bnx2x_warpcore_restart_AN_KR(phy, params);  in bnx2x_warpcore_enable_AN_KR()
3882 				      struct link_params *params,  in bnx2x_warpcore_set_10G_KR()  argument
3885 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_set_10G_KR()
3904 	lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_set_10G_KR()
3921 	bnx2x_set_aer_mmd(params, phy);  in bnx2x_warpcore_set_10G_KR()
3950 				       struct link_params *params,  in bnx2x_warpcore_set_10G_XFI()  argument
3953 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_set_10G_XFI()
4004 		cfg_tap_val = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_set_10G_XFI()
4006 					      port_hw_config[params->port].  in bnx2x_warpcore_set_10G_XFI()
4054 	lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_set_10G_XFI()
4070 	bnx2x_warpcore_set_lpi_passthrough(phy, params);  in bnx2x_warpcore_set_10G_XFI()
4086 					     struct link_params *params)  in bnx2x_warpcore_set_20G_force_KR2()  argument
4089 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_set_20G_force_KR2()
4098 	bnx2x_set_aer_mmd(params, phy);  in bnx2x_warpcore_set_20G_force_KR2()
4135 	bnx2x_set_aer_mmd(params, phy);  in bnx2x_warpcore_set_20G_force_KR2()
4193 					   struct link_params *params,  in bnx2x_warpcore_set_sgmii_speed()  argument
4197 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_set_sgmii_speed()
4204 	bnx2x_warpcore_set_lpi_passthrough(phy, params);  in bnx2x_warpcore_set_sgmii_speed()
4293 				      struct link_params *params,  in bnx2x_warpcore_clear_regs()  argument
4296 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_clear_regs()
4322 	lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_clear_regs()
4368 				       struct link_params *params)  in bnx2x_is_sfp_module_plugged()  argument
4370 	struct bnx2x *bp = params->bp;  in bnx2x_is_sfp_module_plugged()
4373 	if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id,  in bnx2x_is_sfp_module_plugged()
4374 				      params->shmem_base, params->port,  in bnx2x_is_sfp_module_plugged()
4386 				     struct link_params *params)  in bnx2x_warpcore_get_sigdet()  argument
4389 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_get_sigdet()
4391 	lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_get_sigdet()
4400 					  struct link_params *params,  in bnx2x_warpcore_config_runtime()  argument
4403 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_config_runtime()
4413 		u16 lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_config_runtime()
4414 		serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_runtime()
4416 				port_hw_config[params->port].default_cfg)) &  in bnx2x_warpcore_config_runtime()
4453 				      struct link_params *params)  in bnx2x_warpcore_config_sfi()  argument
4455 	u16 lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_config_sfi()
4456 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_config_sfi()
4457 	bnx2x_warpcore_clear_regs(phy, params, lane);  in bnx2x_warpcore_config_sfi()
4458 	if ((params->req_line_speed[LINK_CONFIG_IDX(INT_PHY)] ==  in bnx2x_warpcore_config_sfi()
4462 		bnx2x_warpcore_set_10G_XFI(phy, params, 0);  in bnx2x_warpcore_config_sfi()
4465 		bnx2x_warpcore_set_sgmii_speed(phy, params, 1, 0);  in bnx2x_warpcore_config_sfi()
4469 static void bnx2x_sfp_e3_set_transmitter(struct link_params *params,  in bnx2x_sfp_e3_set_transmitter()  argument
4473 	struct bnx2x *bp = params->bp;  in bnx2x_sfp_e3_set_transmitter()
4475 	u8 port = params->port;  in bnx2x_sfp_e3_set_transmitter()
4477 	cfg_pin = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e3_set_transmitter()
4491 				       struct link_params *params,  in bnx2x_warpcore_config_init()  argument
4494 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_config_init()
4497 	u16 lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_config_init()
4498 	serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_init()
4500 				  port_hw_config[params->port].default_cfg)) &  in bnx2x_warpcore_config_init()
4505 	bnx2x_set_aer_mmd(params, phy);  in bnx2x_warpcore_config_init()
4514 		bnx2x_warpcore_clear_regs(phy, params, lane);  in bnx2x_warpcore_config_init()
4515 		bnx2x_warpcore_set_sgmii_speed(phy, params, 0, 1);  in bnx2x_warpcore_config_init()
4520 			if (params->loopback_mode != LOOPBACK_EXT)  in bnx2x_warpcore_config_init()
4521 				bnx2x_warpcore_enable_AN_KR(phy, params, vars);  in bnx2x_warpcore_config_init()
4524 				bnx2x_warpcore_set_10G_KR(phy, params, vars);  in bnx2x_warpcore_config_init()
4529 			bnx2x_warpcore_clear_regs(phy, params, lane);  in bnx2x_warpcore_config_init()
4532 				bnx2x_warpcore_set_10G_XFI(phy, params, 1);  in bnx2x_warpcore_config_init()
4534 				if (SINGLE_MEDIA_DIRECT(params)) {  in bnx2x_warpcore_config_init()
4542 								params,  in bnx2x_warpcore_config_init()
4554 			if ((params->loopback_mode == LOOPBACK_NONE) ||  in bnx2x_warpcore_config_init()
4555 			    (params->loopback_mode == LOOPBACK_EXT)) {  in bnx2x_warpcore_config_init()
4556 				if (bnx2x_is_sfp_module_plugged(phy, params))  in bnx2x_warpcore_config_init()
4557 					bnx2x_sfp_module_detection(phy, params);  in bnx2x_warpcore_config_init()
4559 					bnx2x_sfp_e3_set_transmitter(params,  in bnx2x_warpcore_config_init()
4563 			bnx2x_warpcore_config_sfi(phy, params);  in bnx2x_warpcore_config_init()
4575 			bnx2x_sfp_module_detection(phy, params);  in bnx2x_warpcore_config_init()
4578 			if (!params->loopback_mode) {  in bnx2x_warpcore_config_init()
4579 				bnx2x_warpcore_enable_AN_KR(phy, params, vars);  in bnx2x_warpcore_config_init()
4582 				bnx2x_warpcore_set_20G_force_KR2(phy, params);  in bnx2x_warpcore_config_init()
4599 				      struct link_params *params)  in bnx2x_warpcore_link_reset()  argument
4601 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_link_reset()
4603 	bnx2x_sfp_e3_set_transmitter(params, phy, 0);  in bnx2x_warpcore_link_reset()
4604 	bnx2x_set_mdio_emac_per_phy(bp, params);  in bnx2x_warpcore_link_reset()
4605 	bnx2x_set_aer_mmd(params, phy);  in bnx2x_warpcore_link_reset()
4627 	lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_link_reset()
4649 	bnx2x_set_aer_mmd(params, phy);  in bnx2x_warpcore_link_reset()
4654 					struct link_params *params)  in bnx2x_set_warpcore_loopback()  argument
4656 	struct bnx2x *bp = params->bp;  in bnx2x_set_warpcore_loopback()
4660 		       params->loopback_mode, phy->req_line_speed);  in bnx2x_set_warpcore_loopback()
4674 		lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_set_warpcore_loopback()
4685 		bnx2x_set_aer_mmd(params, phy);  in bnx2x_set_warpcore_loopback()
4698 static void bnx2x_sync_link(struct link_params *params,  in bnx2x_sync_link()  argument
4701 	struct bnx2x *bp = params->bp;  in bnx2x_sync_link()
4804 void bnx2x_link_status_update(struct link_params *params,  in bnx2x_link_status_update()  argument
4807 	struct bnx2x *bp = params->bp;  in bnx2x_link_status_update()
4808 	u8 port = params->port;  in bnx2x_link_status_update()
4811 	set_phy_vars(params, vars);  in bnx2x_link_status_update()
4813 	vars->link_status = REG_RD(bp, params->shmem_base +  in bnx2x_link_status_update()
4818 	if (params->loopback_mode != LOOPBACK_NONE &&  in bnx2x_link_status_update()
4819 	    params->loopback_mode != LOOPBACK_EXT)  in bnx2x_link_status_update()
4822 	if (bnx2x_eee_has_cap(params))  in bnx2x_link_status_update()
4823 		vars->eee_status = REG_RD(bp, params->shmem2_base +  in bnx2x_link_status_update()
4825 						   eee_status[params->port]));  in bnx2x_link_status_update()
4828 	bnx2x_sync_link(params, vars);  in bnx2x_link_status_update()
4830 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
4835 	params->phy[INT_PHY].media_type =  in bnx2x_link_status_update()
4838 	params->phy[EXT_PHY1].media_type =  in bnx2x_link_status_update()
4841 	params->phy[EXT_PHY2].media_type =  in bnx2x_link_status_update()
4847 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
4855 		params->feature_config_flags |=  in bnx2x_link_status_update()
4858 		params->feature_config_flags &=  in bnx2x_link_status_update()
4862 		params->link_attr_sync = SHMEM2_RD(bp,  in bnx2x_link_status_update()
4863 						 link_attr_sync[params->port]);  in bnx2x_link_status_update()
4871 static void bnx2x_set_master_ln(struct link_params *params,  in bnx2x_set_master_ln()  argument
4874 	struct bnx2x *bp = params->bp;  in bnx2x_set_master_ln()
4876 	ser_lane = ((params->lane_config &  in bnx2x_set_master_ln()
4892 static int bnx2x_reset_unicore(struct link_params *params,  in bnx2x_reset_unicore()  argument
4896 	struct bnx2x *bp = params->bp;  in bnx2x_reset_unicore()
4910 		bnx2x_set_serdes_access(bp, params->port);  in bnx2x_reset_unicore()
4930 			 params->port);  in bnx2x_reset_unicore()
4936 static void bnx2x_set_swap_lanes(struct link_params *params,  in bnx2x_set_swap_lanes()  argument
4939 	struct bnx2x *bp = params->bp;  in bnx2x_set_swap_lanes()
4945 	rx_lane_swap = ((params->lane_config &  in bnx2x_set_swap_lanes()
4948 	tx_lane_swap = ((params->lane_config &  in bnx2x_set_swap_lanes()
4979 					 struct link_params *params)  in bnx2x_set_parallel_detection()  argument
4981 	struct bnx2x *bp = params->bp;  in bnx2x_set_parallel_detection()
5032 			      struct link_params *params,  in bnx2x_set_autoneg()  argument
5036 	struct bnx2x *bp = params->bp;  in bnx2x_set_autoneg()
5136 				 struct link_params *params,  in bnx2x_program_serdes()  argument
5139 	struct bnx2x *bp = params->bp;  in bnx2x_program_serdes()
5185 					      struct link_params *params)  in bnx2x_set_brcm_cl37_advertisement()  argument
5187 	struct bnx2x *bp = params->bp;  in bnx2x_set_brcm_cl37_advertisement()
5205 					      struct link_params *params,  in bnx2x_set_ieee_aneg_advertisement()  argument
5208 	struct bnx2x *bp = params->bp;  in bnx2x_set_ieee_aneg_advertisement()
5226 				  struct link_params *params,  in bnx2x_restart_autoneg()  argument
5229 	struct bnx2x *bp = params->bp;  in bnx2x_restart_autoneg()
5266 					   struct link_params *params,  in bnx2x_initialize_sgmii_process()  argument
5269 	struct bnx2x *bp = params->bp;  in bnx2x_initialize_sgmii_process()
5331 		bnx2x_restart_autoneg(phy, params, 0);  in bnx2x_initialize_sgmii_process()
5338 					     struct link_params *params)  in bnx2x_direct_parallel_detect_used()  argument
5340 	struct bnx2x *bp = params->bp;  in bnx2x_direct_parallel_detect_used()
5354 			 params->port);  in bnx2x_direct_parallel_detect_used()
5365 			 params->port);  in bnx2x_direct_parallel_detect_used()
5372 				struct link_params *params,  in bnx2x_update_adv_fc()  argument
5379 	struct bnx2x *bp = params->bp;  in bnx2x_update_adv_fc()
5414 	bnx2x_pause_resolve(phy, params, vars, pause_result);  in bnx2x_update_adv_fc()
5419 				    struct link_params *params,  in bnx2x_flow_ctrl_resolve()  argument
5423 	struct bnx2x *bp = params->bp;  in bnx2x_flow_ctrl_resolve()
5430 			bnx2x_update_adv_fc(phy, params, vars, gp_status);  in bnx2x_flow_ctrl_resolve()
5434 		vars->flow_ctrl = params->req_fc_auto_adv;  in bnx2x_flow_ctrl_resolve()
5437 		if (bnx2x_direct_parallel_detect_used(phy, params)) {  in bnx2x_flow_ctrl_resolve()
5438 			vars->flow_ctrl = params->req_fc_auto_adv;  in bnx2x_flow_ctrl_resolve()
5441 		bnx2x_update_adv_fc(phy, params, vars, gp_status);  in bnx2x_flow_ctrl_resolve()
5447 					 struct link_params *params)  in bnx2x_check_fallback_to_cl37()  argument
5449 	struct bnx2x *bp = params->bp;  in bnx2x_check_fallback_to_cl37()
5510 	bnx2x_restart_autoneg(phy, params, 0);  in bnx2x_check_fallback_to_cl37()
5515 				  struct link_params *params,  in bnx2x_xgxs_an_resolve()  argument
5523 	if (bnx2x_direct_parallel_detect_used(phy, params))  in bnx2x_xgxs_an_resolve()
5528 				     struct link_params *params,  in bnx2x_get_link_speed_duplex()  argument
5534 	struct bnx2x *bp = params->bp;  in bnx2x_get_link_speed_duplex()
5619 				     struct link_params *params,  in bnx2x_link_settings_status()  argument
5622 	struct bnx2x *bp = params->bp;  in bnx2x_link_settings_status()
5639 	rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, speed_mask,  in bnx2x_link_settings_status()
5645 		if (SINGLE_MEDIA_DIRECT(params)) {  in bnx2x_link_settings_status()
5647 			bnx2x_flow_ctrl_resolve(phy, params, vars, gp_status);  in bnx2x_link_settings_status()
5649 				bnx2x_xgxs_an_resolve(phy, params, vars,  in bnx2x_link_settings_status()
5654 		    SINGLE_MEDIA_DIRECT(params)) {  in bnx2x_link_settings_status()
5656 			bnx2x_check_fallback_to_cl37(phy, params);  in bnx2x_link_settings_status()
5661 	if (SINGLE_MEDIA_DIRECT(params) &&  in bnx2x_link_settings_status()
5693 				     struct link_params *params,  in bnx2x_warpcore_read_status()  argument
5696 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_read_status()
5700 	lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_read_status()
5702 	if ((params->loopback_mode) &&  in bnx2x_warpcore_read_status()
5720 			bnx2x_ext_phy_resolve_fc(phy, params, vars);  in bnx2x_warpcore_read_status()
5739 		if (link_up && SINGLE_MEDIA_DIRECT(params)) {  in bnx2x_warpcore_read_status()
5758 			bnx2x_ext_phy_resolve_fc(phy, params, vars);  in bnx2x_warpcore_read_status()
5764 	    SINGLE_MEDIA_DIRECT(params)) {  in bnx2x_warpcore_read_status()
5805 	rc = bnx2x_get_link_speed_duplex(phy, params, vars, link_up, gp_speed,  in bnx2x_warpcore_read_status()
5817 static void bnx2x_set_gmii_tx_driver(struct link_params *params)  in bnx2x_set_gmii_tx_driver()  argument
5819 	struct bnx2x *bp = params->bp;  in bnx2x_set_gmii_tx_driver()
5820 	struct bnx2x_phy *phy = &params->phy[INT_PHY];  in bnx2x_set_gmii_tx_driver()
5856 static int bnx2x_emac_program(struct link_params *params,  in bnx2x_emac_program()  argument
5859 	struct bnx2x *bp = params->bp;  in bnx2x_emac_program()
5860 	u8 port = params->port;  in bnx2x_emac_program()
5899 	bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed);  in bnx2x_emac_program()
5904 				  struct link_params *params)  in bnx2x_set_preemphasis()  argument
5908 	struct bnx2x *bp = params->bp;  in bnx2x_set_preemphasis()
5928 				   struct link_params *params,  in bnx2x_xgxs_config_init()  argument
5931 	struct bnx2x *bp = params->bp;  in bnx2x_xgxs_config_init()
5932 	u8 enable_cl73 = (SINGLE_MEDIA_DIRECT(params) ||  in bnx2x_xgxs_config_init()
5933 			  (params->loopback_mode == LOOPBACK_XGXS));  in bnx2x_xgxs_config_init()
5935 		if (SINGLE_MEDIA_DIRECT(params) &&  in bnx2x_xgxs_config_init()
5936 		    (params->feature_config_flags &  in bnx2x_xgxs_config_init()
5938 			bnx2x_set_preemphasis(phy, params);  in bnx2x_xgxs_config_init()
5942 		    (SINGLE_MEDIA_DIRECT(params) &&  in bnx2x_xgxs_config_init()
5943 		     params->loopback_mode == LOOPBACK_EXT)) {  in bnx2x_xgxs_config_init()
5947 			bnx2x_set_autoneg(phy, params, vars, 0);  in bnx2x_xgxs_config_init()
5950 			bnx2x_program_serdes(phy, params, vars);  in bnx2x_xgxs_config_init()
5956 			bnx2x_set_brcm_cl37_advertisement(phy, params);  in bnx2x_xgxs_config_init()
5959 			bnx2x_set_ieee_aneg_advertisement(phy, params,  in bnx2x_xgxs_config_init()
5963 			bnx2x_set_autoneg(phy, params, vars, enable_cl73);  in bnx2x_xgxs_config_init()
5966 			bnx2x_restart_autoneg(phy, params, enable_cl73);  in bnx2x_xgxs_config_init()
5972 		bnx2x_initialize_sgmii_process(phy, params, vars);  in bnx2x_xgxs_config_init()
5977 			  struct link_params *params,  in bnx2x_prepare_xgxs()  argument
5995 	bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);  in bnx2x_prepare_xgxs()
5996 	bnx2x_set_aer_mmd(params, phy);  in bnx2x_prepare_xgxs()
5998 		bnx2x_set_master_ln(params, phy);  in bnx2x_prepare_xgxs()
6000 	rc = bnx2x_reset_unicore(params, phy, 0);  in bnx2x_prepare_xgxs()
6005 	bnx2x_set_aer_mmd(params, phy);  in bnx2x_prepare_xgxs()
6008 		bnx2x_set_master_ln(params, phy);  in bnx2x_prepare_xgxs()
6009 		bnx2x_set_swap_lanes(params, phy);  in bnx2x_prepare_xgxs()
6017 				     struct link_params *params)  in bnx2x_wait_reset_complete()  argument
6037 			 params->port);  in bnx2x_wait_reset_complete()
6042 static void bnx2x_link_int_enable(struct link_params *params)  in bnx2x_link_int_enable()  argument
6044 	u8 port = params->port;  in bnx2x_link_int_enable()
6046 	struct bnx2x *bp = params->bp;  in bnx2x_link_int_enable()
6051 		if (!(SINGLE_MEDIA_DIRECT(params)))  in bnx2x_link_int_enable()
6053 	} else if (params->switch_cfg == SWITCH_CFG_10G) {  in bnx2x_link_int_enable()
6057 		if (!(SINGLE_MEDIA_DIRECT(params)) &&  in bnx2x_link_int_enable()
6058 			params->phy[INT_PHY].type !=  in bnx2x_link_int_enable()
6067 		if (!(SINGLE_MEDIA_DIRECT(params)) &&  in bnx2x_link_int_enable()
6068 			params->phy[INT_PHY].type !=  in bnx2x_link_int_enable()
6079 		 (params->switch_cfg == SWITCH_CFG_10G),  in bnx2x_link_int_enable()
6124 static void bnx2x_link_int_ack(struct link_params *params,  in bnx2x_link_int_ack()  argument
6127 	struct bnx2x *bp = params->bp;  in bnx2x_link_int_ack()
6128 	u8 port = params->port;  in bnx2x_link_int_ack()
6143 			else if (params->switch_cfg == SWITCH_CFG_10G) {  in bnx2x_link_int_ack()
6148 					((params->lane_config &  in bnx2x_link_int_ack()
6203 int bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 *version,  in bnx2x_get_ext_phy_fw_version()  argument
6211 	if (version == NULL || params == NULL || len == 0)  in bnx2x_get_ext_phy_fw_version()
6213 	bp = params->bp;  in bnx2x_get_ext_phy_fw_version()
6217 	spirom_ver = REG_RD(bp, params->phy[EXT_PHY1].ver_addr);  in bnx2x_get_ext_phy_fw_version()
6219 	if (params->phy[EXT_PHY1].format_fw_ver) {  in bnx2x_get_ext_phy_fw_version()
6220 		status |= params->phy[EXT_PHY1].format_fw_ver(spirom_ver,  in bnx2x_get_ext_phy_fw_version()
6225 	if ((params->num_phys == MAX_PHYS) &&  in bnx2x_get_ext_phy_fw_version()
6226 	    (params->phy[EXT_PHY2].ver_addr != 0)) {  in bnx2x_get_ext_phy_fw_version()
6227 		spirom_ver = REG_RD(bp, params->phy[EXT_PHY2].ver_addr);  in bnx2x_get_ext_phy_fw_version()
6228 		if (params->phy[EXT_PHY2].format_fw_ver) {  in bnx2x_get_ext_phy_fw_version()
6232 			status |= params->phy[EXT_PHY2].format_fw_ver(  in bnx2x_get_ext_phy_fw_version()
6244 				    struct link_params *params)  in bnx2x_set_xgxs_loopback()  argument
6246 	u8 port = params->port;  in bnx2x_set_xgxs_loopback()
6247 	struct bnx2x *bp = params->bp;  in bnx2x_set_xgxs_loopback()
6276 		bnx2x_set_aer_mmd(params, phy);  in bnx2x_set_xgxs_loopback()
6298 int bnx2x_set_led(struct link_params *params,  in bnx2x_set_led()  argument
6301 	u8 port = params->port;  in bnx2x_set_led()
6302 	u16 hw_led_mode = params->hw_led_mode;  in bnx2x_set_led()
6307 	struct bnx2x *bp = params->bp;  in bnx2x_set_led()
6313 		if (params->phy[phy_idx].set_link_led) {  in bnx2x_set_led()
6314 			params->phy[phy_idx].set_link_led(  in bnx2x_set_led()
6315 				&params->phy[phy_idx], params, mode);  in bnx2x_set_led()
6327 		if (params->phy[EXT_PHY1].type ==  in bnx2x_set_led()
6346 		if (((params->phy[EXT_PHY1].type ==  in bnx2x_set_led()
6348 			 (params->phy[EXT_PHY1].type ==  in bnx2x_set_led()
6350 		    CHIP_IS_E2(bp) && params->num_phys == 2) {  in bnx2x_set_led()
6368 		} else if (SINGLE_MEDIA_DIRECT(params)) {  in bnx2x_set_led()
6384 		} else if ((params->phy[EXT_PHY1].type ==  in bnx2x_set_led()
6396 			u32 nig_led_mode = ((params->hw_led_mode <<  in bnx2x_set_led()
6447 int bnx2x_test_link(struct link_params *params, struct link_vars *vars,  in bnx2x_test_link()  argument
6450 	struct bnx2x *bp = params->bp;  in bnx2x_test_link()
6454 	struct bnx2x_phy *int_phy = &params->phy[INT_PHY];  in bnx2x_test_link()
6458 		if (params->req_line_speed[LINK_CONFIG_IDX(INT_PHY)]  in bnx2x_test_link()
6468 			u8 lane = bnx2x_get_warpcore_lane(int_phy, params);  in bnx2x_test_link()
6488 	if (params->loopback_mode == LOOPBACK_XGXS)  in bnx2x_test_link()
6491 	switch (params->num_phys) {  in bnx2x_test_link()
6496 		ext_phy_link_up = params->phy[EXT_PHY1].read_status(  in bnx2x_test_link()
6497 			&params->phy[EXT_PHY1],  in bnx2x_test_link()
6498 			params, &temp_vars);  in bnx2x_test_link()
6501 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_test_link()
6503 			serdes_phy_type = ((params->phy[phy_index].media_type ==  in bnx2x_test_link()
6505 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6507 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6509 					   (params->phy[phy_index].media_type ==  in bnx2x_test_link()
6514 			if (params->phy[phy_index].read_status) {  in bnx2x_test_link()
6516 					params->phy[phy_index].read_status(  in bnx2x_test_link()
6517 						&params->phy[phy_index],  in bnx2x_test_link()
6518 						params, &temp_vars);  in bnx2x_test_link()
6528 static int bnx2x_link_initialize(struct link_params *params,  in bnx2x_link_initialize()  argument
6532 	struct bnx2x *bp = params->bp;  in bnx2x_link_initialize()
6538 	vars->line_speed = params->phy[INT_PHY].req_line_speed;  in bnx2x_link_initialize()
6545 		bnx2x_prepare_xgxs(&params->phy[INT_PHY], params, vars);  in bnx2x_link_initialize()
6547 	non_ext_phy = (SINGLE_MEDIA_DIRECT(params) ||  in bnx2x_link_initialize()
6548 		       (params->loopback_mode == LOOPBACK_XGXS));  in bnx2x_link_initialize()
6551 	    (params->phy[EXT_PHY1].flags & FLAGS_INIT_XGXS_FIRST) ||  in bnx2x_link_initialize()
6552 	    (params->loopback_mode == LOOPBACK_EXT_PHY)) {  in bnx2x_link_initialize()
6553 		struct bnx2x_phy *phy = &params->phy[INT_PHY];  in bnx2x_link_initialize()
6557 			bnx2x_set_parallel_detection(phy, params);  in bnx2x_link_initialize()
6558 		if (params->phy[INT_PHY].config_init)  in bnx2x_link_initialize()
6559 			params->phy[INT_PHY].config_init(phy, params, vars);  in bnx2x_link_initialize()
6565 	vars->line_speed = params->phy[INT_PHY].req_line_speed;  in bnx2x_link_initialize()
6569 		if (params->phy[INT_PHY].supported &  in bnx2x_link_initialize()
6573 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_initialize()
6580 			if (params->phy[phy_index].supported &  in bnx2x_link_initialize()
6585 			    (bnx2x_phy_selection(params) ==  in bnx2x_link_initialize()
6591 			params->phy[phy_index].config_init(  in bnx2x_link_initialize()
6592 				&params->phy[phy_index],  in bnx2x_link_initialize()
6593 				params, vars);  in bnx2x_link_initialize()
6598 		       params->port*4,  in bnx2x_link_initialize()
6607 				 struct link_params *params)  in bnx2x_int_link_reset()  argument
6610 	REG_WR(params->bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR,  in bnx2x_int_link_reset()
6611 	       (0x1ff << (params->port*16)));  in bnx2x_int_link_reset()
6615 					struct link_params *params)  in bnx2x_common_ext_link_reset()  argument
6617 	struct bnx2x *bp = params->bp;  in bnx2x_common_ext_link_reset()
6623 		gpio_port = params->port;  in bnx2x_common_ext_link_reset()
6633 static int bnx2x_update_link_down(struct link_params *params,  in bnx2x_update_link_down()  argument
6636 	struct bnx2x *bp = params->bp;  in bnx2x_update_link_down()
6637 	u8 port = params->port;  in bnx2x_update_link_down()
6640 	bnx2x_set_led(params, vars, LED_MODE_OFF, 0);  in bnx2x_update_link_down()
6648 	bnx2x_update_mng(params, vars->link_status);  in bnx2x_update_link_down()
6661 		bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 0);  in bnx2x_update_link_down()
6665 		REG_WR(bp, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2),  in bnx2x_update_link_down()
6667 		REG_WR(bp, MISC_REG_CPMU_LP_MASK_ENT_P0 + (params->port << 2),  in bnx2x_update_link_down()
6672 		bnx2x_update_mng_eee(params, vars->eee_status);  in bnx2x_update_link_down()
6673 		bnx2x_set_xmac_rxtx(params, 0);  in bnx2x_update_link_down()
6674 		bnx2x_set_umac_rxtx(params, 0);  in bnx2x_update_link_down()
6680 static int bnx2x_update_link_up(struct link_params *params,  in bnx2x_update_link_up()  argument
6684 	struct bnx2x *bp = params->bp;  in bnx2x_update_link_up()
6685 	u8 phy_idx, port = params->port;  in bnx2x_update_link_up()
6701 			if (bnx2x_xmac_enable(params, vars, 0) ==  in bnx2x_update_link_up()
6709 			bnx2x_umac_enable(params, vars, 0);  in bnx2x_update_link_up()
6710 		bnx2x_set_led(params, vars,  in bnx2x_update_link_up()
6717 			       (params->port << 2), 1);  in bnx2x_update_link_up()
6720 			       (params->port << 2), 0xfc20);  in bnx2x_update_link_up()
6726 			if (bnx2x_bmac_enable(params, vars, 0, 1) ==  in bnx2x_update_link_up()
6734 			bnx2x_set_led(params, vars,  in bnx2x_update_link_up()
6737 			rc = bnx2x_emac_program(params, vars);  in bnx2x_update_link_up()
6738 			bnx2x_emac_enable(params, vars, 0);  in bnx2x_update_link_up()
6744 			    SINGLE_MEDIA_DIRECT(params))  in bnx2x_update_link_up()
6745 				bnx2x_set_gmii_tx_driver(params);  in bnx2x_update_link_up()
6751 		rc |= bnx2x_pbf_update(params, vars->flow_ctrl,  in bnx2x_update_link_up()
6758 	bnx2x_update_mng(params, vars->link_status);  in bnx2x_update_link_up()
6759 	bnx2x_update_mng_eee(params, vars->eee_status);  in bnx2x_update_link_up()
6762 		if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) {  in bnx2x_update_link_up()
6763 			bnx2x_check_half_open_conn(params, vars, 0);  in bnx2x_update_link_up()
6771 static void bnx2x_chng_link_count(struct link_params *params, bool clear)  in bnx2x_chng_link_count()  argument
6773 	struct bnx2x *bp = params->bp;  in bnx2x_chng_link_count()
6780 	addr = params->shmem2_base +  in bnx2x_chng_link_count()
6781 		offsetof(struct shmem2_region, link_change_count[params->port]);  in bnx2x_chng_link_count()
6801 int bnx2x_link_update(struct link_params *params, struct link_vars *vars)  in bnx2x_link_update()  argument
6803 	struct bnx2x *bp = params->bp;  in bnx2x_link_update()
6805 	u8 port = params->port;  in bnx2x_link_update()
6815 	for (phy_index = INT_PHY; phy_index < params->num_phys;  in bnx2x_link_update()
6829 		bnx2x_set_aer_mmd(params, &params->phy[INT_PHY]);  in bnx2x_link_update()
6857 	for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_update()
6859 		struct bnx2x_phy *phy = &params->phy[phy_index];  in bnx2x_link_update()
6863 		cur_link_up = phy->read_status(phy, params,  in bnx2x_link_update()
6878 			switch (bnx2x_phy_selection(params)) {  in bnx2x_link_update()
6905 					   params->multi_phy_config);  in bnx2x_link_update()
6918 	if (params->phy[INT_PHY].read_status)  in bnx2x_link_update()
6919 		params->phy[INT_PHY].read_status(  in bnx2x_link_update()
6920 			&params->phy[INT_PHY],  in bnx2x_link_update()
6921 			params, vars);  in bnx2x_link_update()
6940 			if (params->phy[EXT_PHY2].phy_specific_func) {  in bnx2x_link_update()
6943 				params->phy[EXT_PHY2].phy_specific_func(  in bnx2x_link_update()
6944 					&params->phy[EXT_PHY2],  in bnx2x_link_update()
6945 					params, DISABLE_TX);  in bnx2x_link_update()
6951 		if (params->phy[active_external_phy].supported &  in bnx2x_link_update()
6963 	for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_update()
6965 		if (params->phy[phy_index].flags &  in bnx2x_link_update()
6982 		if (!(SINGLE_MEDIA_DIRECT(params)) && ext_phy_link_up &&  in bnx2x_link_update()
6990 			REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4,  in bnx2x_link_update()
6999 	bnx2x_link_int_ack(params, vars, link_10g_plus);  in bnx2x_link_update()
7008 	if (!(SINGLE_MEDIA_DIRECT(params))) {  in bnx2x_link_update()
7012 			   params->phy[EXT_PHY1].flags &  in bnx2x_link_update()
7014 		if (!(params->phy[EXT_PHY1].flags &  in bnx2x_link_update()
7023 			if (params->phy[INT_PHY].config_init)  in bnx2x_link_update()
7024 				params->phy[INT_PHY].config_init(  in bnx2x_link_update()
7025 					&params->phy[INT_PHY], params,  in bnx2x_link_update()
7034 			  SINGLE_MEDIA_DIRECT(params)) &&  in bnx2x_link_update()
7038 	if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED)  in bnx2x_link_update()
7044 		rc = bnx2x_update_link_up(params, vars, link_10g_plus);  in bnx2x_link_update()
7046 		rc = bnx2x_update_link_down(params, vars);  in bnx2x_link_update()
7049 		bnx2x_chng_link_count(params, false);  in bnx2x_link_update()
7052 	if (params->feature_config_flags & FEATURE_CONFIG_BC_SUPPORTS_AFEX)  in bnx2x_link_update()
7115 				  struct link_params *params,  in bnx2x_8073_resolve_fc()  argument
7118 	struct bnx2x *bp = params->bp;  in bnx2x_8073_resolve_fc()
7125 	if (bnx2x_ext_phy_resolve_fc(phy, params, vars) &&  in bnx2x_8073_resolve_fc()
7142 		bnx2x_pause_resolve(phy, params, vars, pause_result);  in bnx2x_8073_resolve_fc()
7323 static void bnx2x_8073_set_pause_cl37(struct link_params *params,  in bnx2x_8073_set_pause_cl37()  argument
7328 	struct bnx2x *bp = params->bp;  in bnx2x_8073_set_pause_cl37()
7334 	bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);  in bnx2x_8073_set_pause_cl37()
7359 				     struct link_params *params,  in bnx2x_8073_specific_func()  argument
7362 	struct bnx2x *bp = params->bp;  in bnx2x_8073_specific_func()
7375 				   struct link_params *params,  in bnx2x_8073_config_init()  argument
7378 	struct bnx2x *bp = params->bp;  in bnx2x_8073_config_init()
7386 		gpio_port = params->port;  in bnx2x_8073_config_init()
7394 	bnx2x_8073_specific_func(phy, params, PHY_INIT);  in bnx2x_8073_config_init()
7395 	bnx2x_8073_set_pause_cl37(params, phy, vars);  in bnx2x_8073_config_init()
7406 	if (params->lane_config & PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED) {  in bnx2x_8073_config_init()
7421 	if (REG_RD(bp, params->shmem_base +  in bnx2x_8073_config_init()
7423 				  port_hw_config[params->port].default_cfg)) &  in bnx2x_8073_config_init()
7434 	if (params->loopback_mode == LOOPBACK_EXT) {  in bnx2x_8073_config_init()
7512 	bnx2x_ext_phy_set_pause(params, phy, vars);  in bnx2x_8073_config_init()
7522 				 struct link_params *params,  in bnx2x_8073_read_status()  argument
7525 	struct bnx2x *bp = params->bp;  in bnx2x_8073_read_status()
7606 			   params->port);  in bnx2x_8073_read_status()
7611 			   params->port);  in bnx2x_8073_read_status()
7616 			   params->port);  in bnx2x_8073_read_status()
7620 			   params->port);  in bnx2x_8073_read_status()
7625 		if (params->lane_config &  in bnx2x_8073_read_status()
7647 		bnx2x_8073_resolve_fc(phy, params, vars);  in bnx2x_8073_read_status()
7667 				  struct link_params *params)  in bnx2x_8073_link_reset()  argument
7669 	struct bnx2x *bp = params->bp;  in bnx2x_8073_link_reset()
7674 		gpio_port = params->port;  in bnx2x_8073_link_reset()
7686 				   struct link_params *params,  in bnx2x_8705_config_init()  argument
7689 	struct bnx2x *bp = params->bp;  in bnx2x_8705_config_init()
7693 		       MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port);  in bnx2x_8705_config_init()
7695 	bnx2x_ext_phy_hw_reset(bp, params->port);  in bnx2x_8705_config_init()
7697 	bnx2x_wait_reset_complete(bp, phy, params);  in bnx2x_8705_config_init()
7708 	bnx2x_save_spirom_version(bp, params->port, params->shmem_base, 0);  in bnx2x_8705_config_init()
7712 				 struct link_params *params,  in bnx2x_8705_read_status()  argument
7717 	struct bnx2x *bp = params->bp;  in bnx2x_8705_read_status()
7739 		bnx2x_ext_phy_resolve_fc(phy, params, vars);  in bnx2x_8705_read_status()
7747 static void bnx2x_set_disable_pmd_transmit(struct link_params *params,  in bnx2x_set_disable_pmd_transmit()  argument
7751 	struct bnx2x *bp = params->bp;  in bnx2x_set_disable_pmd_transmit()
7756 		if (params->feature_config_flags &  in bnx2x_set_disable_pmd_transmit()
7770 static u8 bnx2x_get_gpio_port(struct link_params *params)  in bnx2x_get_gpio_port()  argument
7774 	struct bnx2x *bp = params->bp;  in bnx2x_get_gpio_port()
7778 		gpio_port = params->port;  in bnx2x_get_gpio_port()
7784 static void bnx2x_sfp_e1e2_set_transmitter(struct link_params *params,  in bnx2x_sfp_e1e2_set_transmitter()  argument
7789 	u8 port = params->port;  in bnx2x_sfp_e1e2_set_transmitter()
7790 	struct bnx2x *bp = params->bp;  in bnx2x_sfp_e1e2_set_transmitter()
7794 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e1e2_set_transmitter()
7831 		gpio_port = bnx2x_get_gpio_port(params);  in bnx2x_sfp_e1e2_set_transmitter()
7841 static void bnx2x_sfp_set_transmitter(struct link_params *params,  in bnx2x_sfp_set_transmitter()  argument
7845 	struct bnx2x *bp = params->bp;  in bnx2x_sfp_set_transmitter()
7848 		bnx2x_sfp_e3_set_transmitter(params, phy, tx_en);  in bnx2x_sfp_set_transmitter()
7850 		bnx2x_sfp_e1e2_set_transmitter(params, phy, tx_en);  in bnx2x_sfp_set_transmitter()
7854 					     struct link_params *params,  in bnx2x_8726_read_sfp_module_eeprom()  argument
7858 	struct bnx2x *bp = params->bp;  in bnx2x_8726_read_sfp_module_eeprom()
7920 static void bnx2x_warpcore_power_module(struct link_params *params,  in bnx2x_warpcore_power_module()  argument
7924 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_power_module()
7926 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_power_module()
7928 			dev_info.port_hw_config[params->port].e3_sfp_ctrl)) &  in bnx2x_warpcore_power_module()
7942 						 struct link_params *params,  in bnx2x_warpcore_read_sfp_module_eeprom()  argument
7951 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_read_sfp_module_eeprom()
7963 			bnx2x_warpcore_power_module(params, 0);  in bnx2x_warpcore_read_sfp_module_eeprom()
7966 			bnx2x_warpcore_power_module(params, 1);  in bnx2x_warpcore_read_sfp_module_eeprom()
7968 		rc = bnx2x_bsc_read(params, bp, dev_addr, addr32, 0, byte_cnt,  in bnx2x_warpcore_read_sfp_module_eeprom()
7983 					     struct link_params *params,  in bnx2x_8727_read_sfp_module_eeprom()  argument
7987 	struct bnx2x *bp = params->bp;  in bnx2x_8727_read_sfp_module_eeprom()
8078 				 struct link_params *params, u8 dev_addr,  in bnx2x_read_sfp_module_eeprom()  argument
8082 	struct bnx2x *bp = params->bp;  in bnx2x_read_sfp_module_eeprom()
8110 		rc = read_func(phy, params, dev_addr, addr, xfer_size,  in bnx2x_read_sfp_module_eeprom()
8120 			      struct link_params *params,  in bnx2x_get_edc_mode()  argument
8123 	struct bnx2x *bp = params->bp;  in bnx2x_get_edc_mode()
8130 					 params,  in bnx2x_get_edc_mode()
8138 	params->link_attr_sync &= ~LINK_SFP_EEPROM_COMP_CODE_MASK;  in bnx2x_get_edc_mode()
8139 	params->link_attr_sync |= val[SFP_EEPROM_10G_COMP_CODE_ADDR] <<  in bnx2x_get_edc_mode()
8141 	bnx2x_update_link_attr(params, params->link_attr_sync);  in bnx2x_get_edc_mode()
8188 				u8 gport = params->port;  in bnx2x_get_edc_mode()
8192 					(params->port << 1);  in bnx2x_get_edc_mode()
8200 				bnx2x_sfp_set_transmitter(params, phy, 0);  in bnx2x_get_edc_mode()
8202 				bnx2x_sfp_set_transmitter(params, phy, 1);  in bnx2x_get_edc_mode()
8208 				if (params->phy[idx].type == phy->type) {  in bnx2x_get_edc_mode()
8214 			phy->req_line_speed = params->req_line_speed[cfg_idx];  in bnx2x_get_edc_mode()
8222 	sync_offset = params->shmem_base +  in bnx2x_get_edc_mode()
8224 			 dev_info.port_hw_config[params->port].media_type);  in bnx2x_get_edc_mode()
8228 		if (&(params->phy[phy_idx]) == phy) {  in bnx2x_get_edc_mode()
8241 						 params,  in bnx2x_get_edc_mode()
8262 				   struct link_params *params)  in bnx2x_verify_sfp_module()  argument
8264 	struct bnx2x *bp = params->bp;  in bnx2x_verify_sfp_module()
8270 	val = REG_RD(bp, params->shmem_base +  in bnx2x_verify_sfp_module()
8272 				  port_feature_config[params->port].config));  in bnx2x_verify_sfp_module()
8279 	if (params->feature_config_flags &  in bnx2x_verify_sfp_module()
8283 	} else if (params->feature_config_flags &  in bnx2x_verify_sfp_module()
8286 		if (DUAL_MEDIA(params)) {  in bnx2x_verify_sfp_module()
8308 					 params,  in bnx2x_verify_sfp_module()
8317 					 params,  in bnx2x_verify_sfp_module()
8328 			 params->port, vendor_name, vendor_pn);  in bnx2x_verify_sfp_module()
8336 						 struct link_params *params)  in bnx2x_wait_for_sfp_module_initialized()  argument
8341 	struct bnx2x *bp = params->bp;  in bnx2x_wait_for_sfp_module_initialized()
8350 				phy, params, I2C_DEV_ADDR_A0, 1, 1, &val,  in bnx2x_wait_for_sfp_module_initialized()
8353 			rc = bnx2x_read_sfp_module_eeprom(phy, params,  in bnx2x_wait_for_sfp_module_initialized()
8364 	rc = bnx2x_read_sfp_module_eeprom(phy, params, I2C_DEV_ADDR_A0,  in bnx2x_wait_for_sfp_module_initialized()
8485 				     struct link_params *params,  in bnx2x_8727_specific_func()  argument
8488 	struct bnx2x *bp = params->bp;  in bnx2x_8727_specific_func()
8492 		bnx2x_sfp_set_transmitter(params, phy, 0);  in bnx2x_8727_specific_func()
8496 			bnx2x_sfp_set_transmitter(params, phy, 1);  in bnx2x_8727_specific_func()
8530 static void bnx2x_set_e1e2_module_fault_led(struct link_params *params,  in bnx2x_set_e1e2_module_fault_led()  argument
8533 	struct bnx2x *bp = params->bp;  in bnx2x_set_e1e2_module_fault_led()
8535 	u32 fault_led_gpio = REG_RD(bp, params->shmem_base +  in bnx2x_set_e1e2_module_fault_led()
8537 			dev_info.port_hw_config[params->port].sfp_ctrl)) &  in bnx2x_set_e1e2_module_fault_led()
8547 		u8 gpio_port = bnx2x_get_gpio_port(params);  in bnx2x_set_e1e2_module_fault_led()
8562 static void bnx2x_set_e3_module_fault_led(struct link_params *params,  in bnx2x_set_e3_module_fault_led()  argument
8566 	u8 port = params->port;  in bnx2x_set_e3_module_fault_led()
8567 	struct bnx2x *bp = params->bp;  in bnx2x_set_e3_module_fault_led()
8568 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_set_e3_module_fault_led()
8578 static void bnx2x_set_sfp_module_fault_led(struct link_params *params,  in bnx2x_set_sfp_module_fault_led()  argument
8581 	struct bnx2x *bp = params->bp;  in bnx2x_set_sfp_module_fault_led()
8587 		bnx2x_set_e3_module_fault_led(params, gpio_mode);  in bnx2x_set_sfp_module_fault_led()
8589 		bnx2x_set_e1e2_module_fault_led(params, gpio_mode);  in bnx2x_set_sfp_module_fault_led()
8593 				    struct link_params *params)  in bnx2x_warpcore_hw_reset()  argument
8595 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_hw_reset()
8596 	bnx2x_warpcore_power_module(params, 0);  in bnx2x_warpcore_hw_reset()
8606 static void bnx2x_power_sfp_module(struct link_params *params,  in bnx2x_power_sfp_module()  argument
8610 	struct bnx2x *bp = params->bp;  in bnx2x_power_sfp_module()
8616 		bnx2x_8727_power_module(params->bp, phy, power);  in bnx2x_power_sfp_module()
8619 		bnx2x_warpcore_power_module(params, power);  in bnx2x_power_sfp_module()
8625 static void bnx2x_warpcore_set_limiting_mode(struct link_params *params,  in bnx2x_warpcore_set_limiting_mode()  argument
8631 	struct bnx2x *bp = params->bp;  in bnx2x_warpcore_set_limiting_mode()
8633 	u8 lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_warpcore_set_limiting_mode()
8665 static void bnx2x_set_limiting_mode(struct link_params *params,  in bnx2x_set_limiting_mode()  argument
8671 		bnx2x_8726_set_limiting_mode(params->bp, phy, edc_mode);  in bnx2x_set_limiting_mode()
8675 		bnx2x_8727_set_limiting_mode(params->bp, phy, edc_mode);  in bnx2x_set_limiting_mode()
8678 		bnx2x_warpcore_set_limiting_mode(params, phy, edc_mode);  in bnx2x_set_limiting_mode()
8684 				      struct link_params *params)  in bnx2x_sfp_module_detection()  argument
8686 	struct bnx2x *bp = params->bp;  in bnx2x_sfp_module_detection()
8690 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_module_detection()
8692 				     port_feature_config[params->port].config));  in bnx2x_sfp_module_detection()
8694 	bnx2x_sfp_set_transmitter(params, phy, 1);  in bnx2x_sfp_module_detection()
8696 		 params->port);  in bnx2x_sfp_module_detection()
8698 	bnx2x_power_sfp_module(params, phy, 1);  in bnx2x_sfp_module_detection()
8699 	if (bnx2x_get_edc_mode(phy, params, &edc_mode) != 0) {  in bnx2x_sfp_module_detection()
8702 	} else if (bnx2x_verify_sfp_module(phy, params) != 0) {  in bnx2x_sfp_module_detection()
8707 		bnx2x_set_sfp_module_fault_led(params,  in bnx2x_sfp_module_detection()
8714 			bnx2x_power_sfp_module(params, phy, 0);  in bnx2x_sfp_module_detection()
8719 		bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_LOW);  in bnx2x_sfp_module_detection()
8725 	bnx2x_set_limiting_mode(params, phy, edc_mode);  in bnx2x_sfp_module_detection()
8733 		bnx2x_sfp_set_transmitter(params, phy, 0);  in bnx2x_sfp_module_detection()
8738 void bnx2x_handle_module_detect_int(struct link_params *params)  in bnx2x_handle_module_detect_int()  argument
8740 	struct bnx2x *bp = params->bp;  in bnx2x_handle_module_detect_int()
8745 		phy = &params->phy[INT_PHY];  in bnx2x_handle_module_detect_int()
8747 		bnx2x_sfp_set_transmitter(params, phy, 1);  in bnx2x_handle_module_detect_int()
8749 		phy = &params->phy[EXT_PHY1];  in bnx2x_handle_module_detect_int()
8751 	if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base,  in bnx2x_handle_module_detect_int()
8752 				      params->port, &gpio_num, &gpio_port) ==  in bnx2x_handle_module_detect_int()
8759 	bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_HIGH);  in bnx2x_handle_module_detect_int()
8766 		bnx2x_set_mdio_emac_per_phy(bp, params);  in bnx2x_handle_module_detect_int()
8767 		bnx2x_set_aer_mmd(params, phy);  in bnx2x_handle_module_detect_int()
8769 		bnx2x_power_sfp_module(params, phy, 1);  in bnx2x_handle_module_detect_int()
8773 		if (bnx2x_wait_for_sfp_module_initialized(phy, params) == 0) {  in bnx2x_handle_module_detect_int()
8774 			bnx2x_sfp_module_detection(phy, params);  in bnx2x_handle_module_detect_int()
8786 				    (params->link_flags &  in bnx2x_handle_module_detect_int()
8789 					bnx2x_warpcore_config_sfi(phy, params);  in bnx2x_handle_module_detect_int()
8834 				      struct link_params *params,  in bnx2x_8706_8726_read_status()  argument
8839 	struct bnx2x *bp = params->bp;  in bnx2x_8706_8726_read_status()
8875 		bnx2x_ext_phy_resolve_fc(phy, params, vars);  in bnx2x_8706_8726_read_status()
8896 				   struct link_params *params,  in bnx2x_8706_config_init()  argument
8901 	struct bnx2x *bp = params->bp;  in bnx2x_8706_config_init()
8904 		       MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port);  in bnx2x_8706_config_init()
8906 	bnx2x_ext_phy_hw_reset(bp, params->port);  in bnx2x_8706_config_init()
8908 	bnx2x_wait_reset_complete(bp, phy, params);  in bnx2x_8706_config_init()
8919 	if ((params->feature_config_flags &  in bnx2x_8706_config_init()
8978 	bnx2x_save_bcm_spirom_ver(bp, phy, params->port);  in bnx2x_8706_config_init()
8984 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8706_config_init()
8986 				dev_info.port_hw_config[params->port].sfp_ctrl))  in bnx2x_8706_config_init()
9000 				 struct link_params *params,  in bnx2x_8706_read_status()  argument
9003 	return bnx2x_8706_8726_read_status(phy, params, vars);  in bnx2x_8706_read_status()
9010 				       struct link_params *params)  in bnx2x_8726_config_loopback()  argument
9012 	struct bnx2x *bp = params->bp;  in bnx2x_8726_config_loopback()
9018 					 struct link_params *params)  in bnx2x_8726_external_rom_boot()  argument
9020 	struct bnx2x *bp = params->bp;  in bnx2x_8726_external_rom_boot()
9052 	bnx2x_save_bcm_spirom_ver(bp, phy, params->port);  in bnx2x_8726_external_rom_boot()
9056 				 struct link_params *params,  in bnx2x_8726_read_status()  argument
9059 	struct bnx2x *bp = params->bp;  in bnx2x_8726_read_status()
9061 	u8 link_up = bnx2x_8706_8726_read_status(phy, params, vars);  in bnx2x_8726_read_status()
9077 				   struct link_params *params,  in bnx2x_8726_config_init()  argument
9080 	struct bnx2x *bp = params->bp;  in bnx2x_8726_config_init()
9084 	bnx2x_wait_reset_complete(bp, phy, params);  in bnx2x_8726_config_init()
9086 	bnx2x_8726_external_rom_boot(phy, params);  in bnx2x_8726_config_init()
9093 	bnx2x_sfp_module_detection(phy, params);  in bnx2x_8726_config_init()
9114 		bnx2x_ext_phy_set_pause(params, phy, vars);  in bnx2x_8726_config_init()
9140 	if ((params->feature_config_flags &  in bnx2x_8726_config_init()
9159 				  struct link_params *params)  in bnx2x_8726_link_reset()  argument
9161 	struct bnx2x *bp = params->bp;  in bnx2x_8726_link_reset()
9162 	DP(NETIF_MSG_LINK, "bnx2x_8726_link_reset port %d\n", params->port);  in bnx2x_8726_link_reset()
9174 				    struct link_params *params, u8 mode)  in bnx2x_8727_set_link_led()  argument
9176 	struct bnx2x *bp = params->bp;  in bnx2x_8727_set_link_led()
9220 				struct link_params *params) {  in bnx2x_8727_hw_reset()  argument
9226 	struct bnx2x *bp = params->bp;  in bnx2x_8727_hw_reset()
9235 				    struct link_params *params)  in bnx2x_8727_config_speed()  argument
9237 	struct bnx2x *bp = params->bp;  in bnx2x_8727_config_speed()
9253 		if (DUAL_MEDIA(params)) {  in bnx2x_8727_config_speed()
9292 				   struct link_params *params,  in bnx2x_8727_config_init()  argument
9297 	struct bnx2x *bp = params->bp;  in bnx2x_8727_config_init()
9300 	bnx2x_wait_reset_complete(bp, phy, params);  in bnx2x_8727_config_init()
9304 	bnx2x_8727_specific_func(phy, params, PHY_INIT);  in bnx2x_8727_config_init()
9321 	bnx2x_set_disable_pmd_transmit(params, phy, 0);  in bnx2x_8727_config_init()
9331 	bnx2x_8727_config_speed(phy, params);  in bnx2x_8727_config_init()
9335 	if ((params->feature_config_flags &  in bnx2x_8727_config_init()
9352 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8727_config_init()
9354 				dev_info.port_hw_config[params->port].sfp_ctrl))  in bnx2x_8727_config_init()
9376 				      struct link_params *params)  in bnx2x_8727_handle_mod_abs()  argument
9378 	struct bnx2x *bp = params->bp;  in bnx2x_8727_handle_mod_abs()
9380 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_8727_handle_mod_abs()
9382 				      port_feature_config[params->port].  in bnx2x_8727_handle_mod_abs()
9444 			bnx2x_sfp_set_transmitter(params, phy, 0);  in bnx2x_8727_handle_mod_abs()
9446 		if (bnx2x_wait_for_sfp_module_initialized(phy, params) == 0)  in bnx2x_8727_handle_mod_abs()
9447 			bnx2x_sfp_module_detection(phy, params);  in bnx2x_8727_handle_mod_abs()
9452 		bnx2x_8727_config_speed(phy, params);  in bnx2x_8727_handle_mod_abs()
9461 				 struct link_params *params,  in bnx2x_8727_read_status()  argument
9465 	struct bnx2x *bp = params->bp;  in bnx2x_8727_read_status()
9466 	u8 link_up = 0, oc_port = params->port;  in bnx2x_8727_read_status()
9507 				oc_port = BP_PATH(bp) + (params->port << 1);  in bnx2x_8727_read_status()
9536 			bnx2x_8727_power_module(params->bp, phy, 0);  in bnx2x_8727_read_status()
9543 		bnx2x_8727_handle_mod_abs(phy, params);  in bnx2x_8727_read_status()
9552 		bnx2x_sfp_set_transmitter(params, phy, 1);  in bnx2x_8727_read_status()
9569 			   params->port);  in bnx2x_8727_read_status()
9574 			   params->port);  in bnx2x_8727_read_status()
9578 			   params->port);  in bnx2x_8727_read_status()
9595 		bnx2x_ext_phy_resolve_fc(phy, params, vars);  in bnx2x_8727_read_status()
9600 	if ((DUAL_MEDIA(params)) &&  in bnx2x_8727_read_status()
9620 				  struct link_params *params)  in bnx2x_8727_link_reset()  argument
9622 	struct bnx2x *bp = params->bp;  in bnx2x_8727_link_reset()
9625 	bnx2x_set_disable_pmd_transmit(params, phy, 1);  in bnx2x_8727_link_reset()
9628 	bnx2x_sfp_set_transmitter(params, phy, 0);  in bnx2x_8727_link_reset()
9779 				      struct link_params *params,  in bnx2x_848xx_specific_func()  argument
9782 	struct bnx2x *bp = params->bp;  in bnx2x_848xx_specific_func()
9787 			bnx2x_save_848xx_spirom_version(phy, bp, params->port);  in bnx2x_848xx_specific_func()
9793 		bnx2x_bits_en(bp, NIG_REG_LATCH_BC_0 + params->port*4,  in bnx2x_848xx_specific_func()
9802 				       struct link_params *params,  in bnx2x_848xx_cmn_config_init()  argument
9805 	struct bnx2x *bp = params->bp;  in bnx2x_848xx_cmn_config_init()
9808 	bnx2x_848xx_specific_func(phy, params, PHY_INIT);  in bnx2x_848xx_cmn_config_init()
9817 	bnx2x_ext_phy_set_pause(params, phy, vars);  in bnx2x_848xx_cmn_config_init()
9948 				   struct link_params *params,  in bnx2x_8481_config_init()  argument
9951 	struct bnx2x *bp = params->bp;  in bnx2x_8481_config_init()
9954 		       MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port);  in bnx2x_8481_config_init()
9957 	bnx2x_ext_phy_hw_reset(bp, params->port);  in bnx2x_8481_config_init()
9958 	bnx2x_wait_reset_complete(bp, phy, params);  in bnx2x_8481_config_init()
9961 	bnx2x_848xx_cmn_config_init(phy, params, vars);  in bnx2x_8481_config_init()
9968 				struct link_params *params,  in bnx2x_84858_cmd_hdlr()  argument
9974 	struct bnx2x *bp = params->bp;  in bnx2x_84858_cmd_hdlr()
10045 				struct link_params *params, u16 fw_cmd,  in bnx2x_84833_cmd_hdlr()  argument
10050 	struct bnx2x *bp = params->bp;  in bnx2x_84833_cmd_hdlr()
10123 				struct link_params *params,  in bnx2x_848xx_cmd_hdlr()  argument
10128 	struct bnx2x *bp = params->bp;  in bnx2x_848xx_cmd_hdlr()
10131 	    (REG_RD(bp, params->shmem2_base +  in bnx2x_848xx_cmd_hdlr()
10133 			     link_attr_sync[params->port])) &  in bnx2x_848xx_cmd_hdlr()
10135 		return bnx2x_84858_cmd_hdlr(phy, params, fw_cmd, cmd_args,  in bnx2x_848xx_cmd_hdlr()
10138 		return bnx2x_84833_cmd_hdlr(phy, params, fw_cmd, cmd_args,  in bnx2x_848xx_cmd_hdlr()
10144 				     struct link_params *params,  in bnx2x_848xx_pair_swap_cfg()  argument
10150 	struct bnx2x *bp = params->bp;  in bnx2x_848xx_pair_swap_cfg()
10153 	pair_swap = REG_RD(bp, params->shmem_base +  in bnx2x_848xx_pair_swap_cfg()
10155 			dev_info.port_hw_config[params->port].xgbt_phy_cfg)) &  in bnx2x_848xx_pair_swap_cfg()
10164 	status = bnx2x_848xx_cmd_hdlr(phy, params,  in bnx2x_848xx_pair_swap_cfg()
10212 				     struct link_params *params)  in bnx2x_84833_hw_reset_phy()  argument
10214 	struct bnx2x *bp = params->bp;  in bnx2x_84833_hw_reset_phy()
10216 	u32 other_shmem_base_addr = REG_RD(bp, params->shmem2_base +  in bnx2x_84833_hw_reset_phy()
10230 	shmem_base_path[0] = params->shmem_base;  in bnx2x_84833_hw_reset_phy()
10234 						  params->chip_id);  in bnx2x_84833_hw_reset_phy()
10243 				   struct link_params *params,  in bnx2x_8483x_disable_eee()  argument
10247 	struct bnx2x *bp = params->bp;  in bnx2x_8483x_disable_eee()
10253 	rc = bnx2x_848xx_cmd_hdlr(phy, params, PHY848xx_CMD_SET_EEE_MODE,  in bnx2x_8483x_disable_eee()
10260 	return bnx2x_eee_disable(phy, params, vars);  in bnx2x_8483x_disable_eee()
10264 				   struct link_params *params,  in bnx2x_8483x_enable_eee()  argument
10268 	struct bnx2x *bp = params->bp;  in bnx2x_8483x_enable_eee()
10271 	rc = bnx2x_848xx_cmd_hdlr(phy, params, PHY848xx_CMD_SET_EEE_MODE,  in bnx2x_8483x_enable_eee()
10278 	return bnx2x_eee_advertise(phy, params, vars, SHMEM_EEE_10G_ADV);  in bnx2x_8483x_enable_eee()
10283 				    struct link_params *params,  in bnx2x_848x3_config_init()  argument
10286 	struct bnx2x *bp = params->bp;  in bnx2x_848x3_config_init()
10298 		port = params->port;  in bnx2x_848x3_config_init()
10311 	bnx2x_wait_reset_complete(bp, phy, params);  in bnx2x_848x3_config_init()
10322 		bnx2x_set_autoneg(&params->phy[INT_PHY], params, vars, 0);  in bnx2x_848x3_config_init()
10323 		bnx2x_program_serdes(&params->phy[INT_PHY], params, vars);  in bnx2x_848x3_config_init()
10333 			params->link_attr_sync |= LINK_ATTR_84858;  in bnx2x_848x3_config_init()
10334 			bnx2x_update_link_attr(params, params->link_attr_sync);  in bnx2x_848x3_config_init()
10355 	actual_phy_selection = bnx2x_phy_selection(params);  in bnx2x_848x3_config_init()
10375 	if (params->phy[EXT_PHY2].req_line_speed == SPEED_1000)  in bnx2x_848x3_config_init()
10381 		   params->multi_phy_config, val);  in bnx2x_848x3_config_init()
10384 		bnx2x_848xx_pair_swap_cfg(phy, params, vars);  in bnx2x_848x3_config_init()
10391 		rc = bnx2x_848xx_cmd_hdlr(phy, params,  in bnx2x_848x3_config_init()
10398 		rc = bnx2x_848xx_cmn_config_init(phy, params, vars);  in bnx2x_848x3_config_init()
10400 		bnx2x_save_848xx_spirom_version(phy, bp, params->port);  in bnx2x_848x3_config_init()
10403 		u32 cms_enable = REG_RD(bp, params->shmem_base +  in bnx2x_848x3_config_init()
10405 			dev_info.port_hw_config[params->port].default_cfg)) &  in bnx2x_848x3_config_init()
10424 	    bnx2x_eee_has_cap(params)) {  in bnx2x_848x3_config_init()
10425 		rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_10G_ADV);  in bnx2x_848x3_config_init()
10428 			bnx2x_8483x_disable_eee(phy, params, vars);  in bnx2x_848x3_config_init()
10433 		    (params->eee_mode & EEE_MODE_ADV_LPI) &&  in bnx2x_848x3_config_init()
10434 		    (bnx2x_eee_calc_timer(params) ||  in bnx2x_848x3_config_init()
10435 		     !(params->eee_mode & EEE_MODE_ENABLE_LPI)))  in bnx2x_848x3_config_init()
10436 			rc = bnx2x_8483x_enable_eee(phy, params, vars);  in bnx2x_848x3_config_init()
10438 			rc = bnx2x_8483x_disable_eee(phy, params, vars);  in bnx2x_848x3_config_init()
10483 				  struct link_params *params,  in bnx2x_848xx_read_status()  argument
10486 	struct bnx2x *bp = params->bp;  in bnx2x_848xx_read_status()
10565 		bnx2x_ext_phy_resolve_fc(phy, params, vars);  in bnx2x_848xx_read_status()
10605 			bnx2x_eee_an_resolve(phy, params, vars);  in bnx2x_848xx_read_status()
10629 				struct link_params *params)  in bnx2x_8481_hw_reset()  argument
10631 	bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1,  in bnx2x_8481_hw_reset()
10633 	bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1,  in bnx2x_8481_hw_reset()
10638 					struct link_params *params)  in bnx2x_8481_link_reset()  argument
10640 	bnx2x_cl45_write(params->bp, phy,  in bnx2x_8481_link_reset()
10642 	bnx2x_cl45_write(params->bp, phy,  in bnx2x_8481_link_reset()
10647 				   struct link_params *params)  in bnx2x_848x3_link_reset()  argument
10649 	struct bnx2x *bp = params->bp;  in bnx2x_848x3_link_reset()
10656 		port = params->port;  in bnx2x_848x3_link_reset()
10674 				     struct link_params *params, u8 mode)  in bnx2x_848xx_set_link_led()  argument
10676 	struct bnx2x *bp = params->bp;  in bnx2x_848xx_set_link_led()
10683 		port = params->port;  in bnx2x_848xx_set_link_led()
10690 		if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) ==  in bnx2x_848xx_set_link_led()
10741 		if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) ==  in bnx2x_848xx_set_link_led()
10776 					   params->port*4) &  in bnx2x_848xx_set_link_led()
10778 					params->link_flags |=  in bnx2x_848xx_set_link_led()
10784 						params->port*4,  in bnx2x_848xx_set_link_led()
10811 		if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) ==  in bnx2x_848xx_set_link_led()
10857 					   params->port*4) &  in bnx2x_848xx_set_link_led()
10859 					params->link_flags |=  in bnx2x_848xx_set_link_led()
10865 						params->port*4,  in bnx2x_848xx_set_link_led()
10899 		if ((params->hw_led_mode << SHARED_HW_CFG_LED_MODE_SHIFT) ==  in bnx2x_848xx_set_link_led()
10944 			val = ((params->hw_led_mode <<  in bnx2x_848xx_set_link_led()
10984 				if (params->link_flags &  in bnx2x_848xx_set_link_led()
10986 					bnx2x_link_int_enable(params);  in bnx2x_848xx_set_link_led()
10987 					params->link_flags &=  in bnx2x_848xx_set_link_led()
11008 					struct link_params *params,  in bnx2x_54618se_specific_func()  argument
11011 	struct bnx2x *bp = params->bp;  in bnx2x_54618se_specific_func()
11037 				      struct link_params *params,  in bnx2x_54618se_config_init()  argument
11040 	struct bnx2x *bp = params->bp;  in bnx2x_54618se_config_init()
11051 	port = params->port;  in bnx2x_54618se_config_init()
11053 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_config_init()
11068 	bnx2x_wait_reset_complete(bp, phy, params);  in bnx2x_54618se_config_init()
11074 	bnx2x_54618se_specific_func(phy, params, PHY_INIT);  in bnx2x_54618se_config_init()
11089 	bnx2x_calc_ieee_aneg_adv(phy, params, &vars->ieee_fc);  in bnx2x_54618se_config_init()
11181 	if ((phy->flags & FLAGS_EEE) && bnx2x_eee_has_cap(params)) {  in bnx2x_54618se_config_init()
11191 		rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_1G_ADV);  in bnx2x_54618se_config_init()
11194 			bnx2x_eee_disable(phy, params, vars);  in bnx2x_54618se_config_init()
11195 		} else if ((params->eee_mode & EEE_MODE_ADV_LPI) &&  in bnx2x_54618se_config_init()
11197 			   (bnx2x_eee_calc_timer(params) ||  in bnx2x_54618se_config_init()
11198 			    !(params->eee_mode & EEE_MODE_ENABLE_LPI))) {  in bnx2x_54618se_config_init()
11204 			bnx2x_eee_advertise(phy, params, vars,  in bnx2x_54618se_config_init()
11208 			bnx2x_eee_disable(phy, params, vars);  in bnx2x_54618se_config_init()
11216 			if (params->feature_config_flags &  in bnx2x_54618se_config_init()
11242 				       struct link_params *params, u8 mode)  in bnx2x_5461x_set_link_led()  argument
11244 	struct bnx2x *bp = params->bp;  in bnx2x_5461x_set_link_led()
11278 				     struct link_params *params)  in bnx2x_54618se_link_reset()  argument
11280 	struct bnx2x *bp = params->bp;  in bnx2x_54618se_link_reset()
11291 	port = params->port;  in bnx2x_54618se_link_reset()
11292 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_link_reset()
11303 				    struct link_params *params,  in bnx2x_54618se_read_status()  argument
11306 	struct bnx2x *bp = params->bp;  in bnx2x_54618se_read_status()
11371 		bnx2x_ext_phy_resolve_fc(phy, params, vars);  in bnx2x_54618se_read_status()
11402 			    bnx2x_eee_has_cap(params))  in bnx2x_54618se_read_status()
11403 				bnx2x_eee_an_resolve(phy, params, vars);  in bnx2x_54618se_read_status()
11410 					  struct link_params *params)  in bnx2x_54618se_config_loopback()  argument
11412 	struct bnx2x *bp = params->bp;  in bnx2x_54618se_config_loopback()
11414 	u32 umac_base = params->port ? GRCBASE_UMAC1 : GRCBASE_UMAC0;  in bnx2x_54618se_config_loopback()
11441 	REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4, 1);  in bnx2x_54618se_config_loopback()
11453 				       struct link_params *params)  in bnx2x_7101_config_loopback()  argument
11455 	struct bnx2x *bp = params->bp;  in bnx2x_7101_config_loopback()
11462 				   struct link_params *params,  in bnx2x_7101_config_init()  argument
11466 	struct bnx2x *bp = params->bp;  in bnx2x_7101_config_init()
11471 		       MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port);  in bnx2x_7101_config_init()
11473 	bnx2x_ext_phy_hw_reset(bp, params->port);  in bnx2x_7101_config_init()
11474 	bnx2x_wait_reset_complete(bp, phy, params);  in bnx2x_7101_config_init()
11482 	bnx2x_ext_phy_set_pause(params, phy, vars);  in bnx2x_7101_config_init()
11496 	bnx2x_save_spirom_version(bp, params->port,  in bnx2x_7101_config_init()
11501 				 struct link_params *params,  in bnx2x_7101_read_status()  argument
11504 	struct bnx2x *bp = params->bp;  in bnx2x_7101_read_status()
11530 		bnx2x_ext_phy_resolve_fc(phy, params, vars);  in bnx2x_7101_read_status()
11579 				struct link_params *params) {  in bnx2x_7101_hw_reset()  argument
11581 	bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_2,  in bnx2x_7101_hw_reset()
11582 		       MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port);  in bnx2x_7101_hw_reset()
11584 	bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1,  in bnx2x_7101_hw_reset()
11585 		       MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port);  in bnx2x_7101_hw_reset()
11589 				    struct link_params *params, u8 mode)  in bnx2x_7101_set_link_led()  argument
11592 	struct bnx2x *bp = params->bp;  in bnx2x_7101_set_link_led()
12481 static void bnx2x_phy_def_cfg(struct link_params *params,  in bnx2x_phy_def_cfg()  argument
12485 	struct bnx2x *bp = params->bp;  in bnx2x_phy_def_cfg()
12489 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12491 			port_feature_config[params->port].link_config2));  in bnx2x_phy_def_cfg()
12492 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12495 			port_hw_config[params->port].speed_capability_mask2));  in bnx2x_phy_def_cfg()
12497 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12499 				port_feature_config[params->port].link_config));  in bnx2x_phy_def_cfg()
12500 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12503 			port_hw_config[params->port].speed_capability_mask));  in bnx2x_phy_def_cfg()
12556 u32 bnx2x_phy_selection(struct link_params *params)  in bnx2x_phy_selection()  argument
12561 	phy_config_swapped = params->multi_phy_config &  in bnx2x_phy_selection()
12564 	prio_cfg = params->multi_phy_config &  in bnx2x_phy_selection()
12588 int bnx2x_phy_probe(struct link_params *params)  in bnx2x_phy_probe()  argument
12592 	struct bnx2x *bp = params->bp;  in bnx2x_phy_probe()
12594 	params->num_phys = 0;  in bnx2x_phy_probe()
12596 	phy_config_swapped = params->multi_phy_config &  in bnx2x_phy_probe()
12611 		phy = &params->phy[actual_phy_idx];  in bnx2x_phy_probe()
12612 		if (bnx2x_populate_phy(bp, phy_index, params->shmem_base,  in bnx2x_phy_probe()
12613 				       params->shmem2_base, params->port,  in bnx2x_phy_probe()
12615 			params->num_phys = 0;  in bnx2x_phy_probe()
12627 		if (params->feature_config_flags &  in bnx2x_phy_probe()
12631 		if (!(params->feature_config_flags &  in bnx2x_phy_probe()
12635 		sync_offset = params->shmem_base +  in bnx2x_phy_probe()
12637 			dev_info.port_hw_config[params->port].media_type);  in bnx2x_phy_probe()
12654 		bnx2x_phy_def_cfg(params, phy, phy_index);  in bnx2x_phy_probe()
12655 		params->num_phys++;  in bnx2x_phy_probe()
12658 	DP(NETIF_MSG_LINK, "End phy probe. #phys found %x\n", params->num_phys);  in bnx2x_phy_probe()
12662 static void bnx2x_init_bmac_loopback(struct link_params *params,  in bnx2x_init_bmac_loopback()  argument
12665 	struct bnx2x *bp = params->bp;  in bnx2x_init_bmac_loopback()
12674 	bnx2x_xgxs_deassert(params);  in bnx2x_init_bmac_loopback()
12677 	bnx2x_bmac_enable(params, vars, 1, 1);  in bnx2x_init_bmac_loopback()
12679 	REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port * 4, 0);  in bnx2x_init_bmac_loopback()
12682 static void bnx2x_init_emac_loopback(struct link_params *params,  in bnx2x_init_emac_loopback()  argument
12685 	struct bnx2x *bp = params->bp;  in bnx2x_init_emac_loopback()
12694 	bnx2x_xgxs_deassert(params);  in bnx2x_init_emac_loopback()
12696 	bnx2x_emac_enable(params, vars, 1);  in bnx2x_init_emac_loopback()
12697 	bnx2x_emac_program(params, vars);  in bnx2x_init_emac_loopback()
12698 	REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port * 4, 0);  in bnx2x_init_emac_loopback()
12701 static void bnx2x_init_xmac_loopback(struct link_params *params,  in bnx2x_init_xmac_loopback()  argument
12704 	struct bnx2x *bp = params->bp;  in bnx2x_init_xmac_loopback()
12706 	if (!params->req_line_speed[0])  in bnx2x_init_xmac_loopback()
12709 		vars->line_speed = params->req_line_speed[0];  in bnx2x_init_xmac_loopback()
12717 	bnx2x_set_aer_mmd(params, &params->phy[0]);  in bnx2x_init_xmac_loopback()
12718 	bnx2x_warpcore_reset_lane(bp, &params->phy[0], 0);  in bnx2x_init_xmac_loopback()
12719 	params->phy[INT_PHY].config_loopback(  in bnx2x_init_xmac_loopback()
12720 			&params->phy[INT_PHY],  in bnx2x_init_xmac_loopback()
12721 			params);  in bnx2x_init_xmac_loopback()
12723 	bnx2x_xmac_enable(params, vars, 1);  in bnx2x_init_xmac_loopback()
12724 	REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);  in bnx2x_init_xmac_loopback()
12727 static void bnx2x_init_umac_loopback(struct link_params *params,  in bnx2x_init_umac_loopback()  argument
12730 	struct bnx2x *bp = params->bp;  in bnx2x_init_umac_loopback()
12737 	bnx2x_umac_enable(params, vars, 1);  in bnx2x_init_umac_loopback()
12739 	REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);  in bnx2x_init_umac_loopback()
12742 static void bnx2x_init_xgxs_loopback(struct link_params *params,  in bnx2x_init_xgxs_loopback()  argument
12745 	struct bnx2x *bp = params->bp;  in bnx2x_init_xgxs_loopback()
12746 	struct bnx2x_phy *int_phy = &params->phy[INT_PHY];  in bnx2x_init_xgxs_loopback()
12750 	if (params->req_line_speed[0] == SPEED_1000)  in bnx2x_init_xgxs_loopback()
12752 	else if ((params->req_line_speed[0] == SPEED_20000) ||  in bnx2x_init_xgxs_loopback()
12759 		bnx2x_xgxs_deassert(params);  in bnx2x_init_xgxs_loopback()
12760 	bnx2x_link_initialize(params, vars);  in bnx2x_init_xgxs_loopback()
12762 	if (params->req_line_speed[0] == SPEED_1000) {  in bnx2x_init_xgxs_loopback()
12764 			bnx2x_umac_enable(params, vars, 0);  in bnx2x_init_xgxs_loopback()
12766 			bnx2x_emac_program(params, vars);  in bnx2x_init_xgxs_loopback()
12767 			bnx2x_emac_enable(params, vars, 0);  in bnx2x_init_xgxs_loopback()
12771 			bnx2x_xmac_enable(params, vars, 0);  in bnx2x_init_xgxs_loopback()
12773 			bnx2x_bmac_enable(params, vars, 0, 1);  in bnx2x_init_xgxs_loopback()
12776 	if (params->loopback_mode == LOOPBACK_XGXS) {  in bnx2x_init_xgxs_loopback()
12778 		int_phy->config_loopback(int_phy, params);  in bnx2x_init_xgxs_loopback()
12783 		      phy_index < params->num_phys; phy_index++)  in bnx2x_init_xgxs_loopback()
12784 			if (params->phy[phy_index].config_loopback)  in bnx2x_init_xgxs_loopback()
12785 				params->phy[phy_index].config_loopback(  in bnx2x_init_xgxs_loopback()
12786 					&params->phy[phy_index],  in bnx2x_init_xgxs_loopback()
12787 					params);  in bnx2x_init_xgxs_loopback()
12789 	REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);  in bnx2x_init_xgxs_loopback()
12791 	bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed);  in bnx2x_init_xgxs_loopback()
12794 void bnx2x_set_rx_filter(struct link_params *params, u8 en)  in bnx2x_set_rx_filter()  argument
12796 	struct bnx2x *bp = params->bp;  in bnx2x_set_rx_filter()
12802 	REG_WR(bp, NIG_REG_LLH0_BRB1_DRV_MASK + params->port*4, val);  in bnx2x_set_rx_filter()
12805 		REG_WR(bp, NIG_REG_LLH0_BRB1_DRV_MASK_MF + params->port*4,  in bnx2x_set_rx_filter()
12809 	REG_WR(bp, (params->port ? NIG_REG_LLH1_BRB1_NOT_MCP :  in bnx2x_set_rx_filter()
12812 static int bnx2x_avoid_link_flap(struct link_params *params,  in bnx2x_avoid_link_flap()  argument
12817 	struct bnx2x *bp = params->bp;  in bnx2x_avoid_link_flap()
12819 	bnx2x_set_mdio_emac_per_phy(bp, params);  in bnx2x_avoid_link_flap()
12821 	bnx2x_link_status_update(params, vars);  in bnx2x_avoid_link_flap()
12828 	for (phy_idx = INT_PHY; phy_idx < params->num_phys; phy_idx++) {  in bnx2x_avoid_link_flap()
12829 		struct bnx2x_phy *phy = &params->phy[phy_idx];  in bnx2x_avoid_link_flap()
12832 			phy->phy_specific_func(phy, params, PHY_INIT);  in bnx2x_avoid_link_flap()
12837 			bnx2x_verify_sfp_module(phy, params);  in bnx2x_avoid_link_flap()
12839 	lfa_sts = REG_RD(bp, params->lfa_base +  in bnx2x_avoid_link_flap()
12851 				params->port));  in bnx2x_avoid_link_flap()
12855 				params->port));  in bnx2x_avoid_link_flap()
12858 			bnx2x_umac_enable(params, vars, 0);  in bnx2x_avoid_link_flap()
12860 			bnx2x_xmac_enable(params, vars, 0);  in bnx2x_avoid_link_flap()
12863 			bnx2x_emac_enable(params, vars, 0);  in bnx2x_avoid_link_flap()
12865 			bnx2x_bmac_enable(params, vars, 0, !dont_clear_stat);  in bnx2x_avoid_link_flap()
12876 	REG_WR(bp, params->lfa_base +  in bnx2x_avoid_link_flap()
12880 	REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);  in bnx2x_avoid_link_flap()
12883 	bnx2x_link_int_enable(params);  in bnx2x_avoid_link_flap()
12887 static void bnx2x_cannot_avoid_link_flap(struct link_params *params,  in bnx2x_cannot_avoid_link_flap()  argument
12892 	struct bnx2x *bp = params->bp;  in bnx2x_cannot_avoid_link_flap()
12894 	bnx2x_link_reset(params, vars, 1);  in bnx2x_cannot_avoid_link_flap()
12896 	if (!params->lfa_base)  in bnx2x_cannot_avoid_link_flap()
12899 	REG_WR(bp, params->lfa_base +  in bnx2x_cannot_avoid_link_flap()
12901 	       params->req_duplex[0] | (params->req_duplex[1] << 16));  in bnx2x_cannot_avoid_link_flap()
12903 	REG_WR(bp, params->lfa_base +  in bnx2x_cannot_avoid_link_flap()
12905 	       params->req_flow_ctrl[0] | (params->req_flow_ctrl[1] << 16));  in bnx2x_cannot_avoid_link_flap()
12907 	REG_WR(bp, params->lfa_base +  in bnx2x_cannot_avoid_link_flap()
12909 	       params->req_line_speed[0] | (params->req_line_speed[1] << 16));  in bnx2x_cannot_avoid_link_flap()
12912 		REG_WR(bp, params->lfa_base +  in bnx2x_cannot_avoid_link_flap()
12915 		       params->speed_cap_mask[cfg_idx]);  in bnx2x_cannot_avoid_link_flap()
12918 	tmp_val = REG_RD(bp, params->lfa_base +  in bnx2x_cannot_avoid_link_flap()
12921 	tmp_val |= params->req_fc_auto_adv;  in bnx2x_cannot_avoid_link_flap()
12923 	REG_WR(bp, params->lfa_base +  in bnx2x_cannot_avoid_link_flap()
12926 	lfa_sts = REG_RD(bp, params->lfa_base +  in bnx2x_cannot_avoid_link_flap()
12942 	REG_WR(bp, params->lfa_base +  in bnx2x_cannot_avoid_link_flap()
12947 int bnx2x_phy_init(struct link_params *params, struct link_vars *vars)  in bnx2x_phy_init()  argument
12950 	struct bnx2x *bp = params->bp;  in bnx2x_phy_init()
12953 		   params->req_line_speed[0], params->req_flow_ctrl[0]);  in bnx2x_phy_init()
12955 		   params->req_line_speed[1], params->req_flow_ctrl[1]);  in bnx2x_phy_init()
12956 	DP(NETIF_MSG_LINK, "req_adv_flow_ctrl 0x%x\n", params->req_fc_auto_adv);  in bnx2x_phy_init()
12966 	params->link_flags = PHY_INITIALIZED;  in bnx2x_phy_init()
12968 	bnx2x_set_rx_filter(params, 1);  in bnx2x_phy_init()
12969 	bnx2x_chng_link_count(params, true);  in bnx2x_phy_init()
12971 	lfa_status = bnx2x_check_lfa(params);  in bnx2x_phy_init()
12975 		return bnx2x_avoid_link_flap(params, vars);  in bnx2x_phy_init()
12980 	bnx2x_cannot_avoid_link_flap(params, vars, lfa_status);  in bnx2x_phy_init()
12983 	bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4,  in bnx2x_phy_init()
12989 	bnx2x_emac_init(params, vars);  in bnx2x_phy_init()
12991 	if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED)  in bnx2x_phy_init()
12994 	if (params->num_phys == 0) {  in bnx2x_phy_init()
12998 	set_phy_vars(params, vars);  in bnx2x_phy_init()
13000 	DP(NETIF_MSG_LINK, "Num of phys on board: %d\n", params->num_phys);  in bnx2x_phy_init()
13001 	switch (params->loopback_mode) {  in bnx2x_phy_init()
13003 		bnx2x_init_bmac_loopback(params, vars);  in bnx2x_phy_init()
13006 		bnx2x_init_emac_loopback(params, vars);  in bnx2x_phy_init()
13009 		bnx2x_init_xmac_loopback(params, vars);  in bnx2x_phy_init()
13012 		bnx2x_init_umac_loopback(params, vars);  in bnx2x_phy_init()
13016 		bnx2x_init_xgxs_loopback(params, vars);  in bnx2x_phy_init()
13020 			if (params->switch_cfg == SWITCH_CFG_10G)  in bnx2x_phy_init()
13021 				bnx2x_xgxs_deassert(params);  in bnx2x_phy_init()
13023 				bnx2x_serdes_deassert(bp, params->port);  in bnx2x_phy_init()
13025 		bnx2x_link_initialize(params, vars);  in bnx2x_phy_init()
13027 		bnx2x_link_int_enable(params);  in bnx2x_phy_init()
13030 	bnx2x_update_mng(params, vars->link_status);  in bnx2x_phy_init()
13032 	bnx2x_update_mng_eee(params, vars->eee_status);  in bnx2x_phy_init()
13036 int bnx2x_link_reset(struct link_params *params, struct link_vars *vars,  in bnx2x_link_reset()  argument
13039 	struct bnx2x *bp = params->bp;  in bnx2x_link_reset()
13040 	u8 phy_index, port = params->port, clear_latch_ind = 0;  in bnx2x_link_reset()
13044 	bnx2x_chng_link_count(params, true);  in bnx2x_link_reset()
13045 	bnx2x_update_mng(params, vars->link_status);  in bnx2x_link_reset()
13048 	bnx2x_update_mng_eee(params, vars->eee_status);  in bnx2x_link_reset()
13065 		bnx2x_set_bmac_rx(bp, params->chip_id, port, 0);  in bnx2x_link_reset()
13067 		bnx2x_set_xmac_rxtx(params, 0);  in bnx2x_link_reset()
13068 		bnx2x_set_umac_rxtx(params, 0);  in bnx2x_link_reset()
13079 	bnx2x_set_mdio_emac_per_phy(bp, params);  in bnx2x_link_reset()
13080 	bnx2x_set_led(params, vars, LED_MODE_OFF, 0);  in bnx2x_link_reset()
13083 		for (phy_index = EXT_PHY1; phy_index < params->num_phys;  in bnx2x_link_reset()
13085 			if (params->phy[phy_index].link_reset) {  in bnx2x_link_reset()
13086 				bnx2x_set_aer_mmd(params,  in bnx2x_link_reset()
13087 						  &params->phy[phy_index]);  in bnx2x_link_reset()
13088 				params->phy[phy_index].link_reset(  in bnx2x_link_reset()
13089 					&params->phy[phy_index],  in bnx2x_link_reset()
13090 					params);  in bnx2x_link_reset()
13092 			if (params->phy[phy_index].flags &  in bnx2x_link_reset()
13104 	if (params->phy[INT_PHY].link_reset)  in bnx2x_link_reset()
13105 		params->phy[INT_PHY].link_reset(  in bnx2x_link_reset()
13106 			&params->phy[INT_PHY], params);  in bnx2x_link_reset()
13116 		u32 xmac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in bnx2x_link_reset()
13117 		bnx2x_set_xumac_nig(params, 0, 0);  in bnx2x_link_reset()
13127 int bnx2x_lfa_reset(struct link_params *params,  in bnx2x_lfa_reset()  argument
13130 	struct bnx2x *bp = params->bp;  in bnx2x_lfa_reset()
13133 	params->link_flags &= ~PHY_INITIALIZED;  in bnx2x_lfa_reset()
13134 	if (!params->lfa_base)  in bnx2x_lfa_reset()
13135 		return bnx2x_link_reset(params, vars, 1);  in bnx2x_lfa_reset()
13140 	REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 1);  in bnx2x_lfa_reset()
13147 		bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 0);  in bnx2x_lfa_reset()
13150 		bnx2x_set_xmac_rxtx(params, 0);  in bnx2x_lfa_reset()
13151 		bnx2x_set_umac_rxtx(params, 0);  in bnx2x_lfa_reset()
13159 	bnx2x_set_rx_filter(params, 0);  in bnx2x_lfa_reset()
13168 		bnx2x_set_bmac_rx(bp, params->chip_id, params->port, 1);  in bnx2x_lfa_reset()
13171 		bnx2x_set_xmac_rxtx(params, 1);  in bnx2x_lfa_reset()
13172 		bnx2x_set_umac_rxtx(params, 1);  in bnx2x_lfa_reset()
13175 	REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);  in bnx2x_lfa_reset()
13614 static void bnx2x_check_over_curr(struct link_params *params,  in bnx2x_check_over_curr()  argument
13617 	struct bnx2x *bp = params->bp;  in bnx2x_check_over_curr()
13619 	u8 port = params->port;  in bnx2x_check_over_curr()
13622 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_check_over_curr()
13641 			 params->port);  in bnx2x_check_over_curr()
13643 			bnx2x_warpcore_power_module(params, 0);  in bnx2x_check_over_curr()
13650 static u8 bnx2x_analyze_link_error(struct link_params *params,  in bnx2x_analyze_link_error()  argument
13654 	struct bnx2x *bp = params->bp;  in bnx2x_analyze_link_error()
13690 		REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 1);  in bnx2x_analyze_link_error()
13703 		REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);  in bnx2x_analyze_link_error()
13705 	bnx2x_sync_link(params, vars);  in bnx2x_analyze_link_error()
13707 	bnx2x_set_led(params, vars, led_mode, SPEED_10000);  in bnx2x_analyze_link_error()
13710 	bnx2x_update_mng(params, vars->link_status);  in bnx2x_analyze_link_error()
13729 static int bnx2x_check_half_open_conn(struct link_params *params,  in bnx2x_check_half_open_conn()  argument
13733 	struct bnx2x *bp = params->bp;  in bnx2x_check_half_open_conn()
13738 	    (REG_RD(bp, NIG_REG_EGRESS_EMAC0_PORT + params->port*4)))  in bnx2x_check_half_open_conn()
13749 		mac_base = (params->port) ? GRCBASE_XMAC1 : GRCBASE_XMAC0;  in bnx2x_check_half_open_conn()
13759 		bnx2x_analyze_link_error(params, vars, lss_status,  in bnx2x_check_half_open_conn()
13763 		   (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << params->port)) {  in bnx2x_check_half_open_conn()
13767 		mac_base = params->port ? NIG_REG_INGRESS_BMAC1_MEM :  in bnx2x_check_half_open_conn()
13778 		bnx2x_analyze_link_error(params, vars, lss_status,  in bnx2x_check_half_open_conn()
13785 					 struct link_params *params,  in bnx2x_sfp_tx_fault_detection()  argument
13788 	struct bnx2x *bp = params->bp;  in bnx2x_sfp_tx_fault_detection()
13790 	u8 led_change, port = params->port;  in bnx2x_sfp_tx_fault_detection()
13793 	cfg_pin = (REG_RD(bp, params->shmem_base + offsetof(struct shmem_region,  in bnx2x_sfp_tx_fault_detection()
13803 	led_change = bnx2x_analyze_link_error(params, vars, value,  in bnx2x_sfp_tx_fault_detection()
13823 			bnx2x_set_e3_module_fault_led(params, led_mode);  in bnx2x_sfp_tx_fault_detection()
13827 static void bnx2x_kr2_recovery(struct link_params *params,  in bnx2x_kr2_recovery()  argument
13831 	struct bnx2x *bp = params->bp;  in bnx2x_kr2_recovery()
13833 	bnx2x_warpcore_enable_AN_KR2(phy, params, vars);  in bnx2x_kr2_recovery()
13834 	bnx2x_warpcore_restart_AN_KR(phy, params);  in bnx2x_kr2_recovery()
13837 static void bnx2x_check_kr2_wa(struct link_params *params,  in bnx2x_check_kr2_wa()  argument
13841 	struct bnx2x *bp = params->bp;  in bnx2x_check_kr2_wa()
13855 	sigdet = bnx2x_warpcore_get_sigdet(phy, params);  in bnx2x_check_kr2_wa()
13857 		if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) {  in bnx2x_check_kr2_wa()
13858 			bnx2x_kr2_recovery(params, vars, phy);  in bnx2x_check_kr2_wa()
13864 	lane = bnx2x_get_warpcore_lane(phy, params);  in bnx2x_check_kr2_wa()
13871 	bnx2x_set_aer_mmd(params, phy);  in bnx2x_check_kr2_wa()
13875 		if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) {  in bnx2x_check_kr2_wa()
13876 			bnx2x_kr2_recovery(params, vars, phy);  in bnx2x_check_kr2_wa()
13891 	if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) {  in bnx2x_check_kr2_wa()
13895 			bnx2x_kr2_recovery(params, vars, phy);  in bnx2x_check_kr2_wa()
13903 		bnx2x_disable_kr2(params, vars, phy);  in bnx2x_check_kr2_wa()
13905 		bnx2x_warpcore_restart_AN_KR(phy, params);  in bnx2x_check_kr2_wa()
13910 void bnx2x_period_func(struct link_params *params, struct link_vars *vars)  in bnx2x_period_func()  argument
13913 	struct bnx2x *bp = params->bp;  in bnx2x_period_func()
13915 		if (params->phy[phy_idx].flags & FLAGS_TX_ERROR_CHECK) {  in bnx2x_period_func()
13916 			bnx2x_set_aer_mmd(params, &params->phy[phy_idx]);  in bnx2x_period_func()
13917 			if (bnx2x_check_half_open_conn(params, vars, 1) !=  in bnx2x_period_func()
13925 		struct bnx2x_phy *phy = &params->phy[INT_PHY];  in bnx2x_period_func()
13926 		bnx2x_set_aer_mmd(params, phy);  in bnx2x_period_func()
13931 			bnx2x_check_kr2_wa(params, vars, phy);  in bnx2x_period_func()
13932 		bnx2x_check_over_curr(params, vars);  in bnx2x_period_func()
13934 			bnx2x_warpcore_config_runtime(phy, params, vars);  in bnx2x_period_func()
13936 		if ((REG_RD(bp, params->shmem_base +  in bnx2x_period_func()
13938 				port_hw_config[params->port].default_cfg))  in bnx2x_period_func()
13941 			if (bnx2x_is_sfp_module_plugged(phy, params)) {  in bnx2x_period_func()
13942 				bnx2x_sfp_tx_fault_detection(phy, params, vars);  in bnx2x_period_func()
13949 				bnx2x_update_mng(params, vars->link_status);  in bnx2x_period_func()
13976 void bnx2x_hw_reset_phy(struct link_params *params)  in bnx2x_hw_reset_phy()  argument
13979 	struct bnx2x *bp = params->bp;  in bnx2x_hw_reset_phy()
13980 	bnx2x_update_mng(params, 0);  in bnx2x_hw_reset_phy()
13981 	bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + params->port*4,  in bnx2x_hw_reset_phy()
13989 		if (params->phy[phy_index].hw_reset) {  in bnx2x_hw_reset_phy()
13990 			params->phy[phy_index].hw_reset(  in bnx2x_hw_reset_phy()
13991 				&params->phy[phy_index],  in bnx2x_hw_reset_phy()
13992 				params);  in bnx2x_hw_reset_phy()
13993 			params->phy[phy_index] = phy_null;  in bnx2x_hw_reset_phy()