26 		hw->aq.arq.tail = I40E_VF_ARQT1;  in i40e_adminq_init_regs()
27 		hw->aq.arq.head = I40E_VF_ARQH1;  in i40e_adminq_init_regs()
28 		hw->aq.arq.len  = I40E_VF_ARQLEN1;  in i40e_adminq_init_regs()
29 		hw->aq.arq.bal  = I40E_VF_ARQBAL1;  in i40e_adminq_init_regs()
30 		hw->aq.arq.bah  = I40E_VF_ARQBAH1;  in i40e_adminq_init_regs()
37 		hw->aq.arq.tail = I40E_PF_ARQT;  in i40e_adminq_init_regs()
38 		hw->aq.arq.head = I40E_PF_ARQH;  in i40e_adminq_init_regs()
39 		hw->aq.arq.len  = I40E_PF_ARQLEN;  in i40e_adminq_init_regs()
40 		hw->aq.arq.bal  = I40E_PF_ARQBAL;  in i40e_adminq_init_regs()
41 		hw->aq.arq.bah  = I40E_PF_ARQBAH;  in i40e_adminq_init_regs()
79 	ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf,  in i40e_alloc_adminq_arq_ring()
108 	i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf);  in i40e_free_adminq_arq()
127 	ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head,  in i40e_alloc_arq_bufs()
131 	hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va;  in i40e_alloc_arq_bufs()
135 		bi = &hw->aq.arq.r.arq_bi[i];  in i40e_alloc_arq_bufs()
143 		desc = I40E_ADMINQ_DESC(hw->aq.arq, i);  in i40e_alloc_arq_bufs()
171 		i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);  in i40e_alloc_arq_bufs()
172 	i40e_free_virt_mem(hw, &hw->aq.arq.dma_head);  in i40e_alloc_arq_bufs()
226 		i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);  in i40e_free_arq_bufs()
229 	i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf);  in i40e_free_arq_bufs()
232 	i40e_free_virt_mem(hw, &hw->aq.arq.dma_head);  in i40e_free_arq_bufs()
299 	wr32(hw, hw->aq.arq.head, 0);  in i40e_config_arq_regs()
300 	wr32(hw, hw->aq.arq.tail, 0);  in i40e_config_arq_regs()
303 	wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |  in i40e_config_arq_regs()
305 	wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa));  in i40e_config_arq_regs()
306 	wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa));  in i40e_config_arq_regs()
309 	wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1);  in i40e_config_arq_regs()
312 	reg = rd32(hw, hw->aq.arq.bal);  in i40e_config_arq_regs()
313 	if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa))  in i40e_config_arq_regs()
395 	if (hw->aq.arq.count > 0) {  in i40e_init_arq()
408 	hw->aq.arq.next_to_use = 0;  in i40e_init_arq()
409 	hw->aq.arq.next_to_clean = 0;  in i40e_init_arq()
427 	hw->aq.arq.count = hw->aq.num_arq_entries;  in i40e_init_arq()
483 	if (hw->aq.arq.count == 0) {  in i40e_shutdown_arq()
489 	wr32(hw, hw->aq.arq.head, 0);  in i40e_shutdown_arq()
490 	wr32(hw, hw->aq.arq.tail, 0);  in i40e_shutdown_arq()
491 	wr32(hw, hw->aq.arq.len, 0);  in i40e_shutdown_arq()
492 	wr32(hw, hw->aq.arq.bal, 0);  in i40e_shutdown_arq()
493 	wr32(hw, hw->aq.arq.bah, 0);  in i40e_shutdown_arq()
495 	hw->aq.arq.count = 0; /* to indicate uninitialized queue */  in i40e_shutdown_arq()
1086 	u16 ntc = hw->aq.arq.next_to_clean;  in i40e_clean_arq_element()
1101 	if (hw->aq.arq.count == 0) {  in i40e_clean_arq_element()
1109 	ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK;  in i40e_clean_arq_element()
1117 	desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc);  in i40e_clean_arq_element()
1135 		memcpy(e->msg_buf, hw->aq.arq.r.arq_bi[desc_idx].va,  in i40e_clean_arq_element()
1146 	bi = &hw->aq.arq.r.arq_bi[ntc];  in i40e_clean_arq_element()
1157 	wr32(hw, hw->aq.arq.tail, ntc);  in i40e_clean_arq_element()
1162 	hw->aq.arq.next_to_clean = ntc;  in i40e_clean_arq_element()
1163 	hw->aq.arq.next_to_use = ntu;  in i40e_clean_arq_element()
1169 		*pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc);  in i40e_clean_arq_element()
1184 	hw->aq.arq.next_to_use = 0;  in i40e_resume_aq()
1185 	hw->aq.arq.next_to_clean = 0;  in i40e_resume_aq()