1298 				   struct qlcnic_ms_reg_ctrl *ms)  in qlcnic_set_ms_controls()  argument
1300 	ms->control = QLCNIC_MS_CTRL;  in qlcnic_set_ms_controls()
1301 	ms->low = QLCNIC_MS_ADDR_LO;  in qlcnic_set_ms_controls()
1302 	ms->hi = QLCNIC_MS_ADDR_HI;  in qlcnic_set_ms_controls()
1304 		ms->wd[0] = QLCNIC_MS_WRTDATA_LO;  in qlcnic_set_ms_controls()
1305 		ms->rd[0] = QLCNIC_MS_RDDATA_LO;  in qlcnic_set_ms_controls()
1306 		ms->wd[1] = QLCNIC_MS_WRTDATA_HI;  in qlcnic_set_ms_controls()
1307 		ms->rd[1] = QLCNIC_MS_RDDATA_HI;  in qlcnic_set_ms_controls()
1308 		ms->wd[2] = QLCNIC_MS_WRTDATA_ULO;  in qlcnic_set_ms_controls()
1309 		ms->wd[3] = QLCNIC_MS_WRTDATA_UHI;  in qlcnic_set_ms_controls()
1310 		ms->rd[2] = QLCNIC_MS_RDDATA_ULO;  in qlcnic_set_ms_controls()
1311 		ms->rd[3] = QLCNIC_MS_RDDATA_UHI;  in qlcnic_set_ms_controls()
1313 		ms->wd[0] = QLCNIC_MS_WRTDATA_ULO;  in qlcnic_set_ms_controls()
1314 		ms->rd[0] = QLCNIC_MS_RDDATA_ULO;  in qlcnic_set_ms_controls()
1315 		ms->wd[1] = QLCNIC_MS_WRTDATA_UHI;  in qlcnic_set_ms_controls()
1316 		ms->rd[1] = QLCNIC_MS_RDDATA_UHI;  in qlcnic_set_ms_controls()
1317 		ms->wd[2] = QLCNIC_MS_WRTDATA_LO;  in qlcnic_set_ms_controls()
1318 		ms->wd[3] = QLCNIC_MS_WRTDATA_HI;  in qlcnic_set_ms_controls()
1319 		ms->rd[2] = QLCNIC_MS_RDDATA_LO;  in qlcnic_set_ms_controls()
1320 		ms->rd[3] = QLCNIC_MS_RDDATA_HI;  in qlcnic_set_ms_controls()
1323 	ms->ocm_window = OCM_WIN_P3P(off);  in qlcnic_set_ms_controls()
1324 	ms->off = GET_MEM_OFFS_2M(off);  in qlcnic_set_ms_controls()
1331 	struct qlcnic_ms_reg_ctrl ms;  in qlcnic_pci_mem_write_2M()  local
1337 	memset(&ms, 0, sizeof(struct qlcnic_ms_reg_ctrl));  in qlcnic_pci_mem_write_2M()
1344 	qlcnic_set_ms_controls(adapter, off, &ms);  in qlcnic_pci_mem_write_2M()
1347 		return qlcnic_pci_mem_access_direct(adapter, ms.ocm_window,  in qlcnic_pci_mem_write_2M()
1348 						    ms.off, &data, 1);  in qlcnic_pci_mem_write_2M()
1354 	qlcnic_ind_wr(adapter, ms.low, off8);  in qlcnic_pci_mem_write_2M()
1355 	qlcnic_ind_wr(adapter, ms.hi, 0);  in qlcnic_pci_mem_write_2M()
1357 	qlcnic_ind_wr(adapter, ms.control, TA_CTL_ENABLE);  in qlcnic_pci_mem_write_2M()
1358 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_START_ENABLE);  in qlcnic_pci_mem_write_2M()
1361 		temp = qlcnic_ind_rd(adapter, ms.control);  in qlcnic_pci_mem_write_2M()
1372 	qlcnic_ind_wr(adapter, ms.wd[0], qlcnic_ind_rd(adapter, ms.rd[0]));  in qlcnic_pci_mem_write_2M()
1373 	qlcnic_ind_wr(adapter, ms.wd[1], qlcnic_ind_rd(adapter, ms.rd[1]));  in qlcnic_pci_mem_write_2M()
1375 	qlcnic_ind_wr(adapter, ms.wd[2], data & 0xffffffff);  in qlcnic_pci_mem_write_2M()
1376 	qlcnic_ind_wr(adapter, ms.wd[3], (data >> 32) & 0xffffffff);  in qlcnic_pci_mem_write_2M()
1378 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_WRITE_ENABLE);  in qlcnic_pci_mem_write_2M()
1379 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_WRITE_START);  in qlcnic_pci_mem_write_2M()
1382 		temp = qlcnic_ind_rd(adapter, ms.control);  in qlcnic_pci_mem_write_2M()
1406 	struct qlcnic_ms_reg_ctrl ms;  in qlcnic_pci_mem_read_2M()  local
1417 	memset(&ms, 0, sizeof(struct qlcnic_ms_reg_ctrl));  in qlcnic_pci_mem_read_2M()
1418 	qlcnic_set_ms_controls(adapter, off, &ms);  in qlcnic_pci_mem_read_2M()
1421 		return qlcnic_pci_mem_access_direct(adapter, ms.ocm_window,  in qlcnic_pci_mem_read_2M()
1422 						    ms.off, data, 0);  in qlcnic_pci_mem_read_2M()
1428 	qlcnic_ind_wr(adapter, ms.low, off8);  in qlcnic_pci_mem_read_2M()
1429 	qlcnic_ind_wr(adapter, ms.hi, 0);  in qlcnic_pci_mem_read_2M()
1431 	qlcnic_ind_wr(adapter, ms.control, TA_CTL_ENABLE);  in qlcnic_pci_mem_read_2M()
1432 	qlcnic_ind_wr(adapter, ms.control, QLCNIC_TA_START_ENABLE);  in qlcnic_pci_mem_read_2M()
1435 		temp = qlcnic_ind_rd(adapter, ms.control);  in qlcnic_pci_mem_read_2M()
1447 		temp = qlcnic_ind_rd(adapter, ms.rd[3]);  in qlcnic_pci_mem_read_2M()
1449 		val |= qlcnic_ind_rd(adapter, ms.rd[2]);  in qlcnic_pci_mem_read_2M()