182 	struct reset_control_bulk_data rst[QCOM_PCIE_2_3_3_MAX_RESETS];  member
200 	struct reset_control *rst;  member
206 	struct reset_control *rst;  member
730 	res->rst[0].id = "axi_m";  in qcom_pcie_get_resources_2_3_3()
731 	res->rst[1].id = "axi_s";  in qcom_pcie_get_resources_2_3_3()
732 	res->rst[2].id = "pipe";  in qcom_pcie_get_resources_2_3_3()
733 	res->rst[3].id = "axi_m_sticky";  in qcom_pcie_get_resources_2_3_3()
734 	res->rst[4].id = "sticky";  in qcom_pcie_get_resources_2_3_3()
735 	res->rst[5].id = "ahb";  in qcom_pcie_get_resources_2_3_3()
736 	res->rst[6].id = "sleep";  in qcom_pcie_get_resources_2_3_3()
738 	ret = devm_reset_control_bulk_get_exclusive(dev, ARRAY_SIZE(res->rst), res->rst);  in qcom_pcie_get_resources_2_3_3()
759 	ret = reset_control_bulk_assert(ARRAY_SIZE(res->rst), res->rst);  in qcom_pcie_init_2_3_3()
767 	ret = reset_control_bulk_deassert(ARRAY_SIZE(res->rst), res->rst);  in qcom_pcie_init_2_3_3()
792 	reset_control_bulk_assert(ARRAY_SIZE(res->rst), res->rst);  in qcom_pcie_init_2_3_3()
844 	res->rst = devm_reset_control_array_get_exclusive(dev);  in qcom_pcie_get_resources_2_7_0()
845 	if (IS_ERR(res->rst))  in qcom_pcie_get_resources_2_7_0()
846 		return PTR_ERR(res->rst);  in qcom_pcie_get_resources_2_7_0()
907 	ret = reset_control_assert(res->rst);  in qcom_pcie_init_2_7_0()
915 	ret = reset_control_deassert(res->rst);  in qcom_pcie_init_2_7_0()
1071 	res->rst = devm_reset_control_array_get_exclusive(dev);  in qcom_pcie_get_resources_2_9_0()
1072 	if (IS_ERR(res->rst))  in qcom_pcie_get_resources_2_9_0()
1073 		return PTR_ERR(res->rst);  in qcom_pcie_get_resources_2_9_0()
1091 	ret = reset_control_assert(res->rst);  in qcom_pcie_init_2_9_0()
1103 	ret = reset_control_deassert(res->rst);  in qcom_pcie_init_2_9_0()