1 /* SPDX-License-Identifier: ISC */
2 /*
3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
4 */
5
6 #ifndef _COREDUMP_H_
7 #define _COREDUMP_H_
8
9 #include "core.h"
10
11 #define ATH10K_FW_CRASH_DUMP_VERSION 1
12
13 /**
14 * enum ath10k_fw_crash_dump_type - types of data in the dump file
15 * @ATH10K_FW_CRASH_DUMP_REGDUMP: Register crash dump in binary format
16 */
17 enum ath10k_fw_crash_dump_type {
18 ATH10K_FW_CRASH_DUMP_REGISTERS = 0,
19 ATH10K_FW_CRASH_DUMP_CE_DATA = 1,
20
21 /* contains multiple struct ath10k_dump_ram_data_hdr */
22 ATH10K_FW_CRASH_DUMP_RAM_DATA = 2,
23
24 ATH10K_FW_CRASH_DUMP_MAX,
25 };
26
27 struct ath10k_tlv_dump_data {
28 /* see ath10k_fw_crash_dump_type above */
29 __le32 type;
30
31 /* in bytes */
32 __le32 tlv_len;
33
34 /* pad to 32-bit boundaries as needed */
35 u8 tlv_data[];
36 } __packed;
37
38 struct ath10k_dump_file_data {
39 /* dump file information */
40
41 /* "ATH10K-FW-DUMP" */
42 char df_magic[16];
43
44 __le32 len;
45
46 /* file dump version */
47 __le32 version;
48
49 /* some info we can get from ath10k struct that might help */
50
51 guid_t guid;
52
53 __le32 chip_id;
54
55 /* 0 for now, in place for later hardware */
56 __le32 bus_type;
57
58 __le32 target_version;
59 __le32 fw_version_major;
60 __le32 fw_version_minor;
61 __le32 fw_version_release;
62 __le32 fw_version_build;
63 __le32 phy_capability;
64 __le32 hw_min_tx_power;
65 __le32 hw_max_tx_power;
66 __le32 ht_cap_info;
67 __le32 vht_cap_info;
68 __le32 num_rf_chains;
69
70 /* firmware version string */
71 char fw_ver[ETHTOOL_FWVERS_LEN];
72
73 /* Kernel related information */
74
75 /* time-of-day stamp */
76 __le64 tv_sec;
77
78 /* time-of-day stamp, nano-seconds */
79 __le64 tv_nsec;
80
81 /* LINUX_VERSION_CODE */
82 __le32 kernel_ver_code;
83
84 /* VERMAGIC_STRING */
85 char kernel_ver[64];
86
87 /* room for growth w/out changing binary format */
88 u8 unused[128];
89
90 /* struct ath10k_tlv_dump_data + more */
91 u8 data[];
92 } __packed;
93
94 struct ath10k_dump_ram_data_hdr {
95 /* enum ath10k_mem_region_type */
96 __le32 region_type;
97
98 __le32 start;
99
100 /* length of payload data, not including this header */
101 __le32 length;
102
103 u8 data[];
104 };
105
106 /* magic number to fill the holes not copied due to sections in regions */
107 #define ATH10K_MAGIC_NOT_COPIED 0xAA
108
109 /* part of user space ABI */
110 enum ath10k_mem_region_type {
111 ATH10K_MEM_REGION_TYPE_REG = 1,
112 ATH10K_MEM_REGION_TYPE_DRAM = 2,
113 ATH10K_MEM_REGION_TYPE_AXI = 3,
114 ATH10K_MEM_REGION_TYPE_IRAM1 = 4,
115 ATH10K_MEM_REGION_TYPE_IRAM2 = 5,
116 ATH10K_MEM_REGION_TYPE_IOSRAM = 6,
117 ATH10K_MEM_REGION_TYPE_IOREG = 7,
118 ATH10K_MEM_REGION_TYPE_MSA = 8,
119 };
120
121 /* Define a section of the region which should be copied. As not all parts
122 * of the memory is possible to copy, for example some of the registers can
123 * be like that, sections can be used to define what is safe to copy.
124 *
125 * To minimize the size of the array, the list must obey the format:
126 * '{start0,stop0},{start1,stop1},{start2,stop2}....' The values below must
127 * also obey to 'start0 < stop0 < start1 < stop1 < start2 < ...', otherwise
128 * we may encounter error in the dump processing.
129 */
130 struct ath10k_mem_section {
131 u32 start;
132 u32 end;
133 };
134
135 /* One region of a memory layout. If the sections field is null entire
136 * region is copied. If sections is non-null only the areas specified in
137 * sections are copied and rest of the areas are filled with
138 * ATH10K_MAGIC_NOT_COPIED.
139 */
140 struct ath10k_mem_region {
141 enum ath10k_mem_region_type type;
142 u32 start;
143 u32 len;
144
145 const char *name;
146
147 struct {
148 const struct ath10k_mem_section *sections;
149 u32 size;
150 } section_table;
151 };
152
153 /* Contains the memory layout of a hardware version identified with the
154 * hardware id, split into regions.
155 */
156 struct ath10k_hw_mem_layout {
157 u32 hw_id;
158 u32 hw_rev;
159 enum ath10k_bus bus;
160
161 struct {
162 const struct ath10k_mem_region *regions;
163 int size;
164 } region_table;
165 };
166
167 /* FIXME: where to put this? */
168 extern unsigned long ath10k_coredump_mask;
169
170 #ifdef CONFIG_DEV_COREDUMP
171
172 int ath10k_coredump_submit(struct ath10k *ar);
173 struct ath10k_fw_crash_data *ath10k_coredump_new(struct ath10k *ar);
174 int ath10k_coredump_create(struct ath10k *ar);
175 int ath10k_coredump_register(struct ath10k *ar);
176 void ath10k_coredump_unregister(struct ath10k *ar);
177 void ath10k_coredump_destroy(struct ath10k *ar);
178
179 const struct ath10k_hw_mem_layout *_ath10k_coredump_get_mem_layout(struct ath10k *ar);
180 const struct ath10k_hw_mem_layout *ath10k_coredump_get_mem_layout(struct ath10k *ar);
181
182 #else /* CONFIG_DEV_COREDUMP */
183
ath10k_coredump_submit(struct ath10k * ar)184 static inline int ath10k_coredump_submit(struct ath10k *ar)
185 {
186 return 0;
187 }
188
ath10k_coredump_new(struct ath10k * ar)189 static inline struct ath10k_fw_crash_data *ath10k_coredump_new(struct ath10k *ar)
190 {
191 return NULL;
192 }
193
ath10k_coredump_create(struct ath10k * ar)194 static inline int ath10k_coredump_create(struct ath10k *ar)
195 {
196 return 0;
197 }
198
ath10k_coredump_register(struct ath10k * ar)199 static inline int ath10k_coredump_register(struct ath10k *ar)
200 {
201 return 0;
202 }
203
ath10k_coredump_unregister(struct ath10k * ar)204 static inline void ath10k_coredump_unregister(struct ath10k *ar)
205 {
206 }
207
ath10k_coredump_destroy(struct ath10k * ar)208 static inline void ath10k_coredump_destroy(struct ath10k *ar)
209 {
210 }
211
212 static inline const struct ath10k_hw_mem_layout *
ath10k_coredump_get_mem_layout(struct ath10k * ar)213 ath10k_coredump_get_mem_layout(struct ath10k *ar)
214 {
215 return NULL;
216 }
217
218 static inline const struct ath10k_hw_mem_layout *
_ath10k_coredump_get_mem_layout(struct ath10k * ar)219 _ath10k_coredump_get_mem_layout(struct ath10k *ar)
220 {
221 return NULL;
222 }
223
224 #endif /* CONFIG_DEV_COREDUMP */
225
226 #endif /* _COREDUMP_H_ */
227