/drivers/net/ethernet/qlogic/qlcnic/ |
D | qlcnic_hdr.h | 641 #define QLC_DEV_SET_REF_CNT(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument 642 #define QLC_DEV_CLR_REF_CNT(VAL, FN) ((VAL) &= ~(1 << (FN * 4))) argument 643 #define QLC_DEV_SET_RST_RDY(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument 644 #define QLC_DEV_SET_QSCNT_RDY(VAL, FN) ((VAL) |= (2 << (FN * 4))) argument 645 #define QLC_DEV_CLR_RST_QSCNT(VAL, FN) ((VAL) &= ~(3 << (FN * 4))) argument 647 #define QLC_DEV_GET_DRV(VAL, FN) (0xf & ((VAL) >> (FN * 4))) argument 648 #define QLC_DEV_SET_DRV(VAL, FN) ((VAL) << (FN * 4)) argument 678 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
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D | qlcnic_83xx_hw.h | 405 #define QLC_83XX_GET_FUNC_PRIVILEGE(VAL, FN) (0x3 & ((VAL) >> (FN * 2))) argument 406 #define QLC_83XX_SET_FUNC_OPMODE(VAL, FN) ((VAL) << (FN * 2)) argument
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D | qlcnic.h | 880 #define QLCNIC_IS_LB_CONFIGURED(VAL) \ argument
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/drivers/net/ethernet/qlogic/netxen/ |
D | netxen_nic_hdr.h | 950 #define NETXEN_DIMM_MEMTYPE(VAL) ((VAL >> 3) & 0xf) argument 951 #define NETXEN_DIMM_NUMROWS(VAL) ((VAL >> 7) & 0xf) argument 952 #define NETXEN_DIMM_NUMCOLS(VAL) ((VAL >> 11) & 0xf) argument 953 #define NETXEN_DIMM_NUMRANKS(VAL) ((VAL >> 15) & 0x3) argument 954 #define NETXEN_DIMM_DATAWIDTH(VAL) ((VAL >> 18) & 0x3) argument 955 #define NETXEN_DIMM_NUMBANKS(VAL) ((VAL >> 21) & 0xf) argument 956 #define NETXEN_DIMM_TYPE(VAL) ((VAL >> 25) & 0x3f) argument 991 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
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/drivers/net/ethernet/freescale/fs_enet/ |
D | mii-fec.c | 48 #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) argument
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D | mac-fcc.c | 72 #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) argument
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/drivers/scsi/ |
D | sun3x_esp.c | 50 #define dma_write32(VAL, REG) \ argument
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D | mac_esp.c | 50 #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG) argument
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D | sun_esp.c | 34 #define dma_write32(VAL, REG) \ argument
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D | aha152x.h | 289 #define SETPORT(PORT, VAL) outb( (VAL), (PORT) ) argument
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D | esp_scsi.c | 117 #define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG) argument
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/drivers/watchdog/ |
D | it87_wdt.c | 40 #define VAL 0x2f macro
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D | it8712f_wdt.c | 57 #define VAL 0x2f /* The value to read/write */ macro
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/drivers/gpu/drm/panel/ |
D | panel-novatek-nt39016.c | 70 #define RV(REG, VAL) { .reg = (REG), .def = (VAL), .delay_us = 2 } argument
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/drivers/hwmon/ |
D | smsc47b397.c | 42 #define VAL 0x2f /* The value to read/write */ macro
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D | smsc47m1.c | 44 #define VAL 0x2f /* The value to read/write */ macro
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/drivers/gpio/ |
D | gpio-it87.c | 38 #define VAL 0x2f macro
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/drivers/comedi/drivers/ |
D | s626.h | 447 #define S626_I2C_B2(ATTR, VAL) (((ATTR) << 6) | ((VAL) << 24)) argument 448 #define S626_I2C_B1(ATTR, VAL) (((ATTR) << 4) | ((VAL) << 16)) argument 449 #define S626_I2C_B0(ATTR, VAL) (((ATTR) << 2) | ((VAL) << 8)) argument
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/drivers/pinctrl/ |
D | pinctrl-rockchip.c | 215 #define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, FLAG) \ argument 225 #define RK_MUXROUTE_SAME(ID, PIN, FUNC, REG, VAL) \ argument 228 #define RK_MUXROUTE_GRF(ID, PIN, FUNC, REG, VAL) \ argument 231 #define RK_MUXROUTE_PMU(ID, PIN, FUNC, REG, VAL) \ argument
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/drivers/staging/rtl8723bs/hal/ |
D | HalPhyRf_8723B.c | 19 #define VAL 1 macro
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/drivers/scsi/qla4xxx/ |
D | ql4_nx.h | 746 #define ISR_IS_LEGACY_INTR_IDLE(VAL) (((VAL) & 0x300) == 0) argument 747 #define ISR_IS_LEGACY_INTR_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
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/drivers/scsi/qla2xxx/ |
D | qla_nx.h | 708 #define ISR_IS_LEGACY_INTR_IDLE(VAL) (((VAL) & 0x300) == 0) argument 709 #define ISR_IS_LEGACY_INTR_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
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