• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /*
2  * Broadcom NetXtreme-E RoCE driver.
3  *
4  * Copyright (c) 2016 - 2017, Broadcom. All rights reserved.  The term
5  * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6  *
7  * This software is available to you under a choice of one of two
8  * licenses.  You may choose to be licensed under the terms of the GNU
9  * General Public License (GPL) Version 2, available from the file
10  * COPYING in the main directory of this source tree, or the
11  * BSD license below:
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  *
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in
21  *    the documentation and/or other materials provided with the
22  *    distribution.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34  * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35  *
36  * Description: Fast Path Operators
37  */
38 
39 #define dev_fmt(fmt) "QPLIB: " fmt
40 
41 #include <linux/interrupt.h>
42 #include <linux/spinlock.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/delay.h>
47 #include <linux/prefetch.h>
48 #include <linux/if_ether.h>
49 #include <rdma/ib_mad.h>
50 
51 #include "roce_hsi.h"
52 
53 #include "qplib_res.h"
54 #include "qplib_rcfw.h"
55 #include "qplib_sp.h"
56 #include "qplib_fp.h"
57 
58 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp);
59 
bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp * qp)60 static void bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp *qp)
61 {
62 	qp->sq.condition = false;
63 	qp->sq.send_phantom = false;
64 	qp->sq.single = false;
65 }
66 
67 /* Flush list */
__bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp * qp)68 static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
69 {
70 	struct bnxt_qplib_cq *scq, *rcq;
71 
72 	scq = qp->scq;
73 	rcq = qp->rcq;
74 
75 	if (!qp->sq.flushed) {
76 		dev_dbg(&scq->hwq.pdev->dev,
77 			"FP: Adding to SQ Flush list = %p\n", qp);
78 		bnxt_qplib_cancel_phantom_processing(qp);
79 		list_add_tail(&qp->sq_flush, &scq->sqf_head);
80 		qp->sq.flushed = true;
81 	}
82 	if (!qp->srq) {
83 		if (!qp->rq.flushed) {
84 			dev_dbg(&rcq->hwq.pdev->dev,
85 				"FP: Adding to RQ Flush list = %p\n", qp);
86 			list_add_tail(&qp->rq_flush, &rcq->rqf_head);
87 			qp->rq.flushed = true;
88 		}
89 	}
90 }
91 
bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp * qp,unsigned long * flags)92 static void bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp *qp,
93 				       unsigned long *flags)
94 	__acquires(&qp->scq->flush_lock) __acquires(&qp->rcq->flush_lock)
95 {
96 	spin_lock_irqsave(&qp->scq->flush_lock, *flags);
97 	if (qp->scq == qp->rcq)
98 		__acquire(&qp->rcq->flush_lock);
99 	else
100 		spin_lock(&qp->rcq->flush_lock);
101 }
102 
bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp * qp,unsigned long * flags)103 static void bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp *qp,
104 				       unsigned long *flags)
105 	__releases(&qp->scq->flush_lock) __releases(&qp->rcq->flush_lock)
106 {
107 	if (qp->scq == qp->rcq)
108 		__release(&qp->rcq->flush_lock);
109 	else
110 		spin_unlock(&qp->rcq->flush_lock);
111 	spin_unlock_irqrestore(&qp->scq->flush_lock, *flags);
112 }
113 
bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp * qp)114 void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp)
115 {
116 	unsigned long flags;
117 
118 	bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
119 	__bnxt_qplib_add_flush_qp(qp);
120 	bnxt_qplib_release_cq_flush_locks(qp, &flags);
121 }
122 
__bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp * qp)123 static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp)
124 {
125 	if (qp->sq.flushed) {
126 		qp->sq.flushed = false;
127 		list_del(&qp->sq_flush);
128 	}
129 	if (!qp->srq) {
130 		if (qp->rq.flushed) {
131 			qp->rq.flushed = false;
132 			list_del(&qp->rq_flush);
133 		}
134 	}
135 }
136 
bnxt_qplib_clean_qp(struct bnxt_qplib_qp * qp)137 void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp)
138 {
139 	unsigned long flags;
140 
141 	bnxt_qplib_acquire_cq_flush_locks(qp, &flags);
142 	__clean_cq(qp->scq, (u64)(unsigned long)qp);
143 	qp->sq.hwq.prod = 0;
144 	qp->sq.hwq.cons = 0;
145 	__clean_cq(qp->rcq, (u64)(unsigned long)qp);
146 	qp->rq.hwq.prod = 0;
147 	qp->rq.hwq.cons = 0;
148 
149 	__bnxt_qplib_del_flush_qp(qp);
150 	bnxt_qplib_release_cq_flush_locks(qp, &flags);
151 }
152 
bnxt_qpn_cqn_sched_task(struct work_struct * work)153 static void bnxt_qpn_cqn_sched_task(struct work_struct *work)
154 {
155 	struct bnxt_qplib_nq_work *nq_work =
156 			container_of(work, struct bnxt_qplib_nq_work, work);
157 
158 	struct bnxt_qplib_cq *cq = nq_work->cq;
159 	struct bnxt_qplib_nq *nq = nq_work->nq;
160 
161 	if (cq && nq) {
162 		spin_lock_bh(&cq->compl_lock);
163 		if (atomic_read(&cq->arm_state) && nq->cqn_handler) {
164 			dev_dbg(&nq->pdev->dev,
165 				"%s:Trigger cq  = %p event nq = %p\n",
166 				__func__, cq, nq);
167 			nq->cqn_handler(nq, cq);
168 		}
169 		spin_unlock_bh(&cq->compl_lock);
170 	}
171 	kfree(nq_work);
172 }
173 
bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)174 static void bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res *res,
175 				       struct bnxt_qplib_qp *qp)
176 {
177 	struct bnxt_qplib_q *rq = &qp->rq;
178 	struct bnxt_qplib_q *sq = &qp->sq;
179 
180 	if (qp->rq_hdr_buf)
181 		dma_free_coherent(&res->pdev->dev,
182 				  rq->max_wqe * qp->rq_hdr_buf_size,
183 				  qp->rq_hdr_buf, qp->rq_hdr_buf_map);
184 	if (qp->sq_hdr_buf)
185 		dma_free_coherent(&res->pdev->dev,
186 				  sq->max_wqe * qp->sq_hdr_buf_size,
187 				  qp->sq_hdr_buf, qp->sq_hdr_buf_map);
188 	qp->rq_hdr_buf = NULL;
189 	qp->sq_hdr_buf = NULL;
190 	qp->rq_hdr_buf_map = 0;
191 	qp->sq_hdr_buf_map = 0;
192 	qp->sq_hdr_buf_size = 0;
193 	qp->rq_hdr_buf_size = 0;
194 }
195 
bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)196 static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res,
197 				       struct bnxt_qplib_qp *qp)
198 {
199 	struct bnxt_qplib_q *rq = &qp->rq;
200 	struct bnxt_qplib_q *sq = &qp->sq;
201 	int rc = 0;
202 
203 	if (qp->sq_hdr_buf_size && sq->max_wqe) {
204 		qp->sq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
205 					sq->max_wqe * qp->sq_hdr_buf_size,
206 					&qp->sq_hdr_buf_map, GFP_KERNEL);
207 		if (!qp->sq_hdr_buf) {
208 			rc = -ENOMEM;
209 			dev_err(&res->pdev->dev,
210 				"Failed to create sq_hdr_buf\n");
211 			goto fail;
212 		}
213 	}
214 
215 	if (qp->rq_hdr_buf_size && rq->max_wqe) {
216 		qp->rq_hdr_buf = dma_alloc_coherent(&res->pdev->dev,
217 						    rq->max_wqe *
218 						    qp->rq_hdr_buf_size,
219 						    &qp->rq_hdr_buf_map,
220 						    GFP_KERNEL);
221 		if (!qp->rq_hdr_buf) {
222 			rc = -ENOMEM;
223 			dev_err(&res->pdev->dev,
224 				"Failed to create rq_hdr_buf\n");
225 			goto fail;
226 		}
227 	}
228 	return 0;
229 
230 fail:
231 	bnxt_qplib_free_qp_hdr_buf(res, qp);
232 	return rc;
233 }
234 
clean_nq(struct bnxt_qplib_nq * nq,struct bnxt_qplib_cq * cq)235 static void clean_nq(struct bnxt_qplib_nq *nq, struct bnxt_qplib_cq *cq)
236 {
237 	struct bnxt_qplib_hwq *hwq = &nq->hwq;
238 	struct nq_base *nqe, **nq_ptr;
239 	int budget = nq->budget;
240 	uintptr_t q_handle;
241 	u16 type;
242 
243 	spin_lock_bh(&hwq->lock);
244 	/* Service the NQ until empty */
245 	while (budget--) {
246 		nq_ptr = (struct nq_base **)hwq->pbl_ptr;
247 		nqe = &nq_ptr[NQE_PG(hwq->cons)][NQE_IDX(hwq->cons)];
248 		if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags))
249 			break;
250 
251 		/*
252 		 * The valid test of the entry must be done first before
253 		 * reading any further.
254 		 */
255 		dma_rmb();
256 
257 		type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK;
258 		switch (type) {
259 		case NQ_BASE_TYPE_CQ_NOTIFICATION:
260 		{
261 			struct nq_cn *nqcne = (struct nq_cn *)nqe;
262 
263 			q_handle = le32_to_cpu(nqcne->cq_handle_low);
264 			q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high)
265 						     << 32;
266 			if ((unsigned long)cq == q_handle) {
267 				nqcne->cq_handle_low = 0;
268 				nqcne->cq_handle_high = 0;
269 				cq->cnq_events++;
270 			}
271 			break;
272 		}
273 		default:
274 			break;
275 		}
276 		bnxt_qplib_hwq_incr_cons(hwq->max_elements, &hwq->cons,
277 					 1, &nq->nq_db.dbinfo.flags);
278 	}
279 	spin_unlock_bh(&hwq->lock);
280 }
281 
282 /* Wait for receiving all NQEs for this CQ and clean the NQEs associated with
283  * this CQ.
284  */
__wait_for_all_nqes(struct bnxt_qplib_cq * cq,u16 cnq_events)285 static void __wait_for_all_nqes(struct bnxt_qplib_cq *cq, u16 cnq_events)
286 {
287 	u32 retry_cnt = 100;
288 
289 	while (retry_cnt--) {
290 		if (cnq_events == cq->cnq_events)
291 			return;
292 		usleep_range(50, 100);
293 		clean_nq(cq->nq, cq);
294 	}
295 }
296 
bnxt_qplib_service_nq(struct tasklet_struct * t)297 static void bnxt_qplib_service_nq(struct tasklet_struct *t)
298 {
299 	struct bnxt_qplib_nq *nq = from_tasklet(nq, t, nq_tasklet);
300 	struct bnxt_qplib_hwq *hwq = &nq->hwq;
301 	struct bnxt_qplib_cq *cq;
302 	int budget = nq->budget;
303 	struct nq_base *nqe;
304 	uintptr_t q_handle;
305 	u32 hw_polled = 0;
306 	u16 type;
307 
308 	spin_lock_bh(&hwq->lock);
309 	/* Service the NQ until empty */
310 	while (budget--) {
311 		nqe = bnxt_qplib_get_qe(hwq, hwq->cons, NULL);
312 		if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags))
313 			break;
314 
315 		/*
316 		 * The valid test of the entry must be done first before
317 		 * reading any further.
318 		 */
319 		dma_rmb();
320 
321 		type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK;
322 		switch (type) {
323 		case NQ_BASE_TYPE_CQ_NOTIFICATION:
324 		{
325 			struct nq_cn *nqcne = (struct nq_cn *)nqe;
326 
327 			q_handle = le32_to_cpu(nqcne->cq_handle_low);
328 			q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high)
329 						     << 32;
330 			cq = (struct bnxt_qplib_cq *)(unsigned long)q_handle;
331 			if (!cq)
332 				break;
333 			bnxt_qplib_armen_db(&cq->dbinfo,
334 					    DBC_DBC_TYPE_CQ_ARMENA);
335 			spin_lock_bh(&cq->compl_lock);
336 			atomic_set(&cq->arm_state, 0);
337 			if (nq->cqn_handler(nq, (cq)))
338 				dev_warn(&nq->pdev->dev,
339 					 "cqn - type 0x%x not handled\n", type);
340 			cq->cnq_events++;
341 			spin_unlock_bh(&cq->compl_lock);
342 			break;
343 		}
344 		case NQ_BASE_TYPE_SRQ_EVENT:
345 		{
346 			struct bnxt_qplib_srq *srq;
347 			struct nq_srq_event *nqsrqe =
348 						(struct nq_srq_event *)nqe;
349 
350 			q_handle = le32_to_cpu(nqsrqe->srq_handle_low);
351 			q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high)
352 				     << 32;
353 			srq = (struct bnxt_qplib_srq *)q_handle;
354 			bnxt_qplib_armen_db(&srq->dbinfo,
355 					    DBC_DBC_TYPE_SRQ_ARMENA);
356 			if (nq->srqn_handler(nq,
357 					     (struct bnxt_qplib_srq *)q_handle,
358 					     nqsrqe->event))
359 				dev_warn(&nq->pdev->dev,
360 					 "SRQ event 0x%x not handled\n",
361 					 nqsrqe->event);
362 			break;
363 		}
364 		case NQ_BASE_TYPE_DBQ_EVENT:
365 			break;
366 		default:
367 			dev_warn(&nq->pdev->dev,
368 				 "nqe with type = 0x%x not handled\n", type);
369 			break;
370 		}
371 		hw_polled++;
372 		bnxt_qplib_hwq_incr_cons(hwq->max_elements, &hwq->cons,
373 					 1, &nq->nq_db.dbinfo.flags);
374 	}
375 	if (hw_polled)
376 		bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, true);
377 	spin_unlock_bh(&hwq->lock);
378 }
379 
380 /* bnxt_re_synchronize_nq - self polling notification queue.
381  * @nq      -     notification queue pointer
382  *
383  * This function will start polling entries of a given notification queue
384  * for all pending  entries.
385  * This function is useful to synchronize notification entries while resources
386  * are going away.
387  */
388 
bnxt_re_synchronize_nq(struct bnxt_qplib_nq * nq)389 void bnxt_re_synchronize_nq(struct bnxt_qplib_nq *nq)
390 {
391 	int budget = nq->budget;
392 
393 	nq->budget = nq->hwq.max_elements;
394 	bnxt_qplib_service_nq(&nq->nq_tasklet);
395 	nq->budget = budget;
396 }
397 
bnxt_qplib_nq_irq(int irq,void * dev_instance)398 static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance)
399 {
400 	struct bnxt_qplib_nq *nq = dev_instance;
401 	struct bnxt_qplib_hwq *hwq = &nq->hwq;
402 	u32 sw_cons;
403 
404 	/* Prefetch the NQ element */
405 	sw_cons = HWQ_CMP(hwq->cons, hwq);
406 	prefetch(bnxt_qplib_get_qe(hwq, sw_cons, NULL));
407 
408 	/* Fan out to CPU affinitized kthreads? */
409 	tasklet_schedule(&nq->nq_tasklet);
410 
411 	return IRQ_HANDLED;
412 }
413 
bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq * nq,bool kill)414 void bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq *nq, bool kill)
415 {
416 	if (!nq->requested)
417 		return;
418 
419 	nq->requested = false;
420 	/* Mask h/w interrupt */
421 	bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, false);
422 	/* Sync with last running IRQ handler */
423 	synchronize_irq(nq->msix_vec);
424 	irq_set_affinity_hint(nq->msix_vec, NULL);
425 	free_irq(nq->msix_vec, nq);
426 	kfree(nq->name);
427 	nq->name = NULL;
428 
429 	if (kill)
430 		tasklet_kill(&nq->nq_tasklet);
431 	tasklet_disable(&nq->nq_tasklet);
432 }
433 
bnxt_qplib_disable_nq(struct bnxt_qplib_nq * nq)434 void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq)
435 {
436 	if (nq->cqn_wq) {
437 		destroy_workqueue(nq->cqn_wq);
438 		nq->cqn_wq = NULL;
439 	}
440 
441 	/* Make sure the HW is stopped! */
442 	bnxt_qplib_nq_stop_irq(nq, true);
443 
444 	if (nq->nq_db.reg.bar_reg) {
445 		iounmap(nq->nq_db.reg.bar_reg);
446 		nq->nq_db.reg.bar_reg = NULL;
447 	}
448 
449 	nq->cqn_handler = NULL;
450 	nq->srqn_handler = NULL;
451 	nq->msix_vec = 0;
452 }
453 
bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq * nq,int nq_indx,int msix_vector,bool need_init)454 int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx,
455 			    int msix_vector, bool need_init)
456 {
457 	struct bnxt_qplib_res *res = nq->res;
458 	int rc;
459 
460 	if (nq->requested)
461 		return -EFAULT;
462 
463 	nq->msix_vec = msix_vector;
464 	if (need_init)
465 		tasklet_setup(&nq->nq_tasklet, bnxt_qplib_service_nq);
466 	else
467 		tasklet_enable(&nq->nq_tasklet);
468 
469 	nq->name = kasprintf(GFP_KERNEL, "bnxt_re-nq-%d@pci:%s",
470 			     nq_indx, pci_name(res->pdev));
471 	if (!nq->name)
472 		return -ENOMEM;
473 	rc = request_irq(nq->msix_vec, bnxt_qplib_nq_irq, 0, nq->name, nq);
474 	if (rc) {
475 		kfree(nq->name);
476 		nq->name = NULL;
477 		tasklet_disable(&nq->nq_tasklet);
478 		return rc;
479 	}
480 
481 	cpumask_clear(&nq->mask);
482 	cpumask_set_cpu(nq_indx, &nq->mask);
483 	rc = irq_set_affinity_hint(nq->msix_vec, &nq->mask);
484 	if (rc) {
485 		dev_warn(&nq->pdev->dev,
486 			 "set affinity failed; vector: %d nq_idx: %d\n",
487 			 nq->msix_vec, nq_indx);
488 	}
489 	nq->requested = true;
490 	bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, res->cctx, true);
491 
492 	return rc;
493 }
494 
bnxt_qplib_map_nq_db(struct bnxt_qplib_nq * nq,u32 reg_offt)495 static int bnxt_qplib_map_nq_db(struct bnxt_qplib_nq *nq,  u32 reg_offt)
496 {
497 	resource_size_t reg_base;
498 	struct bnxt_qplib_nq_db *nq_db;
499 	struct pci_dev *pdev;
500 
501 	pdev = nq->pdev;
502 	nq_db = &nq->nq_db;
503 
504 	nq_db->dbinfo.flags = 0;
505 	nq_db->reg.bar_id = NQ_CONS_PCI_BAR_REGION;
506 	nq_db->reg.bar_base = pci_resource_start(pdev, nq_db->reg.bar_id);
507 	if (!nq_db->reg.bar_base) {
508 		dev_err(&pdev->dev, "QPLIB: NQ BAR region %d resc start is 0!",
509 			nq_db->reg.bar_id);
510 		return -ENOMEM;
511 	}
512 
513 	reg_base = nq_db->reg.bar_base + reg_offt;
514 	/* Unconditionally map 8 bytes to support 57500 series */
515 	nq_db->reg.len = 8;
516 	nq_db->reg.bar_reg = ioremap(reg_base, nq_db->reg.len);
517 	if (!nq_db->reg.bar_reg) {
518 		dev_err(&pdev->dev, "QPLIB: NQ BAR region %d mapping failed",
519 			nq_db->reg.bar_id);
520 		return -ENOMEM;
521 	}
522 
523 	nq_db->dbinfo.db = nq_db->reg.bar_reg;
524 	nq_db->dbinfo.hwq = &nq->hwq;
525 	nq_db->dbinfo.xid = nq->ring_id;
526 
527 	return 0;
528 }
529 
bnxt_qplib_enable_nq(struct pci_dev * pdev,struct bnxt_qplib_nq * nq,int nq_idx,int msix_vector,int bar_reg_offset,cqn_handler_t cqn_handler,srqn_handler_t srqn_handler)530 int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq,
531 			 int nq_idx, int msix_vector, int bar_reg_offset,
532 			 cqn_handler_t cqn_handler,
533 			 srqn_handler_t srqn_handler)
534 {
535 	int rc;
536 
537 	nq->pdev = pdev;
538 	nq->cqn_handler = cqn_handler;
539 	nq->srqn_handler = srqn_handler;
540 
541 	/* Have a task to schedule CQ notifiers in post send case */
542 	nq->cqn_wq  = create_singlethread_workqueue("bnxt_qplib_nq");
543 	if (!nq->cqn_wq)
544 		return -ENOMEM;
545 
546 	rc = bnxt_qplib_map_nq_db(nq, bar_reg_offset);
547 	if (rc)
548 		goto fail;
549 
550 	rc = bnxt_qplib_nq_start_irq(nq, nq_idx, msix_vector, true);
551 	if (rc) {
552 		dev_err(&nq->pdev->dev,
553 			"Failed to request irq for nq-idx %d\n", nq_idx);
554 		goto fail;
555 	}
556 
557 	return 0;
558 fail:
559 	bnxt_qplib_disable_nq(nq);
560 	return rc;
561 }
562 
bnxt_qplib_free_nq(struct bnxt_qplib_nq * nq)563 void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq)
564 {
565 	if (nq->hwq.max_elements) {
566 		bnxt_qplib_free_hwq(nq->res, &nq->hwq);
567 		nq->hwq.max_elements = 0;
568 	}
569 }
570 
bnxt_qplib_alloc_nq(struct bnxt_qplib_res * res,struct bnxt_qplib_nq * nq)571 int bnxt_qplib_alloc_nq(struct bnxt_qplib_res *res, struct bnxt_qplib_nq *nq)
572 {
573 	struct bnxt_qplib_hwq_attr hwq_attr = {};
574 	struct bnxt_qplib_sg_info sginfo = {};
575 
576 	nq->pdev = res->pdev;
577 	nq->res = res;
578 	if (!nq->hwq.max_elements ||
579 	    nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT)
580 		nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
581 
582 	sginfo.pgsize = PAGE_SIZE;
583 	sginfo.pgshft = PAGE_SHIFT;
584 	hwq_attr.res = res;
585 	hwq_attr.sginfo = &sginfo;
586 	hwq_attr.depth = nq->hwq.max_elements;
587 	hwq_attr.stride = sizeof(struct nq_base);
588 	hwq_attr.type = bnxt_qplib_get_hwq_type(nq->res);
589 	if (bnxt_qplib_alloc_init_hwq(&nq->hwq, &hwq_attr)) {
590 		dev_err(&nq->pdev->dev, "FP NQ allocation failed");
591 		return -ENOMEM;
592 	}
593 	nq->budget = 8;
594 	return 0;
595 }
596 
597 /* SRQ */
bnxt_qplib_destroy_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)598 void bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res,
599 			   struct bnxt_qplib_srq *srq)
600 {
601 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
602 	struct creq_destroy_srq_resp resp = {};
603 	struct bnxt_qplib_cmdqmsg msg = {};
604 	struct cmdq_destroy_srq req = {};
605 	int rc;
606 
607 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
608 				 CMDQ_BASE_OPCODE_DESTROY_SRQ,
609 				 sizeof(req));
610 
611 	/* Configure the request */
612 	req.srq_cid = cpu_to_le32(srq->id);
613 
614 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0);
615 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
616 	kfree(srq->swq);
617 	if (rc)
618 		return;
619 	bnxt_qplib_free_hwq(res, &srq->hwq);
620 }
621 
bnxt_qplib_create_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)622 int bnxt_qplib_create_srq(struct bnxt_qplib_res *res,
623 			  struct bnxt_qplib_srq *srq)
624 {
625 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
626 	struct bnxt_qplib_hwq_attr hwq_attr = {};
627 	struct creq_create_srq_resp resp = {};
628 	struct bnxt_qplib_cmdqmsg msg = {};
629 	struct cmdq_create_srq req = {};
630 	struct bnxt_qplib_pbl *pbl;
631 	u16 pg_sz_lvl;
632 	int rc, idx;
633 
634 	hwq_attr.res = res;
635 	hwq_attr.sginfo = &srq->sg_info;
636 	hwq_attr.depth = srq->max_wqe;
637 	hwq_attr.stride = srq->wqe_size;
638 	hwq_attr.type = HWQ_TYPE_QUEUE;
639 	rc = bnxt_qplib_alloc_init_hwq(&srq->hwq, &hwq_attr);
640 	if (rc)
641 		return rc;
642 
643 	srq->swq = kcalloc(srq->hwq.max_elements, sizeof(*srq->swq),
644 			   GFP_KERNEL);
645 	if (!srq->swq) {
646 		rc = -ENOMEM;
647 		goto fail;
648 	}
649 	srq->dbinfo.flags = 0;
650 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
651 				 CMDQ_BASE_OPCODE_CREATE_SRQ,
652 				 sizeof(req));
653 
654 	/* Configure the request */
655 	req.dpi = cpu_to_le32(srq->dpi->dpi);
656 	req.srq_handle = cpu_to_le64((uintptr_t)srq);
657 
658 	req.srq_size = cpu_to_le16((u16)srq->hwq.max_elements);
659 	pbl = &srq->hwq.pbl[PBL_LVL_0];
660 	pg_sz_lvl = ((u16)bnxt_qplib_base_pg_size(&srq->hwq) <<
661 		     CMDQ_CREATE_SRQ_PG_SIZE_SFT);
662 	pg_sz_lvl |= (srq->hwq.level & CMDQ_CREATE_SRQ_LVL_MASK) <<
663 		      CMDQ_CREATE_SRQ_LVL_SFT;
664 	req.pg_size_lvl = cpu_to_le16(pg_sz_lvl);
665 	req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
666 	req.pd_id = cpu_to_le32(srq->pd->id);
667 	req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id);
668 
669 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0);
670 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
671 	if (rc)
672 		goto fail;
673 
674 	spin_lock_init(&srq->lock);
675 	srq->start_idx = 0;
676 	srq->last_idx = srq->hwq.max_elements - 1;
677 	for (idx = 0; idx < srq->hwq.max_elements; idx++)
678 		srq->swq[idx].next_idx = idx + 1;
679 	srq->swq[srq->last_idx].next_idx = -1;
680 
681 	srq->id = le32_to_cpu(resp.xid);
682 	srq->dbinfo.hwq = &srq->hwq;
683 	srq->dbinfo.xid = srq->id;
684 	srq->dbinfo.db = srq->dpi->dbr;
685 	srq->dbinfo.max_slot = 1;
686 	srq->dbinfo.priv_db = res->dpi_tbl.priv_db;
687 	if (srq->threshold)
688 		bnxt_qplib_armen_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ_ARMENA);
689 	srq->arm_req = false;
690 
691 	return 0;
692 fail:
693 	bnxt_qplib_free_hwq(res, &srq->hwq);
694 	kfree(srq->swq);
695 
696 	return rc;
697 }
698 
bnxt_qplib_modify_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)699 int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res,
700 			  struct bnxt_qplib_srq *srq)
701 {
702 	struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
703 	u32 count;
704 
705 	count = __bnxt_qplib_get_avail(srq_hwq);
706 	if (count > srq->threshold) {
707 		srq->arm_req = false;
708 		bnxt_qplib_srq_arm_db(&srq->dbinfo, srq->threshold);
709 	} else {
710 		/* Deferred arming */
711 		srq->arm_req = true;
712 	}
713 
714 	return 0;
715 }
716 
bnxt_qplib_query_srq(struct bnxt_qplib_res * res,struct bnxt_qplib_srq * srq)717 int bnxt_qplib_query_srq(struct bnxt_qplib_res *res,
718 			 struct bnxt_qplib_srq *srq)
719 {
720 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
721 	struct creq_query_srq_resp resp = {};
722 	struct bnxt_qplib_cmdqmsg msg = {};
723 	struct bnxt_qplib_rcfw_sbuf sbuf;
724 	struct creq_query_srq_resp_sb *sb;
725 	struct cmdq_query_srq req = {};
726 	int rc;
727 
728 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
729 				 CMDQ_BASE_OPCODE_QUERY_SRQ,
730 				 sizeof(req));
731 
732 	/* Configure the request */
733 	sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS);
734 	sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size,
735 				     &sbuf.dma_addr, GFP_KERNEL);
736 	if (!sbuf.sb)
737 		return -ENOMEM;
738 	req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS;
739 	req.srq_cid = cpu_to_le32(srq->id);
740 	sb = sbuf.sb;
741 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
742 				sizeof(resp), 0);
743 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
744 	if (!rc)
745 		srq->threshold = le16_to_cpu(sb->srq_limit);
746 	dma_free_coherent(&rcfw->pdev->dev, sbuf.size,
747 			  sbuf.sb, sbuf.dma_addr);
748 
749 	return rc;
750 }
751 
bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq * srq,struct bnxt_qplib_swqe * wqe)752 int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq,
753 			     struct bnxt_qplib_swqe *wqe)
754 {
755 	struct bnxt_qplib_hwq *srq_hwq = &srq->hwq;
756 	struct rq_wqe *srqe;
757 	struct sq_sge *hw_sge;
758 	u32 count = 0;
759 	int i, next;
760 
761 	spin_lock(&srq_hwq->lock);
762 	if (srq->start_idx == srq->last_idx) {
763 		dev_err(&srq_hwq->pdev->dev,
764 			"FP: SRQ (0x%x) is full!\n", srq->id);
765 		spin_unlock(&srq_hwq->lock);
766 		return -EINVAL;
767 	}
768 	next = srq->start_idx;
769 	srq->start_idx = srq->swq[next].next_idx;
770 	spin_unlock(&srq_hwq->lock);
771 
772 	srqe = bnxt_qplib_get_qe(srq_hwq, srq_hwq->prod, NULL);
773 	memset(srqe, 0, srq->wqe_size);
774 	/* Calculate wqe_size16 and data_len */
775 	for (i = 0, hw_sge = (struct sq_sge *)srqe->data;
776 	     i < wqe->num_sge; i++, hw_sge++) {
777 		hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr);
778 		hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey);
779 		hw_sge->size = cpu_to_le32(wqe->sg_list[i].size);
780 	}
781 	srqe->wqe_type = wqe->type;
782 	srqe->flags = wqe->flags;
783 	srqe->wqe_size = wqe->num_sge +
784 			((offsetof(typeof(*srqe), data) + 15) >> 4);
785 	srqe->wr_id[0] = cpu_to_le32((u32)next);
786 	srq->swq[next].wr_id = wqe->wr_id;
787 
788 	bnxt_qplib_hwq_incr_prod(&srq->dbinfo, srq_hwq, srq->dbinfo.max_slot);
789 
790 	spin_lock(&srq_hwq->lock);
791 	count = __bnxt_qplib_get_avail(srq_hwq);
792 	spin_unlock(&srq_hwq->lock);
793 	/* Ring DB */
794 	bnxt_qplib_ring_prod_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ);
795 	if (srq->arm_req == true && count > srq->threshold) {
796 		srq->arm_req = false;
797 		bnxt_qplib_srq_arm_db(&srq->dbinfo, srq->threshold);
798 	}
799 
800 	return 0;
801 }
802 
803 /* QP */
804 
bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q * que)805 static int bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q *que)
806 {
807 	int indx;
808 
809 	que->swq = kcalloc(que->max_wqe, sizeof(*que->swq), GFP_KERNEL);
810 	if (!que->swq)
811 		return -ENOMEM;
812 
813 	que->swq_start = 0;
814 	que->swq_last = que->max_wqe - 1;
815 	for (indx = 0; indx < que->max_wqe; indx++)
816 		que->swq[indx].next_idx = indx + 1;
817 	que->swq[que->swq_last].next_idx = 0; /* Make it circular */
818 	que->swq_last = 0;
819 
820 	return 0;
821 }
822 
bnxt_qplib_create_qp1(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)823 int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
824 {
825 	struct bnxt_qplib_hwq_attr hwq_attr = {};
826 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
827 	struct creq_create_qp1_resp resp = {};
828 	struct bnxt_qplib_cmdqmsg msg = {};
829 	struct bnxt_qplib_q *sq = &qp->sq;
830 	struct bnxt_qplib_q *rq = &qp->rq;
831 	struct cmdq_create_qp1 req = {};
832 	struct bnxt_qplib_pbl *pbl;
833 	u32 qp_flags = 0;
834 	u8 pg_sz_lvl;
835 	u32 tbl_indx;
836 	int rc;
837 
838 	sq->dbinfo.flags = 0;
839 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
840 				 CMDQ_BASE_OPCODE_CREATE_QP1,
841 				 sizeof(req));
842 	/* General */
843 	req.type = qp->type;
844 	req.dpi = cpu_to_le32(qp->dpi->dpi);
845 	req.qp_handle = cpu_to_le64(qp->qp_handle);
846 
847 	/* SQ */
848 	hwq_attr.res = res;
849 	hwq_attr.sginfo = &sq->sg_info;
850 	hwq_attr.stride = sizeof(struct sq_sge);
851 	hwq_attr.depth = bnxt_qplib_get_depth(sq);
852 	hwq_attr.type = HWQ_TYPE_QUEUE;
853 	rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr);
854 	if (rc)
855 		return rc;
856 
857 	rc = bnxt_qplib_alloc_init_swq(sq);
858 	if (rc)
859 		goto fail_sq;
860 
861 	req.sq_size = cpu_to_le32(bnxt_qplib_set_sq_size(sq, qp->wqe_mode));
862 	pbl = &sq->hwq.pbl[PBL_LVL_0];
863 	req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
864 	pg_sz_lvl = (bnxt_qplib_base_pg_size(&sq->hwq) <<
865 		     CMDQ_CREATE_QP1_SQ_PG_SIZE_SFT);
866 	pg_sz_lvl |= (sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK);
867 	req.sq_pg_size_sq_lvl = pg_sz_lvl;
868 	req.sq_fwo_sq_sge =
869 		cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) <<
870 			     CMDQ_CREATE_QP1_SQ_SGE_SFT);
871 	req.scq_cid = cpu_to_le32(qp->scq->id);
872 
873 	/* RQ */
874 	if (rq->max_wqe) {
875 		rq->dbinfo.flags = 0;
876 		hwq_attr.res = res;
877 		hwq_attr.sginfo = &rq->sg_info;
878 		hwq_attr.stride = sizeof(struct sq_sge);
879 		hwq_attr.depth = bnxt_qplib_get_depth(rq);
880 		hwq_attr.type = HWQ_TYPE_QUEUE;
881 		rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr);
882 		if (rc)
883 			goto sq_swq;
884 		rc = bnxt_qplib_alloc_init_swq(rq);
885 		if (rc)
886 			goto fail_rq;
887 		req.rq_size = cpu_to_le32(rq->max_wqe);
888 		pbl = &rq->hwq.pbl[PBL_LVL_0];
889 		req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
890 		pg_sz_lvl = (bnxt_qplib_base_pg_size(&rq->hwq) <<
891 			     CMDQ_CREATE_QP1_RQ_PG_SIZE_SFT);
892 		pg_sz_lvl |= (rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK);
893 		req.rq_pg_size_rq_lvl = pg_sz_lvl;
894 		req.rq_fwo_rq_sge =
895 			cpu_to_le16((rq->max_sge &
896 				     CMDQ_CREATE_QP1_RQ_SGE_MASK) <<
897 				    CMDQ_CREATE_QP1_RQ_SGE_SFT);
898 	}
899 	req.rcq_cid = cpu_to_le32(qp->rcq->id);
900 	/* Header buffer - allow hdr_buf pass in */
901 	rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp);
902 	if (rc) {
903 		rc = -ENOMEM;
904 		goto rq_rwq;
905 	}
906 	qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE;
907 	req.qp_flags = cpu_to_le32(qp_flags);
908 	req.pd_id = cpu_to_le32(qp->pd->id);
909 
910 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0);
911 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
912 	if (rc)
913 		goto fail;
914 
915 	qp->id = le32_to_cpu(resp.xid);
916 	qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
917 	qp->cctx = res->cctx;
918 	sq->dbinfo.hwq = &sq->hwq;
919 	sq->dbinfo.xid = qp->id;
920 	sq->dbinfo.db = qp->dpi->dbr;
921 	sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode);
922 	if (rq->max_wqe) {
923 		rq->dbinfo.hwq = &rq->hwq;
924 		rq->dbinfo.xid = qp->id;
925 		rq->dbinfo.db = qp->dpi->dbr;
926 		rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size);
927 	}
928 	tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
929 	rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
930 	rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp;
931 
932 	return 0;
933 
934 fail:
935 	bnxt_qplib_free_qp_hdr_buf(res, qp);
936 rq_rwq:
937 	kfree(rq->swq);
938 fail_rq:
939 	bnxt_qplib_free_hwq(res, &rq->hwq);
940 sq_swq:
941 	kfree(sq->swq);
942 fail_sq:
943 	bnxt_qplib_free_hwq(res, &sq->hwq);
944 	return rc;
945 }
946 
bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp * qp,int size)947 static void bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp *qp, int size)
948 {
949 	struct bnxt_qplib_hwq *hwq;
950 	struct bnxt_qplib_q *sq;
951 	u64 fpsne, psn_pg;
952 	u16 indx_pad = 0;
953 
954 	sq = &qp->sq;
955 	hwq = &sq->hwq;
956 	/* First psn entry */
957 	fpsne = (u64)bnxt_qplib_get_qe(hwq, hwq->depth, &psn_pg);
958 	if (!IS_ALIGNED(fpsne, PAGE_SIZE))
959 		indx_pad = (fpsne & ~PAGE_MASK) / size;
960 	hwq->pad_pgofft = indx_pad;
961 	hwq->pad_pg = (u64 *)psn_pg;
962 	hwq->pad_stride = size;
963 }
964 
bnxt_qplib_create_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)965 int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
966 {
967 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
968 	struct bnxt_qplib_hwq_attr hwq_attr = {};
969 	struct bnxt_qplib_sg_info sginfo = {};
970 	struct creq_create_qp_resp resp = {};
971 	struct bnxt_qplib_cmdqmsg msg = {};
972 	struct bnxt_qplib_q *sq = &qp->sq;
973 	struct bnxt_qplib_q *rq = &qp->rq;
974 	struct cmdq_create_qp req = {};
975 	int rc, req_size, psn_sz = 0;
976 	struct bnxt_qplib_hwq *xrrq;
977 	struct bnxt_qplib_pbl *pbl;
978 	u32 qp_flags = 0;
979 	u8 pg_sz_lvl;
980 	u32 tbl_indx;
981 	u16 nsge;
982 
983 	if (res->dattr)
984 		qp->dev_cap_flags = res->dattr->dev_cap_flags;
985 
986 	sq->dbinfo.flags = 0;
987 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
988 				 CMDQ_BASE_OPCODE_CREATE_QP,
989 				 sizeof(req));
990 
991 	/* General */
992 	req.type = qp->type;
993 	req.dpi = cpu_to_le32(qp->dpi->dpi);
994 	req.qp_handle = cpu_to_le64(qp->qp_handle);
995 
996 	/* SQ */
997 	if (qp->type == CMDQ_CREATE_QP_TYPE_RC) {
998 		psn_sz = bnxt_qplib_is_chip_gen_p5(res->cctx) ?
999 			 sizeof(struct sq_psn_search_ext) :
1000 			 sizeof(struct sq_psn_search);
1001 
1002 		if (BNXT_RE_HW_RETX(qp->dev_cap_flags)) {
1003 			psn_sz = sizeof(struct sq_msn_search);
1004 			qp->msn = 0;
1005 		}
1006 	}
1007 
1008 	hwq_attr.res = res;
1009 	hwq_attr.sginfo = &sq->sg_info;
1010 	hwq_attr.stride = sizeof(struct sq_sge);
1011 	hwq_attr.depth = bnxt_qplib_get_depth(sq);
1012 	hwq_attr.aux_stride = psn_sz;
1013 	hwq_attr.aux_depth = psn_sz ? bnxt_qplib_set_sq_size(sq, qp->wqe_mode)
1014 				    : 0;
1015 	/* Update msn tbl size */
1016 	if (BNXT_RE_HW_RETX(qp->dev_cap_flags) && psn_sz) {
1017 		hwq_attr.aux_depth = roundup_pow_of_two(bnxt_qplib_set_sq_size(sq, qp->wqe_mode));
1018 		qp->msn_tbl_sz = hwq_attr.aux_depth;
1019 		qp->msn = 0;
1020 	}
1021 
1022 	hwq_attr.type = HWQ_TYPE_QUEUE;
1023 	rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr);
1024 	if (rc)
1025 		return rc;
1026 
1027 	rc = bnxt_qplib_alloc_init_swq(sq);
1028 	if (rc)
1029 		goto fail_sq;
1030 
1031 	if (psn_sz)
1032 		bnxt_qplib_init_psn_ptr(qp, psn_sz);
1033 
1034 	req.sq_size = cpu_to_le32(bnxt_qplib_set_sq_size(sq, qp->wqe_mode));
1035 	pbl = &sq->hwq.pbl[PBL_LVL_0];
1036 	req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
1037 	pg_sz_lvl = (bnxt_qplib_base_pg_size(&sq->hwq) <<
1038 		     CMDQ_CREATE_QP_SQ_PG_SIZE_SFT);
1039 	pg_sz_lvl |= (sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK);
1040 	req.sq_pg_size_sq_lvl = pg_sz_lvl;
1041 	req.sq_fwo_sq_sge =
1042 		cpu_to_le16(((sq->max_sge & CMDQ_CREATE_QP_SQ_SGE_MASK) <<
1043 			     CMDQ_CREATE_QP_SQ_SGE_SFT) | 0);
1044 	req.scq_cid = cpu_to_le32(qp->scq->id);
1045 
1046 	/* RQ */
1047 	if (!qp->srq) {
1048 		rq->dbinfo.flags = 0;
1049 		hwq_attr.res = res;
1050 		hwq_attr.sginfo = &rq->sg_info;
1051 		hwq_attr.stride = sizeof(struct sq_sge);
1052 		hwq_attr.depth = bnxt_qplib_get_depth(rq);
1053 		hwq_attr.aux_stride = 0;
1054 		hwq_attr.aux_depth = 0;
1055 		hwq_attr.type = HWQ_TYPE_QUEUE;
1056 		rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr);
1057 		if (rc)
1058 			goto sq_swq;
1059 		rc = bnxt_qplib_alloc_init_swq(rq);
1060 		if (rc)
1061 			goto fail_rq;
1062 
1063 		req.rq_size = cpu_to_le32(rq->max_wqe);
1064 		pbl = &rq->hwq.pbl[PBL_LVL_0];
1065 		req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
1066 		pg_sz_lvl = (bnxt_qplib_base_pg_size(&rq->hwq) <<
1067 			     CMDQ_CREATE_QP_RQ_PG_SIZE_SFT);
1068 		pg_sz_lvl |= (rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK);
1069 		req.rq_pg_size_rq_lvl = pg_sz_lvl;
1070 		nsge = (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ?
1071 			6 : rq->max_sge;
1072 		req.rq_fwo_rq_sge =
1073 			cpu_to_le16(((nsge &
1074 				      CMDQ_CREATE_QP_RQ_SGE_MASK) <<
1075 				     CMDQ_CREATE_QP_RQ_SGE_SFT) | 0);
1076 	} else {
1077 		/* SRQ */
1078 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED;
1079 		req.srq_cid = cpu_to_le32(qp->srq->id);
1080 	}
1081 	req.rcq_cid = cpu_to_le32(qp->rcq->id);
1082 
1083 	qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE;
1084 	qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED;
1085 	if (qp->sig_type)
1086 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION;
1087 	if (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE)
1088 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_VARIABLE_SIZED_WQE_ENABLED;
1089 	if (_is_ext_stats_supported(res->dattr->dev_cap_flags) && !res->is_vf)
1090 		qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_EXT_STATS_ENABLED;
1091 
1092 	req.qp_flags = cpu_to_le32(qp_flags);
1093 
1094 	/* ORRQ and IRRQ */
1095 	if (psn_sz) {
1096 		xrrq = &qp->orrq;
1097 		xrrq->max_elements =
1098 			ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
1099 		req_size = xrrq->max_elements *
1100 			   BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1;
1101 		req_size &= ~(PAGE_SIZE - 1);
1102 		sginfo.pgsize = req_size;
1103 		sginfo.pgshft = PAGE_SHIFT;
1104 
1105 		hwq_attr.res = res;
1106 		hwq_attr.sginfo = &sginfo;
1107 		hwq_attr.depth = xrrq->max_elements;
1108 		hwq_attr.stride = BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE;
1109 		hwq_attr.aux_stride = 0;
1110 		hwq_attr.aux_depth = 0;
1111 		hwq_attr.type = HWQ_TYPE_CTX;
1112 		rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr);
1113 		if (rc)
1114 			goto rq_swq;
1115 		pbl = &xrrq->pbl[PBL_LVL_0];
1116 		req.orrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
1117 
1118 		xrrq = &qp->irrq;
1119 		xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS(
1120 						qp->max_dest_rd_atomic);
1121 		req_size = xrrq->max_elements *
1122 			   BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1;
1123 		req_size &= ~(PAGE_SIZE - 1);
1124 		sginfo.pgsize = req_size;
1125 		hwq_attr.depth =  xrrq->max_elements;
1126 		hwq_attr.stride = BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE;
1127 		rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr);
1128 		if (rc)
1129 			goto fail_orrq;
1130 
1131 		pbl = &xrrq->pbl[PBL_LVL_0];
1132 		req.irrq_addr = cpu_to_le64(pbl->pg_map_arr[0]);
1133 	}
1134 	req.pd_id = cpu_to_le32(qp->pd->id);
1135 
1136 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
1137 				sizeof(resp), 0);
1138 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1139 	if (rc)
1140 		goto fail;
1141 
1142 	qp->id = le32_to_cpu(resp.xid);
1143 	qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET;
1144 	INIT_LIST_HEAD(&qp->sq_flush);
1145 	INIT_LIST_HEAD(&qp->rq_flush);
1146 	qp->cctx = res->cctx;
1147 	sq->dbinfo.hwq = &sq->hwq;
1148 	sq->dbinfo.xid = qp->id;
1149 	sq->dbinfo.db = qp->dpi->dbr;
1150 	sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode);
1151 	if (rq->max_wqe) {
1152 		rq->dbinfo.hwq = &rq->hwq;
1153 		rq->dbinfo.xid = qp->id;
1154 		rq->dbinfo.db = qp->dpi->dbr;
1155 		rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size);
1156 	}
1157 	tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
1158 	rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
1159 	rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp;
1160 
1161 	return 0;
1162 fail:
1163 	bnxt_qplib_free_hwq(res, &qp->irrq);
1164 fail_orrq:
1165 	bnxt_qplib_free_hwq(res, &qp->orrq);
1166 rq_swq:
1167 	kfree(rq->swq);
1168 fail_rq:
1169 	bnxt_qplib_free_hwq(res, &rq->hwq);
1170 sq_swq:
1171 	kfree(sq->swq);
1172 fail_sq:
1173 	bnxt_qplib_free_hwq(res, &sq->hwq);
1174 	return rc;
1175 }
1176 
__modify_flags_from_init_state(struct bnxt_qplib_qp * qp)1177 static void __modify_flags_from_init_state(struct bnxt_qplib_qp *qp)
1178 {
1179 	switch (qp->state) {
1180 	case CMDQ_MODIFY_QP_NEW_STATE_RTR:
1181 		/* INIT->RTR, configure the path_mtu to the default
1182 		 * 2048 if not being requested
1183 		 */
1184 		if (!(qp->modify_flags &
1185 		    CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) {
1186 			qp->modify_flags |=
1187 				CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU;
1188 			qp->path_mtu =
1189 				CMDQ_MODIFY_QP_PATH_MTU_MTU_2048;
1190 		}
1191 		qp->modify_flags &=
1192 			~CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID;
1193 		/* Bono FW require the max_dest_rd_atomic to be >= 1 */
1194 		if (qp->max_dest_rd_atomic < 1)
1195 			qp->max_dest_rd_atomic = 1;
1196 		qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC;
1197 		/* Bono FW 20.6.5 requires SGID_INDEX configuration */
1198 		if (!(qp->modify_flags &
1199 		    CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) {
1200 			qp->modify_flags |=
1201 				CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX;
1202 			qp->ah.sgid_index = 0;
1203 		}
1204 		break;
1205 	default:
1206 		break;
1207 	}
1208 }
1209 
__modify_flags_from_rtr_state(struct bnxt_qplib_qp * qp)1210 static void __modify_flags_from_rtr_state(struct bnxt_qplib_qp *qp)
1211 {
1212 	switch (qp->state) {
1213 	case CMDQ_MODIFY_QP_NEW_STATE_RTS:
1214 		/* Bono FW requires the max_rd_atomic to be >= 1 */
1215 		if (qp->max_rd_atomic < 1)
1216 			qp->max_rd_atomic = 1;
1217 		/* Bono FW does not allow PKEY_INDEX,
1218 		 * DGID, FLOW_LABEL, SGID_INDEX, HOP_LIMIT,
1219 		 * TRAFFIC_CLASS, DEST_MAC, PATH_MTU, RQ_PSN,
1220 		 * MIN_RNR_TIMER, MAX_DEST_RD_ATOMIC, DEST_QP_ID
1221 		 * modification
1222 		 */
1223 		qp->modify_flags &=
1224 			~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY |
1225 			  CMDQ_MODIFY_QP_MODIFY_MASK_DGID |
1226 			  CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL |
1227 			  CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX |
1228 			  CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT |
1229 			  CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS |
1230 			  CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC |
1231 			  CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU |
1232 			  CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN |
1233 			  CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER |
1234 			  CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC |
1235 			  CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID);
1236 		break;
1237 	default:
1238 		break;
1239 	}
1240 }
1241 
__filter_modify_flags(struct bnxt_qplib_qp * qp)1242 static void __filter_modify_flags(struct bnxt_qplib_qp *qp)
1243 {
1244 	switch (qp->cur_qp_state) {
1245 	case CMDQ_MODIFY_QP_NEW_STATE_RESET:
1246 		break;
1247 	case CMDQ_MODIFY_QP_NEW_STATE_INIT:
1248 		__modify_flags_from_init_state(qp);
1249 		break;
1250 	case CMDQ_MODIFY_QP_NEW_STATE_RTR:
1251 		__modify_flags_from_rtr_state(qp);
1252 		break;
1253 	case CMDQ_MODIFY_QP_NEW_STATE_RTS:
1254 		break;
1255 	case CMDQ_MODIFY_QP_NEW_STATE_SQD:
1256 		break;
1257 	case CMDQ_MODIFY_QP_NEW_STATE_SQE:
1258 		break;
1259 	case CMDQ_MODIFY_QP_NEW_STATE_ERR:
1260 		break;
1261 	default:
1262 		break;
1263 	}
1264 }
1265 
bnxt_qplib_modify_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1266 int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
1267 {
1268 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1269 	struct creq_modify_qp_resp resp = {};
1270 	struct bnxt_qplib_cmdqmsg msg = {};
1271 	struct cmdq_modify_qp req = {};
1272 	u32 temp32[4];
1273 	u32 bmask;
1274 	int rc;
1275 
1276 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
1277 				 CMDQ_BASE_OPCODE_MODIFY_QP,
1278 				 sizeof(req));
1279 
1280 	/* Filter out the qp_attr_mask based on the state->new transition */
1281 	__filter_modify_flags(qp);
1282 	bmask = qp->modify_flags;
1283 	req.modify_mask = cpu_to_le32(qp->modify_flags);
1284 	req.qp_cid = cpu_to_le32(qp->id);
1285 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) {
1286 		req.network_type_en_sqd_async_notify_new_state =
1287 				(qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) |
1288 				(qp->en_sqd_async_notify ?
1289 					CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0);
1290 	}
1291 	req.network_type_en_sqd_async_notify_new_state |= qp->nw_type;
1292 
1293 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS)
1294 		req.access = qp->access;
1295 
1296 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY)
1297 		req.pkey = cpu_to_le16(IB_DEFAULT_PKEY_FULL);
1298 
1299 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY)
1300 		req.qkey = cpu_to_le32(qp->qkey);
1301 
1302 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) {
1303 		memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid));
1304 		req.dgid[0] = cpu_to_le32(temp32[0]);
1305 		req.dgid[1] = cpu_to_le32(temp32[1]);
1306 		req.dgid[2] = cpu_to_le32(temp32[2]);
1307 		req.dgid[3] = cpu_to_le32(temp32[3]);
1308 	}
1309 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL)
1310 		req.flow_label = cpu_to_le32(qp->ah.flow_label);
1311 
1312 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)
1313 		req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id
1314 					     [qp->ah.sgid_index]);
1315 
1316 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT)
1317 		req.hop_limit = qp->ah.hop_limit;
1318 
1319 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS)
1320 		req.traffic_class = qp->ah.traffic_class;
1321 
1322 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC)
1323 		memcpy(req.dest_mac, qp->ah.dmac, 6);
1324 
1325 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)
1326 		req.path_mtu_pingpong_push_enable |= qp->path_mtu;
1327 
1328 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT)
1329 		req.timeout = qp->timeout;
1330 
1331 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT)
1332 		req.retry_cnt = qp->retry_cnt;
1333 
1334 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY)
1335 		req.rnr_retry = qp->rnr_retry;
1336 
1337 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER)
1338 		req.min_rnr_timer = qp->min_rnr_timer;
1339 
1340 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN)
1341 		req.rq_psn = cpu_to_le32(qp->rq.psn);
1342 
1343 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN)
1344 		req.sq_psn = cpu_to_le32(qp->sq.psn);
1345 
1346 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC)
1347 		req.max_rd_atomic =
1348 			ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic);
1349 
1350 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC)
1351 		req.max_dest_rd_atomic =
1352 			IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic);
1353 
1354 	req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements);
1355 	req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements);
1356 	req.sq_sge = cpu_to_le16(qp->sq.max_sge);
1357 	req.rq_sge = cpu_to_le16(qp->rq.max_sge);
1358 	req.max_inline_data = cpu_to_le32(qp->max_inline_data);
1359 	if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID)
1360 		req.dest_qp_id = cpu_to_le32(qp->dest_qpn);
1361 
1362 	req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(qp->vlan_id);
1363 
1364 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),  sizeof(resp), 0);
1365 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1366 	if (rc)
1367 		return rc;
1368 	qp->cur_qp_state = qp->state;
1369 	return 0;
1370 }
1371 
bnxt_qplib_query_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1372 int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp)
1373 {
1374 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1375 	struct creq_query_qp_resp resp = {};
1376 	struct bnxt_qplib_cmdqmsg msg = {};
1377 	struct bnxt_qplib_rcfw_sbuf sbuf;
1378 	struct creq_query_qp_resp_sb *sb;
1379 	struct cmdq_query_qp req = {};
1380 	u32 temp32[4];
1381 	int i, rc;
1382 
1383 	sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS);
1384 	sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size,
1385 				     &sbuf.dma_addr, GFP_KERNEL);
1386 	if (!sbuf.sb)
1387 		return -ENOMEM;
1388 	sb = sbuf.sb;
1389 
1390 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
1391 				 CMDQ_BASE_OPCODE_QUERY_QP,
1392 				 sizeof(req));
1393 
1394 	req.qp_cid = cpu_to_le32(qp->id);
1395 	req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS;
1396 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
1397 				sizeof(resp), 0);
1398 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1399 	if (rc)
1400 		goto bail;
1401 	/* Extract the context from the side buffer */
1402 	qp->state = sb->en_sqd_async_notify_state &
1403 			CREQ_QUERY_QP_RESP_SB_STATE_MASK;
1404 	qp->en_sqd_async_notify = sb->en_sqd_async_notify_state &
1405 				  CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY;
1406 	qp->access = sb->access;
1407 	qp->pkey_index = le16_to_cpu(sb->pkey);
1408 	qp->qkey = le32_to_cpu(sb->qkey);
1409 
1410 	temp32[0] = le32_to_cpu(sb->dgid[0]);
1411 	temp32[1] = le32_to_cpu(sb->dgid[1]);
1412 	temp32[2] = le32_to_cpu(sb->dgid[2]);
1413 	temp32[3] = le32_to_cpu(sb->dgid[3]);
1414 	memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data));
1415 
1416 	qp->ah.flow_label = le32_to_cpu(sb->flow_label);
1417 
1418 	qp->ah.sgid_index = 0;
1419 	for (i = 0; i < res->sgid_tbl.max; i++) {
1420 		if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) {
1421 			qp->ah.sgid_index = i;
1422 			break;
1423 		}
1424 	}
1425 	if (i == res->sgid_tbl.max)
1426 		dev_warn(&res->pdev->dev, "SGID not found??\n");
1427 
1428 	qp->ah.hop_limit = sb->hop_limit;
1429 	qp->ah.traffic_class = sb->traffic_class;
1430 	memcpy(qp->ah.dmac, sb->dest_mac, 6);
1431 	qp->ah.vlan_id = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
1432 				CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK) >>
1433 				CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT;
1434 	qp->path_mtu = (le16_to_cpu(sb->path_mtu_dest_vlan_id) &
1435 				    CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) >>
1436 				    CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT;
1437 	qp->timeout = sb->timeout;
1438 	qp->retry_cnt = sb->retry_cnt;
1439 	qp->rnr_retry = sb->rnr_retry;
1440 	qp->min_rnr_timer = sb->min_rnr_timer;
1441 	qp->rq.psn = le32_to_cpu(sb->rq_psn);
1442 	qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic);
1443 	qp->sq.psn = le32_to_cpu(sb->sq_psn);
1444 	qp->max_dest_rd_atomic =
1445 			IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic);
1446 	qp->sq.max_wqe = qp->sq.hwq.max_elements;
1447 	qp->rq.max_wqe = qp->rq.hwq.max_elements;
1448 	qp->sq.max_sge = le16_to_cpu(sb->sq_sge);
1449 	qp->rq.max_sge = le16_to_cpu(sb->rq_sge);
1450 	qp->max_inline_data = le32_to_cpu(sb->max_inline_data);
1451 	qp->dest_qpn = le32_to_cpu(sb->dest_qp_id);
1452 	memcpy(qp->smac, sb->src_mac, 6);
1453 	qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id);
1454 bail:
1455 	dma_free_coherent(&rcfw->pdev->dev, sbuf.size,
1456 			  sbuf.sb, sbuf.dma_addr);
1457 	return rc;
1458 }
1459 
__clean_cq(struct bnxt_qplib_cq * cq,u64 qp)1460 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp)
1461 {
1462 	struct bnxt_qplib_hwq *cq_hwq = &cq->hwq;
1463 	u32 peek_flags, peek_cons;
1464 	struct cq_base *hw_cqe;
1465 	int i;
1466 
1467 	peek_flags = cq->dbinfo.flags;
1468 	peek_cons = cq_hwq->cons;
1469 	for (i = 0; i < cq_hwq->max_elements; i++) {
1470 		hw_cqe = bnxt_qplib_get_qe(cq_hwq, peek_cons, NULL);
1471 		if (!CQE_CMP_VALID(hw_cqe, peek_flags))
1472 			continue;
1473 		/*
1474 		 * The valid test of the entry must be done first before
1475 		 * reading any further.
1476 		 */
1477 		dma_rmb();
1478 		switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) {
1479 		case CQ_BASE_CQE_TYPE_REQ:
1480 		case CQ_BASE_CQE_TYPE_TERMINAL:
1481 		{
1482 			struct cq_req *cqe = (struct cq_req *)hw_cqe;
1483 
1484 			if (qp == le64_to_cpu(cqe->qp_handle))
1485 				cqe->qp_handle = 0;
1486 			break;
1487 		}
1488 		case CQ_BASE_CQE_TYPE_RES_RC:
1489 		case CQ_BASE_CQE_TYPE_RES_UD:
1490 		case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
1491 		{
1492 			struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe;
1493 
1494 			if (qp == le64_to_cpu(cqe->qp_handle))
1495 				cqe->qp_handle = 0;
1496 			break;
1497 		}
1498 		default:
1499 			break;
1500 		}
1501 		bnxt_qplib_hwq_incr_cons(cq_hwq->max_elements, &peek_cons,
1502 					 1, &peek_flags);
1503 	}
1504 }
1505 
bnxt_qplib_destroy_qp(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1506 int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res,
1507 			  struct bnxt_qplib_qp *qp)
1508 {
1509 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
1510 	struct creq_destroy_qp_resp resp = {};
1511 	struct bnxt_qplib_cmdqmsg msg = {};
1512 	struct cmdq_destroy_qp req = {};
1513 	u32 tbl_indx;
1514 	int rc;
1515 
1516 	tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw);
1517 	rcfw->qp_tbl[tbl_indx].qp_id = BNXT_QPLIB_QP_ID_INVALID;
1518 	rcfw->qp_tbl[tbl_indx].qp_handle = NULL;
1519 
1520 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
1521 				 CMDQ_BASE_OPCODE_DESTROY_QP,
1522 				 sizeof(req));
1523 
1524 	req.qp_cid = cpu_to_le32(qp->id);
1525 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
1526 				sizeof(resp), 0);
1527 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
1528 	if (rc) {
1529 		rcfw->qp_tbl[tbl_indx].qp_id = qp->id;
1530 		rcfw->qp_tbl[tbl_indx].qp_handle = qp;
1531 		return rc;
1532 	}
1533 
1534 	return 0;
1535 }
1536 
bnxt_qplib_free_qp_res(struct bnxt_qplib_res * res,struct bnxt_qplib_qp * qp)1537 void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res,
1538 			    struct bnxt_qplib_qp *qp)
1539 {
1540 	bnxt_qplib_free_qp_hdr_buf(res, qp);
1541 	bnxt_qplib_free_hwq(res, &qp->sq.hwq);
1542 	kfree(qp->sq.swq);
1543 
1544 	bnxt_qplib_free_hwq(res, &qp->rq.hwq);
1545 	kfree(qp->rq.swq);
1546 
1547 	if (qp->irrq.max_elements)
1548 		bnxt_qplib_free_hwq(res, &qp->irrq);
1549 	if (qp->orrq.max_elements)
1550 		bnxt_qplib_free_hwq(res, &qp->orrq);
1551 
1552 }
1553 
bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp * qp,struct bnxt_qplib_sge * sge)1554 void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp,
1555 				struct bnxt_qplib_sge *sge)
1556 {
1557 	struct bnxt_qplib_q *sq = &qp->sq;
1558 	u32 sw_prod;
1559 
1560 	memset(sge, 0, sizeof(*sge));
1561 
1562 	if (qp->sq_hdr_buf) {
1563 		sw_prod = sq->swq_start;
1564 		sge->addr = (dma_addr_t)(qp->sq_hdr_buf_map +
1565 					 sw_prod * qp->sq_hdr_buf_size);
1566 		sge->lkey = 0xFFFFFFFF;
1567 		sge->size = qp->sq_hdr_buf_size;
1568 		return qp->sq_hdr_buf + sw_prod * sge->size;
1569 	}
1570 	return NULL;
1571 }
1572 
bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp * qp)1573 u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp)
1574 {
1575 	struct bnxt_qplib_q *rq = &qp->rq;
1576 
1577 	return rq->swq_start;
1578 }
1579 
bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp * qp,u32 index)1580 dma_addr_t bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index)
1581 {
1582 	return (qp->rq_hdr_buf_map + index * qp->rq_hdr_buf_size);
1583 }
1584 
bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp * qp,struct bnxt_qplib_sge * sge)1585 void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp,
1586 				struct bnxt_qplib_sge *sge)
1587 {
1588 	struct bnxt_qplib_q *rq = &qp->rq;
1589 	u32 sw_prod;
1590 
1591 	memset(sge, 0, sizeof(*sge));
1592 
1593 	if (qp->rq_hdr_buf) {
1594 		sw_prod = rq->swq_start;
1595 		sge->addr = (dma_addr_t)(qp->rq_hdr_buf_map +
1596 					 sw_prod * qp->rq_hdr_buf_size);
1597 		sge->lkey = 0xFFFFFFFF;
1598 		sge->size = qp->rq_hdr_buf_size;
1599 		return qp->rq_hdr_buf + sw_prod * sge->size;
1600 	}
1601 	return NULL;
1602 }
1603 
1604 /* Fil the MSN table into the next psn row */
bnxt_qplib_fill_msn_search(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,struct bnxt_qplib_swq * swq)1605 static void bnxt_qplib_fill_msn_search(struct bnxt_qplib_qp *qp,
1606 				       struct bnxt_qplib_swqe *wqe,
1607 				       struct bnxt_qplib_swq *swq)
1608 {
1609 	struct sq_msn_search *msns;
1610 	u32 start_psn, next_psn;
1611 	u16 start_idx;
1612 
1613 	msns = (struct sq_msn_search *)swq->psn_search;
1614 	msns->start_idx_next_psn_start_psn = 0;
1615 
1616 	start_psn = swq->start_psn;
1617 	next_psn = swq->next_psn;
1618 	start_idx = swq->slot_idx;
1619 	msns->start_idx_next_psn_start_psn |=
1620 		bnxt_re_update_msn_tbl(start_idx, next_psn, start_psn);
1621 	qp->msn++;
1622 	qp->msn %= qp->msn_tbl_sz;
1623 }
1624 
bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,struct bnxt_qplib_swq * swq)1625 static void bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp *qp,
1626 				       struct bnxt_qplib_swqe *wqe,
1627 				       struct bnxt_qplib_swq *swq)
1628 {
1629 	struct sq_psn_search_ext *psns_ext;
1630 	struct sq_psn_search *psns;
1631 	u32 flg_npsn;
1632 	u32 op_spsn;
1633 
1634 	if (!swq->psn_search)
1635 		return;
1636 	/* Handle MSN differently on cap flags  */
1637 	if (BNXT_RE_HW_RETX(qp->dev_cap_flags)) {
1638 		bnxt_qplib_fill_msn_search(qp, wqe, swq);
1639 		return;
1640 	}
1641 	psns = (struct sq_psn_search *)swq->psn_search;
1642 	psns = swq->psn_search;
1643 	psns_ext = swq->psn_ext;
1644 
1645 	op_spsn = ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) &
1646 		    SQ_PSN_SEARCH_START_PSN_MASK);
1647 	op_spsn |= ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) &
1648 		     SQ_PSN_SEARCH_OPCODE_MASK);
1649 	flg_npsn = ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) &
1650 		     SQ_PSN_SEARCH_NEXT_PSN_MASK);
1651 
1652 	if (bnxt_qplib_is_chip_gen_p5(qp->cctx)) {
1653 		psns_ext->opcode_start_psn = cpu_to_le32(op_spsn);
1654 		psns_ext->flags_next_psn = cpu_to_le32(flg_npsn);
1655 		psns_ext->start_slot_idx = cpu_to_le16(swq->slot_idx);
1656 	} else {
1657 		psns->opcode_start_psn = cpu_to_le32(op_spsn);
1658 		psns->flags_next_psn = cpu_to_le32(flg_npsn);
1659 	}
1660 }
1661 
bnxt_qplib_put_inline(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,u16 * idx)1662 static int bnxt_qplib_put_inline(struct bnxt_qplib_qp *qp,
1663 				 struct bnxt_qplib_swqe *wqe,
1664 				 u16 *idx)
1665 {
1666 	struct bnxt_qplib_hwq *hwq;
1667 	int len, t_len, offt;
1668 	bool pull_dst = true;
1669 	void *il_dst = NULL;
1670 	void *il_src = NULL;
1671 	int t_cplen, cplen;
1672 	int indx;
1673 
1674 	hwq = &qp->sq.hwq;
1675 	t_len = 0;
1676 	for (indx = 0; indx < wqe->num_sge; indx++) {
1677 		len = wqe->sg_list[indx].size;
1678 		il_src = (void *)wqe->sg_list[indx].addr;
1679 		t_len += len;
1680 		if (t_len > qp->max_inline_data)
1681 			return -ENOMEM;
1682 		while (len) {
1683 			if (pull_dst) {
1684 				pull_dst = false;
1685 				il_dst = bnxt_qplib_get_prod_qe(hwq, *idx);
1686 				(*idx)++;
1687 				t_cplen = 0;
1688 				offt = 0;
1689 			}
1690 			cplen = min_t(int, len, sizeof(struct sq_sge));
1691 			cplen = min_t(int, cplen,
1692 					(sizeof(struct sq_sge) - offt));
1693 			memcpy(il_dst, il_src, cplen);
1694 			t_cplen += cplen;
1695 			il_src += cplen;
1696 			il_dst += cplen;
1697 			offt += cplen;
1698 			len -= cplen;
1699 			if (t_cplen == sizeof(struct sq_sge))
1700 				pull_dst = true;
1701 		}
1702 	}
1703 
1704 	return t_len;
1705 }
1706 
bnxt_qplib_put_sges(struct bnxt_qplib_hwq * hwq,struct bnxt_qplib_sge * ssge,u16 nsge,u16 * idx)1707 static u32 bnxt_qplib_put_sges(struct bnxt_qplib_hwq *hwq,
1708 			       struct bnxt_qplib_sge *ssge,
1709 			       u16 nsge, u16 *idx)
1710 {
1711 	struct sq_sge *dsge;
1712 	int indx, len = 0;
1713 
1714 	for (indx = 0; indx < nsge; indx++, (*idx)++) {
1715 		dsge = bnxt_qplib_get_prod_qe(hwq, *idx);
1716 		dsge->va_or_pa = cpu_to_le64(ssge[indx].addr);
1717 		dsge->l_key = cpu_to_le32(ssge[indx].lkey);
1718 		dsge->size = cpu_to_le32(ssge[indx].size);
1719 		len += ssge[indx].size;
1720 	}
1721 
1722 	return len;
1723 }
1724 
bnxt_qplib_required_slots(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe,u16 * wqe_sz,u16 * qdf,u8 mode)1725 static u16 bnxt_qplib_required_slots(struct bnxt_qplib_qp *qp,
1726 				     struct bnxt_qplib_swqe *wqe,
1727 				     u16 *wqe_sz, u16 *qdf, u8 mode)
1728 {
1729 	u32 ilsize, bytes;
1730 	u16 nsge;
1731 	u16 slot;
1732 
1733 	nsge = wqe->num_sge;
1734 	/* Adding sq_send_hdr is a misnomer, for rq also hdr size is same. */
1735 	bytes = sizeof(struct sq_send_hdr) + nsge * sizeof(struct sq_sge);
1736 	if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) {
1737 		ilsize = bnxt_qplib_calc_ilsize(wqe, qp->max_inline_data);
1738 		bytes = ALIGN(ilsize, sizeof(struct sq_sge));
1739 		bytes += sizeof(struct sq_send_hdr);
1740 	}
1741 
1742 	*qdf =  __xlate_qfd(qp->sq.q_full_delta, bytes);
1743 	slot = bytes >> 4;
1744 	*wqe_sz = slot;
1745 	if (mode == BNXT_QPLIB_WQE_MODE_STATIC)
1746 		slot = 8;
1747 	return slot;
1748 }
1749 
bnxt_qplib_pull_psn_buff(struct bnxt_qplib_qp * qp,struct bnxt_qplib_q * sq,struct bnxt_qplib_swq * swq,bool hw_retx)1750 static void bnxt_qplib_pull_psn_buff(struct bnxt_qplib_qp *qp, struct bnxt_qplib_q *sq,
1751 				     struct bnxt_qplib_swq *swq, bool hw_retx)
1752 {
1753 	struct bnxt_qplib_hwq *hwq;
1754 	u32 pg_num, pg_indx;
1755 	void *buff;
1756 	u32 tail;
1757 
1758 	hwq = &sq->hwq;
1759 	if (!hwq->pad_pg)
1760 		return;
1761 	tail = swq->slot_idx / sq->dbinfo.max_slot;
1762 	if (hw_retx) {
1763 		/* For HW retx use qp msn index */
1764 		tail = qp->msn;
1765 		tail %= qp->msn_tbl_sz;
1766 	}
1767 	pg_num = (tail + hwq->pad_pgofft) / (PAGE_SIZE / hwq->pad_stride);
1768 	pg_indx = (tail + hwq->pad_pgofft) % (PAGE_SIZE / hwq->pad_stride);
1769 	buff = (void *)(hwq->pad_pg[pg_num] + pg_indx * hwq->pad_stride);
1770 	swq->psn_ext = buff;
1771 	swq->psn_search = buff;
1772 }
1773 
bnxt_qplib_post_send_db(struct bnxt_qplib_qp * qp)1774 void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp)
1775 {
1776 	struct bnxt_qplib_q *sq = &qp->sq;
1777 
1778 	bnxt_qplib_ring_prod_db(&sq->dbinfo, DBC_DBC_TYPE_SQ);
1779 }
1780 
bnxt_qplib_post_send(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe)1781 int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp,
1782 			 struct bnxt_qplib_swqe *wqe)
1783 {
1784 	struct bnxt_qplib_nq_work *nq_work = NULL;
1785 	int i, rc = 0, data_len = 0, pkt_num = 0;
1786 	struct bnxt_qplib_q *sq = &qp->sq;
1787 	struct bnxt_qplib_hwq *hwq;
1788 	struct bnxt_qplib_swq *swq;
1789 	bool sch_handler = false;
1790 	u16 wqe_sz, qdf = 0;
1791 	bool msn_update;
1792 	void *base_hdr;
1793 	void *ext_hdr;
1794 	__le32 temp32;
1795 	u32 wqe_idx;
1796 	u32 slots;
1797 	u16 idx;
1798 
1799 	hwq = &sq->hwq;
1800 	if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS &&
1801 	    qp->state != CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1802 		dev_err(&hwq->pdev->dev,
1803 			"QPLIB: FP: QP (0x%x) is in the 0x%x state",
1804 			qp->id, qp->state);
1805 		rc = -EINVAL;
1806 		goto done;
1807 	}
1808 
1809 	slots = bnxt_qplib_required_slots(qp, wqe, &wqe_sz, &qdf, qp->wqe_mode);
1810 	if (bnxt_qplib_queue_full(sq, slots + qdf)) {
1811 		dev_err(&hwq->pdev->dev,
1812 			"prod = %#x cons = %#x qdepth = %#x delta = %#x\n",
1813 			hwq->prod, hwq->cons, hwq->depth, sq->q_full_delta);
1814 		rc = -ENOMEM;
1815 		goto done;
1816 	}
1817 
1818 	swq = bnxt_qplib_get_swqe(sq, &wqe_idx);
1819 	bnxt_qplib_pull_psn_buff(qp, sq, swq, BNXT_RE_HW_RETX(qp->dev_cap_flags));
1820 
1821 	idx = 0;
1822 	swq->slot_idx = hwq->prod;
1823 	swq->slots = slots;
1824 	swq->wr_id = wqe->wr_id;
1825 	swq->type = wqe->type;
1826 	swq->flags = wqe->flags;
1827 	swq->start_psn = sq->psn & BTH_PSN_MASK;
1828 	if (qp->sig_type)
1829 		swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP;
1830 
1831 	if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1832 		sch_handler = true;
1833 		dev_dbg(&hwq->pdev->dev,
1834 			"%s Error QP. Scheduling for poll_cq\n", __func__);
1835 		goto queue_err;
1836 	}
1837 
1838 	base_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
1839 	ext_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
1840 	memset(base_hdr, 0, sizeof(struct sq_sge));
1841 	memset(ext_hdr, 0, sizeof(struct sq_sge));
1842 
1843 	if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE)
1844 		/* Copy the inline data */
1845 		data_len = bnxt_qplib_put_inline(qp, wqe, &idx);
1846 	else
1847 		data_len = bnxt_qplib_put_sges(hwq, wqe->sg_list, wqe->num_sge,
1848 					       &idx);
1849 	if (data_len < 0)
1850 		goto queue_err;
1851 	/* Make sure we update MSN table only for wired wqes */
1852 	msn_update = true;
1853 	/* Specifics */
1854 	switch (wqe->type) {
1855 	case BNXT_QPLIB_SWQE_TYPE_SEND:
1856 		if (qp->type == CMDQ_CREATE_QP1_TYPE_GSI) {
1857 			struct sq_send_raweth_qp1_hdr *sqe = base_hdr;
1858 			struct sq_raw_ext_hdr *ext_sqe = ext_hdr;
1859 			/* Assemble info for Raw Ethertype QPs */
1860 
1861 			sqe->wqe_type = wqe->type;
1862 			sqe->flags = wqe->flags;
1863 			sqe->wqe_size = wqe_sz;
1864 			sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action);
1865 			sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags);
1866 			sqe->length = cpu_to_le32(data_len);
1867 			ext_sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta &
1868 				SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) <<
1869 				SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT);
1870 
1871 			break;
1872 		}
1873 		fallthrough;
1874 	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:
1875 	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:
1876 	{
1877 		struct sq_ud_ext_hdr *ext_sqe = ext_hdr;
1878 		struct sq_send_hdr *sqe = base_hdr;
1879 
1880 		sqe->wqe_type = wqe->type;
1881 		sqe->flags = wqe->flags;
1882 		sqe->wqe_size = wqe_sz;
1883 		sqe->inv_key_or_imm_data = cpu_to_le32(wqe->send.inv_key);
1884 		if (qp->type == CMDQ_CREATE_QP_TYPE_UD ||
1885 		    qp->type == CMDQ_CREATE_QP_TYPE_GSI) {
1886 			sqe->q_key = cpu_to_le32(wqe->send.q_key);
1887 			sqe->length = cpu_to_le32(data_len);
1888 			sq->psn = (sq->psn + 1) & BTH_PSN_MASK;
1889 			ext_sqe->dst_qp = cpu_to_le32(wqe->send.dst_qp &
1890 						      SQ_SEND_DST_QP_MASK);
1891 			ext_sqe->avid = cpu_to_le32(wqe->send.avid &
1892 						    SQ_SEND_AVID_MASK);
1893 			msn_update = false;
1894 		} else {
1895 			sqe->length = cpu_to_le32(data_len);
1896 			if (qp->mtu)
1897 				pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
1898 			if (!pkt_num)
1899 				pkt_num = 1;
1900 			sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
1901 		}
1902 		break;
1903 	}
1904 	case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE:
1905 	case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM:
1906 	case BNXT_QPLIB_SWQE_TYPE_RDMA_READ:
1907 	{
1908 		struct sq_rdma_ext_hdr *ext_sqe = ext_hdr;
1909 		struct sq_rdma_hdr *sqe = base_hdr;
1910 
1911 		sqe->wqe_type = wqe->type;
1912 		sqe->flags = wqe->flags;
1913 		sqe->wqe_size = wqe_sz;
1914 		sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key);
1915 		sqe->length = cpu_to_le32((u32)data_len);
1916 		ext_sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va);
1917 		ext_sqe->remote_key = cpu_to_le32(wqe->rdma.r_key);
1918 		if (qp->mtu)
1919 			pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
1920 		if (!pkt_num)
1921 			pkt_num = 1;
1922 		sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
1923 		break;
1924 	}
1925 	case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP:
1926 	case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD:
1927 	{
1928 		struct sq_atomic_ext_hdr *ext_sqe = ext_hdr;
1929 		struct sq_atomic_hdr *sqe = base_hdr;
1930 
1931 		sqe->wqe_type = wqe->type;
1932 		sqe->flags = wqe->flags;
1933 		sqe->remote_key = cpu_to_le32(wqe->atomic.r_key);
1934 		sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va);
1935 		ext_sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data);
1936 		ext_sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data);
1937 		if (qp->mtu)
1938 			pkt_num = (data_len + qp->mtu - 1) / qp->mtu;
1939 		if (!pkt_num)
1940 			pkt_num = 1;
1941 		sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK;
1942 		break;
1943 	}
1944 	case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV:
1945 	{
1946 		struct sq_localinvalidate *sqe = base_hdr;
1947 
1948 		sqe->wqe_type = wqe->type;
1949 		sqe->flags = wqe->flags;
1950 		sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key);
1951 		msn_update = false;
1952 		break;
1953 	}
1954 	case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR:
1955 	{
1956 		struct sq_fr_pmr_ext_hdr *ext_sqe = ext_hdr;
1957 		struct sq_fr_pmr_hdr *sqe = base_hdr;
1958 
1959 		sqe->wqe_type = wqe->type;
1960 		sqe->flags = wqe->flags;
1961 		sqe->access_cntl = wqe->frmr.access_cntl |
1962 				   SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE;
1963 		sqe->zero_based_page_size_log =
1964 			(wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) <<
1965 			SQ_FR_PMR_PAGE_SIZE_LOG_SFT |
1966 			(wqe->frmr.zero_based ? SQ_FR_PMR_ZERO_BASED : 0);
1967 		sqe->l_key = cpu_to_le32(wqe->frmr.l_key);
1968 		temp32 = cpu_to_le32(wqe->frmr.length);
1969 		memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length));
1970 		sqe->numlevels_pbl_page_size_log =
1971 			((wqe->frmr.pbl_pg_sz_log <<
1972 					SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) &
1973 					SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) |
1974 			((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) &
1975 					SQ_FR_PMR_NUMLEVELS_MASK);
1976 
1977 		for (i = 0; i < wqe->frmr.page_list_len; i++)
1978 			wqe->frmr.pbl_ptr[i] = cpu_to_le64(
1979 						wqe->frmr.page_list[i] |
1980 						PTU_PTE_VALID);
1981 		ext_sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr);
1982 		ext_sqe->va = cpu_to_le64(wqe->frmr.va);
1983 		msn_update = false;
1984 
1985 		break;
1986 	}
1987 	case BNXT_QPLIB_SWQE_TYPE_BIND_MW:
1988 	{
1989 		struct sq_bind_ext_hdr *ext_sqe = ext_hdr;
1990 		struct sq_bind_hdr *sqe = base_hdr;
1991 
1992 		sqe->wqe_type = wqe->type;
1993 		sqe->flags = wqe->flags;
1994 		sqe->access_cntl = wqe->bind.access_cntl;
1995 		sqe->mw_type_zero_based = wqe->bind.mw_type |
1996 			(wqe->bind.zero_based ? SQ_BIND_ZERO_BASED : 0);
1997 		sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key);
1998 		sqe->l_key = cpu_to_le32(wqe->bind.r_key);
1999 		ext_sqe->va = cpu_to_le64(wqe->bind.va);
2000 		ext_sqe->length_lo = cpu_to_le32(wqe->bind.length);
2001 		msn_update = false;
2002 		break;
2003 	}
2004 	default:
2005 		/* Bad wqe, return error */
2006 		rc = -EINVAL;
2007 		goto done;
2008 	}
2009 	if (!BNXT_RE_HW_RETX(qp->dev_cap_flags) || msn_update) {
2010 		swq->next_psn = sq->psn & BTH_PSN_MASK;
2011 		bnxt_qplib_fill_psn_search(qp, wqe, swq);
2012 	}
2013 queue_err:
2014 	bnxt_qplib_swq_mod_start(sq, wqe_idx);
2015 	bnxt_qplib_hwq_incr_prod(&sq->dbinfo, hwq, swq->slots);
2016 	qp->wqe_cnt++;
2017 done:
2018 	if (sch_handler) {
2019 		nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
2020 		if (nq_work) {
2021 			nq_work->cq = qp->scq;
2022 			nq_work->nq = qp->scq->nq;
2023 			INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
2024 			queue_work(qp->scq->nq->cqn_wq, &nq_work->work);
2025 		} else {
2026 			dev_err(&hwq->pdev->dev,
2027 				"FP: Failed to allocate SQ nq_work!\n");
2028 			rc = -ENOMEM;
2029 		}
2030 	}
2031 	return rc;
2032 }
2033 
bnxt_qplib_post_recv_db(struct bnxt_qplib_qp * qp)2034 void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp)
2035 {
2036 	struct bnxt_qplib_q *rq = &qp->rq;
2037 
2038 	bnxt_qplib_ring_prod_db(&rq->dbinfo, DBC_DBC_TYPE_RQ);
2039 }
2040 
bnxt_qplib_post_recv(struct bnxt_qplib_qp * qp,struct bnxt_qplib_swqe * wqe)2041 int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp,
2042 			 struct bnxt_qplib_swqe *wqe)
2043 {
2044 	struct bnxt_qplib_nq_work *nq_work = NULL;
2045 	struct bnxt_qplib_q *rq = &qp->rq;
2046 	struct rq_wqe_hdr *base_hdr;
2047 	struct rq_ext_hdr *ext_hdr;
2048 	struct bnxt_qplib_hwq *hwq;
2049 	struct bnxt_qplib_swq *swq;
2050 	bool sch_handler = false;
2051 	u16 wqe_sz, idx;
2052 	u32 wqe_idx;
2053 	int rc = 0;
2054 
2055 	hwq = &rq->hwq;
2056 	if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_RESET) {
2057 		dev_err(&hwq->pdev->dev,
2058 			"QPLIB: FP: QP (0x%x) is in the 0x%x state",
2059 			qp->id, qp->state);
2060 		rc = -EINVAL;
2061 		goto done;
2062 	}
2063 
2064 	if (bnxt_qplib_queue_full(rq, rq->dbinfo.max_slot)) {
2065 		dev_err(&hwq->pdev->dev,
2066 			"FP: QP (0x%x) RQ is full!\n", qp->id);
2067 		rc = -EINVAL;
2068 		goto done;
2069 	}
2070 
2071 	swq = bnxt_qplib_get_swqe(rq, &wqe_idx);
2072 	swq->wr_id = wqe->wr_id;
2073 	swq->slots = rq->dbinfo.max_slot;
2074 
2075 	if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
2076 		sch_handler = true;
2077 		dev_dbg(&hwq->pdev->dev,
2078 			"%s: Error QP. Scheduling for poll_cq\n", __func__);
2079 		goto queue_err;
2080 	}
2081 
2082 	idx = 0;
2083 	base_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
2084 	ext_hdr = bnxt_qplib_get_prod_qe(hwq, idx++);
2085 	memset(base_hdr, 0, sizeof(struct sq_sge));
2086 	memset(ext_hdr, 0, sizeof(struct sq_sge));
2087 	wqe_sz = (sizeof(struct rq_wqe_hdr) +
2088 	wqe->num_sge * sizeof(struct sq_sge)) >> 4;
2089 	bnxt_qplib_put_sges(hwq, wqe->sg_list, wqe->num_sge, &idx);
2090 	if (!wqe->num_sge) {
2091 		struct sq_sge *sge;
2092 
2093 		sge = bnxt_qplib_get_prod_qe(hwq, idx++);
2094 		sge->size = 0;
2095 		wqe_sz++;
2096 	}
2097 	base_hdr->wqe_type = wqe->type;
2098 	base_hdr->flags = wqe->flags;
2099 	base_hdr->wqe_size = wqe_sz;
2100 	base_hdr->wr_id[0] = cpu_to_le32(wqe_idx);
2101 queue_err:
2102 	bnxt_qplib_swq_mod_start(rq, wqe_idx);
2103 	bnxt_qplib_hwq_incr_prod(&rq->dbinfo, hwq, swq->slots);
2104 done:
2105 	if (sch_handler) {
2106 		nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC);
2107 		if (nq_work) {
2108 			nq_work->cq = qp->rcq;
2109 			nq_work->nq = qp->rcq->nq;
2110 			INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task);
2111 			queue_work(qp->rcq->nq->cqn_wq, &nq_work->work);
2112 		} else {
2113 			dev_err(&hwq->pdev->dev,
2114 				"FP: Failed to allocate RQ nq_work!\n");
2115 			rc = -ENOMEM;
2116 		}
2117 	}
2118 
2119 	return rc;
2120 }
2121 
2122 /* CQ */
bnxt_qplib_create_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2123 int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
2124 {
2125 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2126 	struct bnxt_qplib_hwq_attr hwq_attr = {};
2127 	struct creq_create_cq_resp resp = {};
2128 	struct bnxt_qplib_cmdqmsg msg = {};
2129 	struct cmdq_create_cq req = {};
2130 	struct bnxt_qplib_pbl *pbl;
2131 	u32 pg_sz_lvl;
2132 	int rc;
2133 
2134 	if (!cq->dpi) {
2135 		dev_err(&rcfw->pdev->dev,
2136 			"FP: CREATE_CQ failed due to NULL DPI\n");
2137 		return -EINVAL;
2138 	}
2139 
2140 	cq->dbinfo.flags = 0;
2141 	hwq_attr.res = res;
2142 	hwq_attr.depth = cq->max_wqe;
2143 	hwq_attr.stride = sizeof(struct cq_base);
2144 	hwq_attr.type = HWQ_TYPE_QUEUE;
2145 	hwq_attr.sginfo = &cq->sg_info;
2146 	rc = bnxt_qplib_alloc_init_hwq(&cq->hwq, &hwq_attr);
2147 	if (rc)
2148 		return rc;
2149 
2150 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
2151 				 CMDQ_BASE_OPCODE_CREATE_CQ,
2152 				 sizeof(req));
2153 
2154 	req.dpi = cpu_to_le32(cq->dpi->dpi);
2155 	req.cq_handle = cpu_to_le64(cq->cq_handle);
2156 	req.cq_size = cpu_to_le32(cq->max_wqe);
2157 	pbl = &cq->hwq.pbl[PBL_LVL_0];
2158 	pg_sz_lvl = (bnxt_qplib_base_pg_size(&cq->hwq) <<
2159 		     CMDQ_CREATE_CQ_PG_SIZE_SFT);
2160 	pg_sz_lvl |= (cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK);
2161 	req.pg_size_lvl = cpu_to_le32(pg_sz_lvl);
2162 	req.pbl = cpu_to_le64(pbl->pg_map_arr[0]);
2163 	req.cq_fco_cnq_id = cpu_to_le32(
2164 			(cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) <<
2165 			 CMDQ_CREATE_CQ_CNQ_ID_SFT);
2166 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2167 				sizeof(resp), 0);
2168 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2169 	if (rc)
2170 		goto fail;
2171 
2172 	cq->id = le32_to_cpu(resp.xid);
2173 	cq->period = BNXT_QPLIB_QUEUE_START_PERIOD;
2174 	init_waitqueue_head(&cq->waitq);
2175 	INIT_LIST_HEAD(&cq->sqf_head);
2176 	INIT_LIST_HEAD(&cq->rqf_head);
2177 	spin_lock_init(&cq->compl_lock);
2178 	spin_lock_init(&cq->flush_lock);
2179 
2180 	cq->dbinfo.hwq = &cq->hwq;
2181 	cq->dbinfo.xid = cq->id;
2182 	cq->dbinfo.db = cq->dpi->dbr;
2183 	cq->dbinfo.priv_db = res->dpi_tbl.priv_db;
2184 
2185 	bnxt_qplib_armen_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMENA);
2186 
2187 	return 0;
2188 
2189 fail:
2190 	bnxt_qplib_free_hwq(res, &cq->hwq);
2191 	return rc;
2192 }
2193 
bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2194 void bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res *res,
2195 				   struct bnxt_qplib_cq *cq)
2196 {
2197 	bnxt_qplib_free_hwq(res, &cq->hwq);
2198 	memcpy(&cq->hwq, &cq->resize_hwq, sizeof(cq->hwq));
2199        /* Reset only the cons bit in the flags */
2200 	cq->dbinfo.flags &= ~(1UL << BNXT_QPLIB_FLAG_EPOCH_CONS_SHIFT);
2201 }
2202 
bnxt_qplib_resize_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq,int new_cqes)2203 int bnxt_qplib_resize_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq,
2204 			 int new_cqes)
2205 {
2206 	struct bnxt_qplib_hwq_attr hwq_attr = {};
2207 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2208 	struct creq_resize_cq_resp resp = {};
2209 	struct bnxt_qplib_cmdqmsg msg = {};
2210 	struct cmdq_resize_cq req = {};
2211 	struct bnxt_qplib_pbl *pbl;
2212 	u32 pg_sz, lvl, new_sz;
2213 	int rc;
2214 
2215 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
2216 				 CMDQ_BASE_OPCODE_RESIZE_CQ,
2217 				 sizeof(req));
2218 	hwq_attr.sginfo = &cq->sg_info;
2219 	hwq_attr.res = res;
2220 	hwq_attr.depth = new_cqes;
2221 	hwq_attr.stride = sizeof(struct cq_base);
2222 	hwq_attr.type = HWQ_TYPE_QUEUE;
2223 	rc = bnxt_qplib_alloc_init_hwq(&cq->resize_hwq, &hwq_attr);
2224 	if (rc)
2225 		return rc;
2226 
2227 	req.cq_cid = cpu_to_le32(cq->id);
2228 	pbl = &cq->resize_hwq.pbl[PBL_LVL_0];
2229 	pg_sz = bnxt_qplib_base_pg_size(&cq->resize_hwq);
2230 	lvl = (cq->resize_hwq.level << CMDQ_RESIZE_CQ_LVL_SFT) &
2231 				       CMDQ_RESIZE_CQ_LVL_MASK;
2232 	new_sz = (new_cqes << CMDQ_RESIZE_CQ_NEW_CQ_SIZE_SFT) &
2233 		  CMDQ_RESIZE_CQ_NEW_CQ_SIZE_MASK;
2234 	req.new_cq_size_pg_size_lvl = cpu_to_le32(new_sz | pg_sz | lvl);
2235 	req.new_pbl = cpu_to_le64(pbl->pg_map_arr[0]);
2236 
2237 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2238 				sizeof(resp), 0);
2239 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2240 	return rc;
2241 }
2242 
bnxt_qplib_destroy_cq(struct bnxt_qplib_res * res,struct bnxt_qplib_cq * cq)2243 int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
2244 {
2245 	struct bnxt_qplib_rcfw *rcfw = res->rcfw;
2246 	struct creq_destroy_cq_resp resp = {};
2247 	struct bnxt_qplib_cmdqmsg msg = {};
2248 	struct cmdq_destroy_cq req = {};
2249 	u16 total_cnq_events;
2250 	int rc;
2251 
2252 	bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
2253 				 CMDQ_BASE_OPCODE_DESTROY_CQ,
2254 				 sizeof(req));
2255 
2256 	req.cq_cid = cpu_to_le32(cq->id);
2257 	bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req),
2258 				sizeof(resp), 0);
2259 	rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
2260 	if (rc)
2261 		return rc;
2262 	total_cnq_events = le16_to_cpu(resp.total_cnq_events);
2263 	__wait_for_all_nqes(cq, total_cnq_events);
2264 	bnxt_qplib_free_hwq(res, &cq->hwq);
2265 	return 0;
2266 }
2267 
__flush_sq(struct bnxt_qplib_q * sq,struct bnxt_qplib_qp * qp,struct bnxt_qplib_cqe ** pcqe,int * budget)2268 static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp,
2269 		      struct bnxt_qplib_cqe **pcqe, int *budget)
2270 {
2271 	struct bnxt_qplib_cqe *cqe;
2272 	u32 start, last;
2273 	int rc = 0;
2274 
2275 	/* Now complete all outstanding SQEs with FLUSHED_ERR */
2276 	start = sq->swq_start;
2277 	cqe = *pcqe;
2278 	while (*budget) {
2279 		last = sq->swq_last;
2280 		if (start == last)
2281 			break;
2282 		/* Skip the FENCE WQE completions */
2283 		if (sq->swq[last].wr_id == BNXT_QPLIB_FENCE_WRID) {
2284 			bnxt_qplib_cancel_phantom_processing(qp);
2285 			goto skip_compl;
2286 		}
2287 		memset(cqe, 0, sizeof(*cqe));
2288 		cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR;
2289 		cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
2290 		cqe->qp_handle = (u64)(unsigned long)qp;
2291 		cqe->wr_id = sq->swq[last].wr_id;
2292 		cqe->src_qp = qp->id;
2293 		cqe->type = sq->swq[last].type;
2294 		cqe++;
2295 		(*budget)--;
2296 skip_compl:
2297 		bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons,
2298 					 sq->swq[last].slots, &sq->dbinfo.flags);
2299 		sq->swq_last = sq->swq[last].next_idx;
2300 	}
2301 	*pcqe = cqe;
2302 	if (!(*budget) && sq->swq_last != start)
2303 		/* Out of budget */
2304 		rc = -EAGAIN;
2305 
2306 	return rc;
2307 }
2308 
__flush_rq(struct bnxt_qplib_q * rq,struct bnxt_qplib_qp * qp,struct bnxt_qplib_cqe ** pcqe,int * budget)2309 static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp,
2310 		      struct bnxt_qplib_cqe **pcqe, int *budget)
2311 {
2312 	struct bnxt_qplib_cqe *cqe;
2313 	u32 start, last;
2314 	int opcode = 0;
2315 	int rc = 0;
2316 
2317 	switch (qp->type) {
2318 	case CMDQ_CREATE_QP1_TYPE_GSI:
2319 		opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1;
2320 		break;
2321 	case CMDQ_CREATE_QP_TYPE_RC:
2322 		opcode = CQ_BASE_CQE_TYPE_RES_RC;
2323 		break;
2324 	case CMDQ_CREATE_QP_TYPE_UD:
2325 	case CMDQ_CREATE_QP_TYPE_GSI:
2326 		opcode = CQ_BASE_CQE_TYPE_RES_UD;
2327 		break;
2328 	}
2329 
2330 	/* Flush the rest of the RQ */
2331 	start = rq->swq_start;
2332 	cqe = *pcqe;
2333 	while (*budget) {
2334 		last = rq->swq_last;
2335 		if (last == start)
2336 			break;
2337 		memset(cqe, 0, sizeof(*cqe));
2338 		cqe->status =
2339 		    CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR;
2340 		cqe->opcode = opcode;
2341 		cqe->qp_handle = (unsigned long)qp;
2342 		cqe->wr_id = rq->swq[last].wr_id;
2343 		cqe++;
2344 		(*budget)--;
2345 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2346 					 rq->swq[last].slots, &rq->dbinfo.flags);
2347 		rq->swq_last = rq->swq[last].next_idx;
2348 	}
2349 	*pcqe = cqe;
2350 	if (!*budget && rq->swq_last != start)
2351 		/* Out of budget */
2352 		rc = -EAGAIN;
2353 
2354 	return rc;
2355 }
2356 
bnxt_qplib_mark_qp_error(void * qp_handle)2357 void bnxt_qplib_mark_qp_error(void *qp_handle)
2358 {
2359 	struct bnxt_qplib_qp *qp = qp_handle;
2360 
2361 	if (!qp)
2362 		return;
2363 
2364 	/* Must block new posting of SQ and RQ */
2365 	qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2366 	bnxt_qplib_cancel_phantom_processing(qp);
2367 }
2368 
2369 /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive)
2370  *       CQE is track from sw_cq_cons to max_element but valid only if VALID=1
2371  */
do_wa9060(struct bnxt_qplib_qp * qp,struct bnxt_qplib_cq * cq,u32 cq_cons,u32 swq_last,u32 cqe_sq_cons)2372 static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq,
2373 		     u32 cq_cons, u32 swq_last, u32 cqe_sq_cons)
2374 {
2375 	u32 peek_sw_cq_cons, peek_sq_cons_idx, peek_flags;
2376 	struct bnxt_qplib_q *sq = &qp->sq;
2377 	struct cq_req *peek_req_hwcqe;
2378 	struct bnxt_qplib_qp *peek_qp;
2379 	struct bnxt_qplib_q *peek_sq;
2380 	struct bnxt_qplib_swq *swq;
2381 	struct cq_base *peek_hwcqe;
2382 	int i, rc = 0;
2383 
2384 	/* Normal mode */
2385 	/* Check for the psn_search marking before completing */
2386 	swq = &sq->swq[swq_last];
2387 	if (swq->psn_search &&
2388 	    le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) {
2389 		/* Unmark */
2390 		swq->psn_search->flags_next_psn = cpu_to_le32
2391 			(le32_to_cpu(swq->psn_search->flags_next_psn)
2392 				     & ~0x80000000);
2393 		dev_dbg(&cq->hwq.pdev->dev,
2394 			"FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n",
2395 			cq_cons, qp->id, swq_last, cqe_sq_cons);
2396 		sq->condition = true;
2397 		sq->send_phantom = true;
2398 
2399 		/* TODO: Only ARM if the previous SQE is ARMALL */
2400 		bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMALL);
2401 		rc = -EAGAIN;
2402 		goto out;
2403 	}
2404 	if (sq->condition) {
2405 		/* Peek at the completions */
2406 		peek_flags = cq->dbinfo.flags;
2407 		peek_sw_cq_cons = cq_cons;
2408 		i = cq->hwq.max_elements;
2409 		while (i--) {
2410 			peek_hwcqe = bnxt_qplib_get_qe(&cq->hwq,
2411 						       peek_sw_cq_cons, NULL);
2412 			/* If the next hwcqe is VALID */
2413 			if (CQE_CMP_VALID(peek_hwcqe, peek_flags)) {
2414 			/*
2415 			 * The valid test of the entry must be done first before
2416 			 * reading any further.
2417 			 */
2418 				dma_rmb();
2419 				/* If the next hwcqe is a REQ */
2420 				if ((peek_hwcqe->cqe_type_toggle &
2421 				    CQ_BASE_CQE_TYPE_MASK) ==
2422 				    CQ_BASE_CQE_TYPE_REQ) {
2423 					peek_req_hwcqe = (struct cq_req *)
2424 							 peek_hwcqe;
2425 					peek_qp = (struct bnxt_qplib_qp *)
2426 						((unsigned long)
2427 						 le64_to_cpu
2428 						 (peek_req_hwcqe->qp_handle));
2429 					peek_sq = &peek_qp->sq;
2430 					peek_sq_cons_idx =
2431 						((le16_to_cpu(
2432 						  peek_req_hwcqe->sq_cons_idx)
2433 						  - 1) % sq->max_wqe);
2434 					/* If the hwcqe's sq's wr_id matches */
2435 					if (peek_sq == sq &&
2436 					    sq->swq[peek_sq_cons_idx].wr_id ==
2437 					    BNXT_QPLIB_FENCE_WRID) {
2438 						/*
2439 						 *  Unbreak only if the phantom
2440 						 *  comes back
2441 						 */
2442 						dev_dbg(&cq->hwq.pdev->dev,
2443 							"FP: Got Phantom CQE\n");
2444 						sq->condition = false;
2445 						sq->single = true;
2446 						rc = 0;
2447 						goto out;
2448 					}
2449 				}
2450 				/* Valid but not the phantom, so keep looping */
2451 			} else {
2452 				/* Not valid yet, just exit and wait */
2453 				rc = -EINVAL;
2454 				goto out;
2455 			}
2456 			bnxt_qplib_hwq_incr_cons(cq->hwq.max_elements,
2457 						 &peek_sw_cq_cons,
2458 						 1, &peek_flags);
2459 		}
2460 		dev_err(&cq->hwq.pdev->dev,
2461 			"Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x\n",
2462 			cq_cons, qp->id, swq_last, cqe_sq_cons);
2463 		rc = -EINVAL;
2464 	}
2465 out:
2466 	return rc;
2467 }
2468 
bnxt_qplib_cq_process_req(struct bnxt_qplib_cq * cq,struct cq_req * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget,u32 cq_cons,struct bnxt_qplib_qp ** lib_qp)2469 static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq,
2470 				     struct cq_req *hwcqe,
2471 				     struct bnxt_qplib_cqe **pcqe, int *budget,
2472 				     u32 cq_cons, struct bnxt_qplib_qp **lib_qp)
2473 {
2474 	struct bnxt_qplib_swq *swq;
2475 	struct bnxt_qplib_cqe *cqe;
2476 	struct bnxt_qplib_qp *qp;
2477 	struct bnxt_qplib_q *sq;
2478 	u32 cqe_sq_cons;
2479 	int rc = 0;
2480 
2481 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2482 				      le64_to_cpu(hwcqe->qp_handle));
2483 	if (!qp) {
2484 		dev_err(&cq->hwq.pdev->dev,
2485 			"FP: Process Req qp is NULL\n");
2486 		return -EINVAL;
2487 	}
2488 	sq = &qp->sq;
2489 
2490 	cqe_sq_cons = le16_to_cpu(hwcqe->sq_cons_idx) % sq->max_wqe;
2491 	if (qp->sq.flushed) {
2492 		dev_dbg(&cq->hwq.pdev->dev,
2493 			"%s: QP in Flush QP = %p\n", __func__, qp);
2494 		goto done;
2495 	}
2496 	/* Require to walk the sq's swq to fabricate CQEs for all previously
2497 	 * signaled SWQEs due to CQE aggregation from the current sq cons
2498 	 * to the cqe_sq_cons
2499 	 */
2500 	cqe = *pcqe;
2501 	while (*budget) {
2502 		if (sq->swq_last == cqe_sq_cons)
2503 			/* Done */
2504 			break;
2505 
2506 		swq = &sq->swq[sq->swq_last];
2507 		memset(cqe, 0, sizeof(*cqe));
2508 		cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
2509 		cqe->qp_handle = (u64)(unsigned long)qp;
2510 		cqe->src_qp = qp->id;
2511 		cqe->wr_id = swq->wr_id;
2512 		if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID)
2513 			goto skip;
2514 		cqe->type = swq->type;
2515 
2516 		/* For the last CQE, check for status.  For errors, regardless
2517 		 * of the request being signaled or not, it must complete with
2518 		 * the hwcqe error status
2519 		 */
2520 		if (swq->next_idx == cqe_sq_cons &&
2521 		    hwcqe->status != CQ_REQ_STATUS_OK) {
2522 			cqe->status = hwcqe->status;
2523 			dev_err(&cq->hwq.pdev->dev,
2524 				"FP: CQ Processed Req wr_id[%d] = 0x%llx with status 0x%x\n",
2525 				sq->swq_last, cqe->wr_id, cqe->status);
2526 			cqe++;
2527 			(*budget)--;
2528 			bnxt_qplib_mark_qp_error(qp);
2529 			/* Add qp to flush list of the CQ */
2530 			bnxt_qplib_add_flush_qp(qp);
2531 		} else {
2532 			/* Before we complete, do WA 9060 */
2533 			if (do_wa9060(qp, cq, cq_cons, sq->swq_last,
2534 				      cqe_sq_cons)) {
2535 				*lib_qp = qp;
2536 				goto out;
2537 			}
2538 			if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
2539 				cqe->status = CQ_REQ_STATUS_OK;
2540 				cqe++;
2541 				(*budget)--;
2542 			}
2543 		}
2544 skip:
2545 		bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons,
2546 					 swq->slots, &sq->dbinfo.flags);
2547 		sq->swq_last = swq->next_idx;
2548 		if (sq->single)
2549 			break;
2550 	}
2551 out:
2552 	*pcqe = cqe;
2553 	if (sq->swq_last != cqe_sq_cons) {
2554 		/* Out of budget */
2555 		rc = -EAGAIN;
2556 		goto done;
2557 	}
2558 	/*
2559 	 * Back to normal completion mode only after it has completed all of
2560 	 * the WC for this CQE
2561 	 */
2562 	sq->single = false;
2563 done:
2564 	return rc;
2565 }
2566 
bnxt_qplib_release_srqe(struct bnxt_qplib_srq * srq,u32 tag)2567 static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag)
2568 {
2569 	spin_lock(&srq->hwq.lock);
2570 	srq->swq[srq->last_idx].next_idx = (int)tag;
2571 	srq->last_idx = (int)tag;
2572 	srq->swq[srq->last_idx].next_idx = -1;
2573 	bnxt_qplib_hwq_incr_cons(srq->hwq.max_elements, &srq->hwq.cons,
2574 				 srq->dbinfo.max_slot, &srq->dbinfo.flags);
2575 	spin_unlock(&srq->hwq.lock);
2576 }
2577 
bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq * cq,struct cq_res_rc * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2578 static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq,
2579 					struct cq_res_rc *hwcqe,
2580 					struct bnxt_qplib_cqe **pcqe,
2581 					int *budget)
2582 {
2583 	struct bnxt_qplib_srq *srq;
2584 	struct bnxt_qplib_cqe *cqe;
2585 	struct bnxt_qplib_qp *qp;
2586 	struct bnxt_qplib_q *rq;
2587 	u32 wr_id_idx;
2588 
2589 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2590 				      le64_to_cpu(hwcqe->qp_handle));
2591 	if (!qp) {
2592 		dev_err(&cq->hwq.pdev->dev, "process_cq RC qp is NULL\n");
2593 		return -EINVAL;
2594 	}
2595 	if (qp->rq.flushed) {
2596 		dev_dbg(&cq->hwq.pdev->dev,
2597 			"%s: QP in Flush QP = %p\n", __func__, qp);
2598 		return 0;
2599 	}
2600 
2601 	cqe = *pcqe;
2602 	cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
2603 	cqe->length = le32_to_cpu(hwcqe->length);
2604 	cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key);
2605 	cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle);
2606 	cqe->flags = le16_to_cpu(hwcqe->flags);
2607 	cqe->status = hwcqe->status;
2608 	cqe->qp_handle = (u64)(unsigned long)qp;
2609 
2610 	wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) &
2611 				CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK;
2612 	if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
2613 		srq = qp->srq;
2614 		if (!srq)
2615 			return -EINVAL;
2616 		if (wr_id_idx >= srq->hwq.max_elements) {
2617 			dev_err(&cq->hwq.pdev->dev,
2618 				"FP: CQ Process RC wr_id idx 0x%x exceeded SRQ max 0x%x\n",
2619 				wr_id_idx, srq->hwq.max_elements);
2620 			return -EINVAL;
2621 		}
2622 		cqe->wr_id = srq->swq[wr_id_idx].wr_id;
2623 		bnxt_qplib_release_srqe(srq, wr_id_idx);
2624 		cqe++;
2625 		(*budget)--;
2626 		*pcqe = cqe;
2627 	} else {
2628 		struct bnxt_qplib_swq *swq;
2629 
2630 		rq = &qp->rq;
2631 		if (wr_id_idx > (rq->max_wqe - 1)) {
2632 			dev_err(&cq->hwq.pdev->dev,
2633 				"FP: CQ Process RC wr_id idx 0x%x exceeded RQ max 0x%x\n",
2634 				wr_id_idx, rq->max_wqe);
2635 			return -EINVAL;
2636 		}
2637 		if (wr_id_idx != rq->swq_last)
2638 			return -EINVAL;
2639 		swq = &rq->swq[rq->swq_last];
2640 		cqe->wr_id = swq->wr_id;
2641 		cqe++;
2642 		(*budget)--;
2643 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2644 					 swq->slots, &rq->dbinfo.flags);
2645 		rq->swq_last = swq->next_idx;
2646 		*pcqe = cqe;
2647 
2648 		if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
2649 			qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2650 			/* Add qp to flush list of the CQ */
2651 			bnxt_qplib_add_flush_qp(qp);
2652 		}
2653 	}
2654 
2655 	return 0;
2656 }
2657 
bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq * cq,struct cq_res_ud * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2658 static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq,
2659 					struct cq_res_ud *hwcqe,
2660 					struct bnxt_qplib_cqe **pcqe,
2661 					int *budget)
2662 {
2663 	struct bnxt_qplib_srq *srq;
2664 	struct bnxt_qplib_cqe *cqe;
2665 	struct bnxt_qplib_qp *qp;
2666 	struct bnxt_qplib_q *rq;
2667 	u32 wr_id_idx;
2668 
2669 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2670 				      le64_to_cpu(hwcqe->qp_handle));
2671 	if (!qp) {
2672 		dev_err(&cq->hwq.pdev->dev, "process_cq UD qp is NULL\n");
2673 		return -EINVAL;
2674 	}
2675 	if (qp->rq.flushed) {
2676 		dev_dbg(&cq->hwq.pdev->dev,
2677 			"%s: QP in Flush QP = %p\n", __func__, qp);
2678 		return 0;
2679 	}
2680 	cqe = *pcqe;
2681 	cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
2682 	cqe->length = le16_to_cpu(hwcqe->length) & CQ_RES_UD_LENGTH_MASK;
2683 	cqe->cfa_meta = le16_to_cpu(hwcqe->cfa_metadata);
2684 	cqe->invrkey = le32_to_cpu(hwcqe->imm_data);
2685 	cqe->flags = le16_to_cpu(hwcqe->flags);
2686 	cqe->status = hwcqe->status;
2687 	cqe->qp_handle = (u64)(unsigned long)qp;
2688 	/*FIXME: Endianness fix needed for smace */
2689 	memcpy(cqe->smac, hwcqe->src_mac, ETH_ALEN);
2690 	wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id)
2691 				& CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK;
2692 	cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) |
2693 				  ((le32_to_cpu(
2694 				  hwcqe->src_qp_high_srq_or_rq_wr_id) &
2695 				 CQ_RES_UD_SRC_QP_HIGH_MASK) >> 8);
2696 
2697 	if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) {
2698 		srq = qp->srq;
2699 		if (!srq)
2700 			return -EINVAL;
2701 
2702 		if (wr_id_idx >= srq->hwq.max_elements) {
2703 			dev_err(&cq->hwq.pdev->dev,
2704 				"FP: CQ Process UD wr_id idx 0x%x exceeded SRQ max 0x%x\n",
2705 				wr_id_idx, srq->hwq.max_elements);
2706 			return -EINVAL;
2707 		}
2708 		cqe->wr_id = srq->swq[wr_id_idx].wr_id;
2709 		bnxt_qplib_release_srqe(srq, wr_id_idx);
2710 		cqe++;
2711 		(*budget)--;
2712 		*pcqe = cqe;
2713 	} else {
2714 		struct bnxt_qplib_swq *swq;
2715 
2716 		rq = &qp->rq;
2717 		if (wr_id_idx > (rq->max_wqe - 1)) {
2718 			dev_err(&cq->hwq.pdev->dev,
2719 				"FP: CQ Process UD wr_id idx 0x%x exceeded RQ max 0x%x\n",
2720 				wr_id_idx, rq->max_wqe);
2721 			return -EINVAL;
2722 		}
2723 
2724 		if (rq->swq_last != wr_id_idx)
2725 			return -EINVAL;
2726 		swq = &rq->swq[rq->swq_last];
2727 		cqe->wr_id = swq->wr_id;
2728 		cqe++;
2729 		(*budget)--;
2730 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2731 					 swq->slots, &rq->dbinfo.flags);
2732 		rq->swq_last = swq->next_idx;
2733 		*pcqe = cqe;
2734 
2735 		if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
2736 			qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2737 			/* Add qp to flush list of the CQ */
2738 			bnxt_qplib_add_flush_qp(qp);
2739 		}
2740 	}
2741 
2742 	return 0;
2743 }
2744 
bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq * cq)2745 bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq)
2746 {
2747 	struct cq_base *hw_cqe;
2748 	bool rc = true;
2749 
2750 	hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL);
2751 	 /* Check for Valid bit. If the CQE is valid, return false */
2752 	rc = !CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags);
2753 	return rc;
2754 }
2755 
bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq * cq,struct cq_res_raweth_qp1 * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2756 static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq,
2757 						struct cq_res_raweth_qp1 *hwcqe,
2758 						struct bnxt_qplib_cqe **pcqe,
2759 						int *budget)
2760 {
2761 	struct bnxt_qplib_qp *qp;
2762 	struct bnxt_qplib_q *rq;
2763 	struct bnxt_qplib_srq *srq;
2764 	struct bnxt_qplib_cqe *cqe;
2765 	u32 wr_id_idx;
2766 
2767 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2768 				      le64_to_cpu(hwcqe->qp_handle));
2769 	if (!qp) {
2770 		dev_err(&cq->hwq.pdev->dev, "process_cq Raw/QP1 qp is NULL\n");
2771 		return -EINVAL;
2772 	}
2773 	if (qp->rq.flushed) {
2774 		dev_dbg(&cq->hwq.pdev->dev,
2775 			"%s: QP in Flush QP = %p\n", __func__, qp);
2776 		return 0;
2777 	}
2778 	cqe = *pcqe;
2779 	cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
2780 	cqe->flags = le16_to_cpu(hwcqe->flags);
2781 	cqe->qp_handle = (u64)(unsigned long)qp;
2782 
2783 	wr_id_idx =
2784 		le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id)
2785 				& CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK;
2786 	cqe->src_qp = qp->id;
2787 	if (qp->id == 1 && !cqe->length) {
2788 		/* Add workaround for the length misdetection */
2789 		cqe->length = 296;
2790 	} else {
2791 		cqe->length = le16_to_cpu(hwcqe->length);
2792 	}
2793 	cqe->pkey_index = qp->pkey_index;
2794 	memcpy(cqe->smac, qp->smac, 6);
2795 
2796 	cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags);
2797 	cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2);
2798 	cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata);
2799 
2800 	if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) {
2801 		srq = qp->srq;
2802 		if (!srq) {
2803 			dev_err(&cq->hwq.pdev->dev,
2804 				"FP: SRQ used but not defined??\n");
2805 			return -EINVAL;
2806 		}
2807 		if (wr_id_idx >= srq->hwq.max_elements) {
2808 			dev_err(&cq->hwq.pdev->dev,
2809 				"FP: CQ Process Raw/QP1 wr_id idx 0x%x exceeded SRQ max 0x%x\n",
2810 				wr_id_idx, srq->hwq.max_elements);
2811 			return -EINVAL;
2812 		}
2813 		cqe->wr_id = srq->swq[wr_id_idx].wr_id;
2814 		bnxt_qplib_release_srqe(srq, wr_id_idx);
2815 		cqe++;
2816 		(*budget)--;
2817 		*pcqe = cqe;
2818 	} else {
2819 		struct bnxt_qplib_swq *swq;
2820 
2821 		rq = &qp->rq;
2822 		if (wr_id_idx > (rq->max_wqe - 1)) {
2823 			dev_err(&cq->hwq.pdev->dev,
2824 				"FP: CQ Process Raw/QP1 RQ wr_id idx 0x%x exceeded RQ max 0x%x\n",
2825 				wr_id_idx, rq->max_wqe);
2826 			return -EINVAL;
2827 		}
2828 		if (rq->swq_last != wr_id_idx)
2829 			return -EINVAL;
2830 		swq = &rq->swq[rq->swq_last];
2831 		cqe->wr_id = swq->wr_id;
2832 		cqe++;
2833 		(*budget)--;
2834 		bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons,
2835 					 swq->slots, &rq->dbinfo.flags);
2836 		rq->swq_last = swq->next_idx;
2837 		*pcqe = cqe;
2838 
2839 		if (hwcqe->status != CQ_RES_RC_STATUS_OK) {
2840 			qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2841 			/* Add qp to flush list of the CQ */
2842 			bnxt_qplib_add_flush_qp(qp);
2843 		}
2844 	}
2845 
2846 	return 0;
2847 }
2848 
bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq * cq,struct cq_terminal * hwcqe,struct bnxt_qplib_cqe ** pcqe,int * budget)2849 static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq,
2850 					  struct cq_terminal *hwcqe,
2851 					  struct bnxt_qplib_cqe **pcqe,
2852 					  int *budget)
2853 {
2854 	struct bnxt_qplib_qp *qp;
2855 	struct bnxt_qplib_q *sq, *rq;
2856 	struct bnxt_qplib_cqe *cqe;
2857 	u32 swq_last = 0, cqe_cons;
2858 	int rc = 0;
2859 
2860 	/* Check the Status */
2861 	if (hwcqe->status != CQ_TERMINAL_STATUS_OK)
2862 		dev_warn(&cq->hwq.pdev->dev,
2863 			 "FP: CQ Process Terminal Error status = 0x%x\n",
2864 			 hwcqe->status);
2865 
2866 	qp = (struct bnxt_qplib_qp *)((unsigned long)
2867 				      le64_to_cpu(hwcqe->qp_handle));
2868 	if (!qp)
2869 		return -EINVAL;
2870 
2871 	/* Must block new posting of SQ and RQ */
2872 	qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR;
2873 
2874 	sq = &qp->sq;
2875 	rq = &qp->rq;
2876 
2877 	cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx);
2878 	if (cqe_cons == 0xFFFF)
2879 		goto do_rq;
2880 	cqe_cons %= sq->max_wqe;
2881 
2882 	if (qp->sq.flushed) {
2883 		dev_dbg(&cq->hwq.pdev->dev,
2884 			"%s: QP in Flush QP = %p\n", __func__, qp);
2885 		goto sq_done;
2886 	}
2887 
2888 	/* Terminal CQE can also include aggregated successful CQEs prior.
2889 	 * So we must complete all CQEs from the current sq's cons to the
2890 	 * cq_cons with status OK
2891 	 */
2892 	cqe = *pcqe;
2893 	while (*budget) {
2894 		swq_last = sq->swq_last;
2895 		if (swq_last == cqe_cons)
2896 			break;
2897 		if (sq->swq[swq_last].flags & SQ_SEND_FLAGS_SIGNAL_COMP) {
2898 			memset(cqe, 0, sizeof(*cqe));
2899 			cqe->status = CQ_REQ_STATUS_OK;
2900 			cqe->opcode = CQ_BASE_CQE_TYPE_REQ;
2901 			cqe->qp_handle = (u64)(unsigned long)qp;
2902 			cqe->src_qp = qp->id;
2903 			cqe->wr_id = sq->swq[swq_last].wr_id;
2904 			cqe->type = sq->swq[swq_last].type;
2905 			cqe++;
2906 			(*budget)--;
2907 		}
2908 		bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons,
2909 					 sq->swq[swq_last].slots, &sq->dbinfo.flags);
2910 		sq->swq_last = sq->swq[swq_last].next_idx;
2911 	}
2912 	*pcqe = cqe;
2913 	if (!(*budget) && swq_last != cqe_cons) {
2914 		/* Out of budget */
2915 		rc = -EAGAIN;
2916 		goto sq_done;
2917 	}
2918 sq_done:
2919 	if (rc)
2920 		return rc;
2921 do_rq:
2922 	cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx);
2923 	if (cqe_cons == 0xFFFF) {
2924 		goto done;
2925 	} else if (cqe_cons > rq->max_wqe - 1) {
2926 		dev_err(&cq->hwq.pdev->dev,
2927 			"FP: CQ Processed terminal reported rq_cons_idx 0x%x exceeds max 0x%x\n",
2928 			cqe_cons, rq->max_wqe);
2929 		rc = -EINVAL;
2930 		goto done;
2931 	}
2932 
2933 	if (qp->rq.flushed) {
2934 		dev_dbg(&cq->hwq.pdev->dev,
2935 			"%s: QP in Flush QP = %p\n", __func__, qp);
2936 		rc = 0;
2937 		goto done;
2938 	}
2939 
2940 	/* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR
2941 	 * from the current rq->cons to the rq->prod regardless what the
2942 	 * rq->cons the terminal CQE indicates
2943 	 */
2944 
2945 	/* Add qp to flush list of the CQ */
2946 	bnxt_qplib_add_flush_qp(qp);
2947 done:
2948 	return rc;
2949 }
2950 
bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq * cq,struct cq_cutoff * hwcqe)2951 static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq,
2952 					struct cq_cutoff *hwcqe)
2953 {
2954 	/* Check the Status */
2955 	if (hwcqe->status != CQ_CUTOFF_STATUS_OK) {
2956 		dev_err(&cq->hwq.pdev->dev,
2957 			"FP: CQ Process Cutoff Error status = 0x%x\n",
2958 			hwcqe->status);
2959 		return -EINVAL;
2960 	}
2961 	clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags);
2962 	wake_up_interruptible(&cq->waitq);
2963 
2964 	return 0;
2965 }
2966 
bnxt_qplib_process_flush_list(struct bnxt_qplib_cq * cq,struct bnxt_qplib_cqe * cqe,int num_cqes)2967 int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq,
2968 				  struct bnxt_qplib_cqe *cqe,
2969 				  int num_cqes)
2970 {
2971 	struct bnxt_qplib_qp *qp = NULL;
2972 	u32 budget = num_cqes;
2973 	unsigned long flags;
2974 
2975 	spin_lock_irqsave(&cq->flush_lock, flags);
2976 	list_for_each_entry(qp, &cq->sqf_head, sq_flush) {
2977 		dev_dbg(&cq->hwq.pdev->dev, "FP: Flushing SQ QP= %p\n", qp);
2978 		__flush_sq(&qp->sq, qp, &cqe, &budget);
2979 	}
2980 
2981 	list_for_each_entry(qp, &cq->rqf_head, rq_flush) {
2982 		dev_dbg(&cq->hwq.pdev->dev, "FP: Flushing RQ QP= %p\n", qp);
2983 		__flush_rq(&qp->rq, qp, &cqe, &budget);
2984 	}
2985 	spin_unlock_irqrestore(&cq->flush_lock, flags);
2986 
2987 	return num_cqes - budget;
2988 }
2989 
bnxt_qplib_poll_cq(struct bnxt_qplib_cq * cq,struct bnxt_qplib_cqe * cqe,int num_cqes,struct bnxt_qplib_qp ** lib_qp)2990 int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe,
2991 		       int num_cqes, struct bnxt_qplib_qp **lib_qp)
2992 {
2993 	struct cq_base *hw_cqe;
2994 	int budget, rc = 0;
2995 	u32 hw_polled = 0;
2996 	u8 type;
2997 
2998 	budget = num_cqes;
2999 
3000 	while (budget) {
3001 		hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL);
3002 
3003 		/* Check for Valid bit */
3004 		if (!CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags))
3005 			break;
3006 
3007 		/*
3008 		 * The valid test of the entry must be done first before
3009 		 * reading any further.
3010 		 */
3011 		dma_rmb();
3012 		/* From the device's respective CQE format to qplib_wc*/
3013 		type = hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK;
3014 		switch (type) {
3015 		case CQ_BASE_CQE_TYPE_REQ:
3016 			rc = bnxt_qplib_cq_process_req(cq,
3017 						       (struct cq_req *)hw_cqe,
3018 						       &cqe, &budget,
3019 						       cq->hwq.cons, lib_qp);
3020 			break;
3021 		case CQ_BASE_CQE_TYPE_RES_RC:
3022 			rc = bnxt_qplib_cq_process_res_rc(cq,
3023 							  (struct cq_res_rc *)
3024 							  hw_cqe, &cqe,
3025 							  &budget);
3026 			break;
3027 		case CQ_BASE_CQE_TYPE_RES_UD:
3028 			rc = bnxt_qplib_cq_process_res_ud
3029 					(cq, (struct cq_res_ud *)hw_cqe, &cqe,
3030 					 &budget);
3031 			break;
3032 		case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1:
3033 			rc = bnxt_qplib_cq_process_res_raweth_qp1
3034 					(cq, (struct cq_res_raweth_qp1 *)
3035 					 hw_cqe, &cqe, &budget);
3036 			break;
3037 		case CQ_BASE_CQE_TYPE_TERMINAL:
3038 			rc = bnxt_qplib_cq_process_terminal
3039 					(cq, (struct cq_terminal *)hw_cqe,
3040 					 &cqe, &budget);
3041 			break;
3042 		case CQ_BASE_CQE_TYPE_CUT_OFF:
3043 			bnxt_qplib_cq_process_cutoff
3044 					(cq, (struct cq_cutoff *)hw_cqe);
3045 			/* Done processing this CQ */
3046 			goto exit;
3047 		default:
3048 			dev_err(&cq->hwq.pdev->dev,
3049 				"process_cq unknown type 0x%lx\n",
3050 				hw_cqe->cqe_type_toggle &
3051 				CQ_BASE_CQE_TYPE_MASK);
3052 			rc = -EINVAL;
3053 			break;
3054 		}
3055 		if (rc < 0) {
3056 			if (rc == -EAGAIN)
3057 				break;
3058 			/* Error while processing the CQE, just skip to the
3059 			 * next one
3060 			 */
3061 			if (type != CQ_BASE_CQE_TYPE_TERMINAL)
3062 				dev_err(&cq->hwq.pdev->dev,
3063 					"process_cqe error rc = 0x%x\n", rc);
3064 		}
3065 		hw_polled++;
3066 		bnxt_qplib_hwq_incr_cons(cq->hwq.max_elements, &cq->hwq.cons,
3067 					 1, &cq->dbinfo.flags);
3068 
3069 	}
3070 	if (hw_polled)
3071 		bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ);
3072 exit:
3073 	return num_cqes - budget;
3074 }
3075 
bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq * cq,u32 arm_type)3076 void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type)
3077 {
3078 	if (arm_type)
3079 		bnxt_qplib_ring_db(&cq->dbinfo, arm_type);
3080 	/* Using cq->arm_state variable to track whether to issue cq handler */
3081 	atomic_set(&cq->arm_state, 1);
3082 }
3083 
bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp * qp)3084 void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp)
3085 {
3086 	flush_workqueue(qp->scq->nq->cqn_wq);
3087 	if (qp->scq != qp->rcq)
3088 		flush_workqueue(qp->rcq->nq->cqn_wq);
3089 }
3090