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Searched defs:ctrl_reg (Results 1 – 25 of 69) sorted by relevance

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/drivers/pci/hotplug/
Dcpqphp.h108 struct ctrl_reg { /* offset */ struct
109 u8 slot_RST; /* 0x00 */
110 u8 slot_enable; /* 0x01 */
111 u16 misc; /* 0x02 */
112 u32 led_control; /* 0x04 */
113 u32 int_input_clear; /* 0x08 */
114 u32 int_mask; /* 0x0a */
115 u8 reserved0; /* 0x10 */
116 u8 reserved1; /* 0x11 */
140 SLOT_RST = offsetof(struct ctrl_reg, slot_RST), argument
Dshpchp.h177 struct ctrl_reg { struct
195 BASE_OFFSET = offsetof(struct ctrl_reg, base_offset), argument
/drivers/net/wireless/st/cw1200/
Dbh.c173 u16 *ctrl_reg) in cw1200_bh_read_ctrl_reg()
191 u16 ctrl_reg; in cw1200_device_wakeup() local
233 uint16_t *ctrl_reg, in cw1200_bh_rx_helper()
413 u16 ctrl_reg = 0; in cw1200_bh() local
/drivers/clk/microchip/
Dclk-core.h21 const u32 ctrl_reg; member
38 const u32 ctrl_reg; member
45 const u32 ctrl_reg; member
Dclk-core.c91 void __iomem *ctrl_reg; member
240 void __iomem *ctrl_reg; member
582 void __iomem *ctrl_reg; member
/drivers/spi/
Dspi-jcore.c44 static int jcore_spi_wait(void __iomem *ctrl_reg) in jcore_spi_wait()
59 void __iomem *ctrl_reg = hw->base + CTRL_REG; in jcore_spi_program() local
102 void __iomem *ctrl_reg = hw->base + CTRL_REG; in jcore_spi_txrx() local
Dspi-cadence.c155 u32 ctrl_reg = 0; in cdns_spi_init_hw() local
183 u32 ctrl_reg; in cdns_spi_chipselect() local
214 u32 ctrl_reg, new_ctrl_reg; in cdns_spi_config_clock_mode() local
257 u32 ctrl_reg, baud_rate_val; in cdns_spi_config_clock_freq() local
491 u32 ctrl_reg; in cdns_unprepare_transfer_hardware() local
/drivers/watchdog/
Dmachzwd.c188 unsigned int ctrl_reg = 0; in zf_timer_off() local
211 unsigned int ctrl_reg = 0; in zf_timer_on() local
238 unsigned int ctrl_reg = 0; in zf_ping() local
Dmeson_gxbb_wdt.c166 u32 ctrl_reg; in meson_gxbb_wdt_probe() local
/drivers/clocksource/
Dtimer-cadence-ttc.c113 u32 ctrl_reg; in ttc_set_interval() local
197 u32 ctrl_reg; in ttc_shutdown() local
219 u32 ctrl_reg; in ttc_resume() local
Dtimer-rockchip.c133 u32 ctrl_reg = TIMER_CONTROL_REG3288; in rk_timer_probe() local
/drivers/misc/ibmasm/
Dlowlevel.h53 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; in ibmasm_enable_interrupts() local
59 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; in ibmasm_disable_interrupts() local
/drivers/clk/hisilicon/
Dclk-hix5hd2.c136 u32 ctrl_reg; member
148 void __iomem *ctrl_reg; member
/drivers/phy/marvell/
Dphy-berlin-sata.c66 static inline void phy_berlin_sata_reg_setbits(void __iomem *ctrl_reg, in phy_berlin_sata_reg_setbits()
85 void __iomem *ctrl_reg = priv->base + 0x60 + (desc->index * 0x80); in phy_berlin_sata_power_on() local
/drivers/i2c/busses/
Di2c-cadence.c212 u32 ctrl_reg; member
570 unsigned int ctrl_reg; in cdns_i2c_mrecv() local
669 unsigned int ctrl_reg; in cdns_i2c_msend() local
1080 unsigned int ctrl_reg; in cdns_i2c_setclk() local
/drivers/net/wireless/silabs/wfx/
Dbh.h22 atomic_t ctrl_reg; member
Dbh.c137 int ctrl_reg, piggyback; in bh_work_rx() local
/drivers/tty/serial/
Dxilinx_uartps.c482 u32 ctrl_reg; in cdns_uart_clk_notifier_cb() local
684 unsigned int ctrl_reg, mode_reg; in cdns_uart_set_termios() local
1134 unsigned int ctrl_reg; in cdns_uart_console_putchar() local
1358 u32 ctrl_reg; in cdns_uart_resume() local
/drivers/regulator/
Dvctrl-regulator.c323 struct regulator *ctrl_reg) in vctrl_init_vtable()
450 struct regulator *ctrl_reg; in vctrl_probe() local
Dwm831x-ldo.c83 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; in wm831x_gp_ldo_get_mode() local
109 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; in wm831x_gp_ldo_set_mode() local
/drivers/scsi/
Dzorro_esp.c102 #define ctrl_reg cond_reg /* DMA control (wo) [0x402] */ macro
115 #define ctrl_reg cond_reg /* DMA control (wo) [0x000] */ macro
130 #define ctrl_reg cond_reg /* DMA control (wo) [0x0000] */ macro
/drivers/net/wireless/realtek/rtw88/
Dsec.c127 u16 ctrl_reg; in rtw_sec_enable_sec_engine() local
/drivers/gpu/drm/bridge/imx/
Dimx-ldb-helper.h61 unsigned int ctrl_reg; member
/drivers/fpga/
Dsocfpga.c337 u32 ctrl_reg; in socfpga_fpga_cfg_mode_set() local
361 u32 ctrl_reg, status; in socfpga_fpga_reset() local
/drivers/net/ethernet/xilinx/
Dxilinx_emaclite.c723 u32 ctrl_reg; in xemaclite_mdio_read() local
768 u32 ctrl_reg; in xemaclite_mdio_write() local

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