| /drivers/gpu/drm/amd/pm/swsmu/ |
| D | smu_cmn.c | 589 uint64_t *feature_mask) in smu_cmn_get_enabled_mask()
645 uint64_t feature_mask, in smu_cmn_feature_update_enable_state()
712 uint64_t feature_mask; in smu_cmn_get_pp_feature_mask() local
757 uint64_t feature_mask; in smu_cmn_set_pp_feature_mask() local
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| D | smu_internal.h | 75 #define smu_get_allowed_feature_mask(smu, feature_mask, num) smu_ppt_funcs(get_allowed_feature_mas… argument
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| /drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| D | vega12_smumgr.c | 126 bool enable, uint64_t feature_mask) in vega12_enable_smc_features()
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| D | vega10_smumgr.c | 112 bool enable, uint32_t feature_mask) in vega10_enable_smc_features()
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| D | vega20_smumgr.c | 318 bool enable, uint64_t feature_mask) in vega20_enable_smc_features()
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| /drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | arcturus_ppt.c | 316 uint32_t *feature_mask, uint32_t num) in arcturus_get_allowed_feature_mask()
949 uint32_t feature_mask, in arcturus_upload_dpm_level()
2302 uint32_t feature_mask; member
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| D | cyan_skillfish_ppt.c | 566 uint64_t *feature_mask) in cyan_skillfish_get_enabled_mask()
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| D | smu_v11_0.c | 751 uint32_t feature_mask[2]; in smu_v11_0_set_allowed_mask() local
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| D | navi10_ppt.c | 279 uint32_t *feature_mask, uint32_t num) in navi10_get_allowed_feature_mask()
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| D | sienna_cichlid_ppt.c | 276 uint32_t *feature_mask, uint32_t num) in sienna_cichlid_get_allowed_feature_mask()
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| /drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| D | aldebaran_ppt.c | 298 uint32_t *feature_mask, uint32_t num) in aldebaran_get_allowed_feature_mask()
938 uint32_t feature_mask, in aldebaran_upload_dpm_level()
1668 uint32_t feature_mask; member
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| D | smu_v13_0_6_ppt.c | 287 uint32_t *feature_mask, in smu_v13_0_6_get_allowed_feature_mask()
1007 uint32_t feature_mask, uint32_t level) in smu_v13_0_6_upload_dpm_level()
1645 uint64_t *feature_mask) in smu_v13_0_6_get_enabled_mask()
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| D | smu_v13_0_7_ppt.c | 258 uint32_t *feature_mask, uint32_t num) in smu_v13_0_7_get_allowed_feature_mask()
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| D | smu_v13_0_0_ppt.c | 289 uint32_t *feature_mask, uint32_t num) in smu_v13_0_0_get_allowed_feature_mask()
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| D | smu_v13_0.c | 781 uint32_t feature_mask[2]; in smu_v13_0_set_allowed_mask() local
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| /drivers/thermal/intel/int340x_thermal/ |
| D | processor_thermal_device.c | 319 kernel_ulong_t feature_mask) in proc_thermal_mmio_add()
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| /drivers/pci/msi/ |
| D | irqdomain.c | 324 bool pci_msi_domain_supports(struct pci_dev *pdev, unsigned int feature_mask, in pci_msi_domain_supports()
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| /drivers/infiniband/hw/efa/ |
| D | efa_com_cmd.c | 365 u32 feature_mask = 1 << feature_id; in efa_com_check_supported_feature_id() local
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| /drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| D | renoir_ppt.c | 1414 uint64_t *feature_mask) in renoir_get_enabled_mask()
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| /drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | vega20_hwmgr.c | 1809 static int vega20_upload_dpm_min_level(struct pp_hwmgr *hwmgr, uint32_t feature_mask) in vega20_upload_dpm_min_level()
1910 static int vega20_upload_dpm_max_level(struct pp_hwmgr *hwmgr, uint32_t feature_mask) in vega20_upload_dpm_max_level()
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| D | vega10_hwmgr.c | 2892 uint32_t i, feature_mask = 0; in vega10_stop_dpm() local
2931 uint32_t i, feature_mask = 0; in vega10_start_dpm() local
5672 uint32_t feature_mask = 0; in vega10_disable_power_features_for_compute_performance() local
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| /drivers/net/ |
| D | tap.c | 956 netdev_features_t feature_mask = 0; in set_offload() local
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| /drivers/net/ethernet/qlogic/qed/ |
| D | qed_vf.c | 622 u16 feature_mask, u8 tunn_mode, in __qed_vf_update_tunn_param()
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| /drivers/net/ethernet/amazon/ena/ |
| D | ena_com.c | 967 u32 feature_mask = 1 << feature_id; in ena_com_check_supported_feature_id() local
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| /drivers/staging/media/meson/vdec/ |
| D | codec_vp9.c | 393 unsigned int feature_mask[MAX_SEGMENTS]; member
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