Searched defs:i1 (Results 1 – 10 of 10) sorted by relevance
360 static inline uint32_t REG_MDP4_OVLP_STAGE(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset… in REG_MDP4_OVLP_STAGE()362 static inline uint32_t REG_MDP4_OVLP_STAGE_OP(uint32_t i0, uint32_t i1) { return 0x00000000 + __off… in REG_MDP4_OVLP_STAGE_OP()382 static inline uint32_t REG_MDP4_OVLP_STAGE_FG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000004 +… in REG_MDP4_OVLP_STAGE_FG_ALPHA()384 static inline uint32_t REG_MDP4_OVLP_STAGE_BG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000008 +… in REG_MDP4_OVLP_STAGE_BG_ALPHA()386 static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000000… in REG_MDP4_OVLP_STAGE_TRANSP_LOW0()388 static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x0000001… in REG_MDP4_OVLP_STAGE_TRANSP_LOW1()390 static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x000000… in REG_MDP4_OVLP_STAGE_TRANSP_HIGH0()392 static inline uint32_t REG_MDP4_OVLP_STAGE_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x000000… in REG_MDP4_OVLP_STAGE_TRANSP_HIGH1()404 static inline uint32_t REG_MDP4_OVLP_STAGE_CO3(uint32_t i0, uint32_t i1) { return 0x00000000 + __of… in REG_MDP4_OVLP_STAGE_CO3()406 static inline uint32_t REG_MDP4_OVLP_STAGE_CO3_SEL(uint32_t i0, uint32_t i1) { return 0x00000000 + … in REG_MDP4_OVLP_STAGE_CO3_SEL()[all …]
332 static inline uint32_t REG_MDP5_IGC_LUT(enum mdp5_igc_type i0, uint32_t i1) { return 0x00000000 + _… in REG_MDP5_IGC_LUT()334 static inline uint32_t REG_MDP5_IGC_LUT_REG(enum mdp5_igc_type i0, uint32_t i1) { return 0x00000000… in REG_MDP5_IGC_LUT_REG()385 static inline uint32_t REG_MDP5_CTL_LAYER(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_… in REG_MDP5_CTL_LAYER()387 static inline uint32_t REG_MDP5_CTL_LAYER_REG(uint32_t i0, uint32_t i1) { return 0x00000000 + __off… in REG_MDP5_CTL_LAYER_REG()520 static inline uint32_t REG_MDP5_CTL_LAYER_EXT(uint32_t i0, uint32_t i1) { return 0x00000000 + __off… in REG_MDP5_CTL_LAYER_EXT()522 static inline uint32_t REG_MDP5_CTL_LAYER_EXT_REG(uint32_t i0, uint32_t i1) { return 0x00000000 + _… in REG_MDP5_CTL_LAYER_EXT_REG()652 static inline uint32_t REG_MDP5_PIPE_CSC_1_PRE_CLAMP(enum mdp5_pipe i0, uint32_t i1) { return 0x000… in REG_MDP5_PIPE_CSC_1_PRE_CLAMP()654 static inline uint32_t REG_MDP5_PIPE_CSC_1_PRE_CLAMP_REG(enum mdp5_pipe i0, uint32_t i1) { return 0… in REG_MDP5_PIPE_CSC_1_PRE_CLAMP_REG()668 static inline uint32_t REG_MDP5_PIPE_CSC_1_POST_CLAMP(enum mdp5_pipe i0, uint32_t i1) { return 0x00… in REG_MDP5_PIPE_CSC_1_POST_CLAMP()670 static inline uint32_t REG_MDP5_PIPE_CSC_1_POST_CLAMP_REG(enum mdp5_pipe i0, uint32_t i1) { return … in REG_MDP5_PIPE_CSC_1_POST_CLAMP_REG()[all …]
22 static inline void _transp(u32 d[], unsigned int i1, unsigned int i2, in _transp()
54 int cn_cb_equal(const struct cb_id *i1, const struct cb_id *i2) in cn_cb_equal()
312 int i1, i2, c, sample; in l1oip_4bit_alloc() local
377 int memb = 0, i, ii, i1, i2; in dsp_cmx_hardware() local
831 int i, i1, i2, i3; in diffuser_a_decrypt() local862 int i, i1, i2, i3; in diffuser_a_encrypt() local893 int i, i1, i2, i3; in diffuser_b_decrypt() local924 int i, i1, i2, i3; in diffuser_b_encrypt() local
230 u64 i1 : 1; member
91 #define PUSH_DATA_(X,p,m,i0,i1,d,s,f,a...) PUSH_DATA__((p), (d), "-> "#m f, ##a) argument
336 ASC_SCSIQ_1 i1; member