1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11 #ifndef __PHY_H
12 #define __PHY_H
13
14 #include <linux/compiler.h>
15 #include <linux/spinlock.h>
16 #include <linux/ethtool.h>
17 #include <linux/leds.h>
18 #include <linux/linkmode.h>
19 #include <linux/netlink.h>
20 #include <linux/mdio.h>
21 #include <linux/mii.h>
22 #include <linux/mii_timestamper.h>
23 #include <linux/module.h>
24 #include <linux/timer.h>
25 #include <linux/workqueue.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/u64_stats_sync.h>
28 #include <linux/irqreturn.h>
29 #include <linux/iopoll.h>
30 #include <linux/refcount.h>
31 #include <linux/android_kabi.h>
32
33 #include <linux/atomic.h>
34
35 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
36 SUPPORTED_TP | \
37 SUPPORTED_MII)
38
39 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
40 SUPPORTED_10baseT_Full)
41
42 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
43 SUPPORTED_100baseT_Full)
44
45 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
46 SUPPORTED_1000baseT_Full)
47
48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init;
51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
57 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;
58
59 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
60 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
61 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features)
62 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
63 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
64 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
65 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
66 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
67 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
68 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features)
69
70 extern const int phy_basic_ports_array[3];
71 extern const int phy_fibre_port_array[1];
72 extern const int phy_all_ports_features_array[7];
73 extern const int phy_10_100_features_array[4];
74 extern const int phy_basic_t1_features_array[3];
75 extern const int phy_basic_t1s_p2mp_features_array[2];
76 extern const int phy_gbit_features_array[2];
77 extern const int phy_10gbit_features_array[1];
78
79 /*
80 * Set phydev->irq to PHY_POLL if interrupts are not supported,
81 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
82 * the attached MAC driver handles the interrupt
83 */
84 #define PHY_POLL -1
85 #define PHY_MAC_INTERRUPT -2
86
87 #define PHY_IS_INTERNAL 0x00000001
88 #define PHY_RST_AFTER_CLK_EN 0x00000002
89 #define PHY_POLL_CABLE_TEST 0x00000004
90 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008
91 #define MDIO_DEVICE_IS_PHY 0x80000000
92
93 /**
94 * enum phy_interface_t - Interface Mode definitions
95 *
96 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
97 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
98 * @PHY_INTERFACE_MODE_MII: Media-independent interface
99 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
100 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
101 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
102 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
103 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
104 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
105 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
106 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
107 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
108 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
109 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
110 * @PHY_INTERFACE_MODE_SMII: Serial MII
111 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
112 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
113 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
114 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII
115 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
116 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
117 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
118 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
119 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
120 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
121 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
122 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
123 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
124 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
125 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
126 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
127 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
128 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
129 * @PHY_INTERFACE_MODE_MAX: Book keeping
130 *
131 * Describes the interface between the MAC and PHY.
132 */
133 typedef enum {
134 PHY_INTERFACE_MODE_NA,
135 PHY_INTERFACE_MODE_INTERNAL,
136 PHY_INTERFACE_MODE_MII,
137 PHY_INTERFACE_MODE_GMII,
138 PHY_INTERFACE_MODE_SGMII,
139 PHY_INTERFACE_MODE_TBI,
140 PHY_INTERFACE_MODE_REVMII,
141 PHY_INTERFACE_MODE_RMII,
142 PHY_INTERFACE_MODE_REVRMII,
143 PHY_INTERFACE_MODE_RGMII,
144 PHY_INTERFACE_MODE_RGMII_ID,
145 PHY_INTERFACE_MODE_RGMII_RXID,
146 PHY_INTERFACE_MODE_RGMII_TXID,
147 PHY_INTERFACE_MODE_RTBI,
148 PHY_INTERFACE_MODE_SMII,
149 PHY_INTERFACE_MODE_XGMII,
150 PHY_INTERFACE_MODE_XLGMII,
151 PHY_INTERFACE_MODE_MOCA,
152 PHY_INTERFACE_MODE_PSGMII,
153 PHY_INTERFACE_MODE_QSGMII,
154 PHY_INTERFACE_MODE_TRGMII,
155 PHY_INTERFACE_MODE_100BASEX,
156 PHY_INTERFACE_MODE_1000BASEX,
157 PHY_INTERFACE_MODE_2500BASEX,
158 PHY_INTERFACE_MODE_5GBASER,
159 PHY_INTERFACE_MODE_RXAUI,
160 PHY_INTERFACE_MODE_XAUI,
161 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
162 PHY_INTERFACE_MODE_10GBASER,
163 PHY_INTERFACE_MODE_25GBASER,
164 PHY_INTERFACE_MODE_USXGMII,
165 /* 10GBASE-KR - with Clause 73 AN */
166 PHY_INTERFACE_MODE_10GKR,
167 PHY_INTERFACE_MODE_QUSGMII,
168 PHY_INTERFACE_MODE_1000BASEKX,
169 PHY_INTERFACE_MODE_MAX,
170 } phy_interface_t;
171
172 /* PHY interface mode bitmap handling */
173 #define DECLARE_PHY_INTERFACE_MASK(name) \
174 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
175
phy_interface_zero(unsigned long * intf)176 static inline void phy_interface_zero(unsigned long *intf)
177 {
178 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
179 }
180
phy_interface_empty(const unsigned long * intf)181 static inline bool phy_interface_empty(const unsigned long *intf)
182 {
183 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
184 }
185
phy_interface_and(unsigned long * dst,const unsigned long * a,const unsigned long * b)186 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
187 const unsigned long *b)
188 {
189 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
190 }
191
phy_interface_or(unsigned long * dst,const unsigned long * a,const unsigned long * b)192 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
193 const unsigned long *b)
194 {
195 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
196 }
197
phy_interface_set_rgmii(unsigned long * intf)198 static inline void phy_interface_set_rgmii(unsigned long *intf)
199 {
200 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
201 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
202 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
203 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
204 }
205
206 /*
207 * phy_supported_speeds - return all speeds currently supported by a PHY device
208 */
209 unsigned int phy_supported_speeds(struct phy_device *phy,
210 unsigned int *speeds,
211 unsigned int size);
212
213 /**
214 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
215 * @interface: enum phy_interface_t value
216 *
217 * Description: maps enum &phy_interface_t defined in this file
218 * into the device tree binding of 'phy-mode', so that Ethernet
219 * device driver can get PHY interface from device tree.
220 */
phy_modes(phy_interface_t interface)221 static inline const char *phy_modes(phy_interface_t interface)
222 {
223 switch (interface) {
224 case PHY_INTERFACE_MODE_NA:
225 return "";
226 case PHY_INTERFACE_MODE_INTERNAL:
227 return "internal";
228 case PHY_INTERFACE_MODE_MII:
229 return "mii";
230 case PHY_INTERFACE_MODE_GMII:
231 return "gmii";
232 case PHY_INTERFACE_MODE_SGMII:
233 return "sgmii";
234 case PHY_INTERFACE_MODE_TBI:
235 return "tbi";
236 case PHY_INTERFACE_MODE_REVMII:
237 return "rev-mii";
238 case PHY_INTERFACE_MODE_RMII:
239 return "rmii";
240 case PHY_INTERFACE_MODE_REVRMII:
241 return "rev-rmii";
242 case PHY_INTERFACE_MODE_RGMII:
243 return "rgmii";
244 case PHY_INTERFACE_MODE_RGMII_ID:
245 return "rgmii-id";
246 case PHY_INTERFACE_MODE_RGMII_RXID:
247 return "rgmii-rxid";
248 case PHY_INTERFACE_MODE_RGMII_TXID:
249 return "rgmii-txid";
250 case PHY_INTERFACE_MODE_RTBI:
251 return "rtbi";
252 case PHY_INTERFACE_MODE_SMII:
253 return "smii";
254 case PHY_INTERFACE_MODE_XGMII:
255 return "xgmii";
256 case PHY_INTERFACE_MODE_XLGMII:
257 return "xlgmii";
258 case PHY_INTERFACE_MODE_MOCA:
259 return "moca";
260 case PHY_INTERFACE_MODE_PSGMII:
261 return "psgmii";
262 case PHY_INTERFACE_MODE_QSGMII:
263 return "qsgmii";
264 case PHY_INTERFACE_MODE_TRGMII:
265 return "trgmii";
266 case PHY_INTERFACE_MODE_1000BASEX:
267 return "1000base-x";
268 case PHY_INTERFACE_MODE_1000BASEKX:
269 return "1000base-kx";
270 case PHY_INTERFACE_MODE_2500BASEX:
271 return "2500base-x";
272 case PHY_INTERFACE_MODE_5GBASER:
273 return "5gbase-r";
274 case PHY_INTERFACE_MODE_RXAUI:
275 return "rxaui";
276 case PHY_INTERFACE_MODE_XAUI:
277 return "xaui";
278 case PHY_INTERFACE_MODE_10GBASER:
279 return "10gbase-r";
280 case PHY_INTERFACE_MODE_25GBASER:
281 return "25gbase-r";
282 case PHY_INTERFACE_MODE_USXGMII:
283 return "usxgmii";
284 case PHY_INTERFACE_MODE_10GKR:
285 return "10gbase-kr";
286 case PHY_INTERFACE_MODE_100BASEX:
287 return "100base-x";
288 case PHY_INTERFACE_MODE_QUSGMII:
289 return "qusgmii";
290 default:
291 return "unknown";
292 }
293 }
294
295 #define PHY_INIT_TIMEOUT 100000
296 #define PHY_FORCE_TIMEOUT 10
297
298 #define PHY_MAX_ADDR 32
299
300 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
301 #define PHY_ID_FMT "%s:%02x"
302
303 #define MII_BUS_ID_SIZE 61
304
305 struct device;
306 struct kernel_hwtstamp_config;
307 struct phylink;
308 struct sfp_bus;
309 struct sfp_upstream_ops;
310 struct sk_buff;
311
312 /**
313 * struct mdio_bus_stats - Statistics counters for MDIO busses
314 * @transfers: Total number of transfers, i.e. @writes + @reads
315 * @errors: Number of MDIO transfers that returned an error
316 * @writes: Number of write transfers
317 * @reads: Number of read transfers
318 * @syncp: Synchronisation for incrementing statistics
319 */
320 struct mdio_bus_stats {
321 u64_stats_t transfers;
322 u64_stats_t errors;
323 u64_stats_t writes;
324 u64_stats_t reads;
325 /* Must be last, add new statistics above */
326 struct u64_stats_sync syncp;
327 };
328
329 /**
330 * struct phy_package_shared - Shared information in PHY packages
331 * @addr: Common PHY address used to combine PHYs in one package
332 * @refcnt: Number of PHYs connected to this shared data
333 * @flags: Initialization of PHY package
334 * @priv_size: Size of the shared private data @priv
335 * @priv: Driver private data shared across a PHY package
336 *
337 * Represents a shared structure between different phydev's in the same
338 * package, for example a quad PHY. See phy_package_join() and
339 * phy_package_leave().
340 */
341 struct phy_package_shared {
342 int addr;
343 refcount_t refcnt;
344 unsigned long flags;
345 size_t priv_size;
346
347 /* private data pointer */
348 /* note that this pointer is shared between different phydevs and
349 * the user has to take care of appropriate locking. It is allocated
350 * and freed automatically by phy_package_join() and
351 * phy_package_leave().
352 */
353 void *priv;
354 };
355
356 /* used as bit number in atomic bitops */
357 #define PHY_SHARED_F_INIT_DONE 0
358 #define PHY_SHARED_F_PROBE_DONE 1
359
360 /**
361 * struct mii_bus - Represents an MDIO bus
362 *
363 * @owner: Who owns this device
364 * @name: User friendly name for this MDIO device, or driver name
365 * @id: Unique identifier for this bus, typical from bus hierarchy
366 * @priv: Driver private data
367 *
368 * The Bus class for PHYs. Devices which provide access to
369 * PHYs should register using this structure
370 */
371 struct mii_bus {
372 struct module *owner;
373 const char *name;
374 char id[MII_BUS_ID_SIZE];
375 void *priv;
376 /** @read: Perform a read transfer on the bus */
377 int (*read)(struct mii_bus *bus, int addr, int regnum);
378 /** @write: Perform a write transfer on the bus */
379 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
380 /** @read_c45: Perform a C45 read transfer on the bus */
381 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum);
382 /** @write_c45: Perform a C45 write transfer on the bus */
383 int (*write_c45)(struct mii_bus *bus, int addr, int devnum,
384 int regnum, u16 val);
385 /** @reset: Perform a reset of the bus */
386 int (*reset)(struct mii_bus *bus);
387
388 /** @stats: Statistic counters per device on the bus */
389 struct mdio_bus_stats stats[PHY_MAX_ADDR];
390
391 /**
392 * @mdio_lock: A lock to ensure that only one thing can read/write
393 * the MDIO bus at a time
394 */
395 struct mutex mdio_lock;
396
397 /** @parent: Parent device of this bus */
398 struct device *parent;
399 /** @state: State of bus structure */
400 enum {
401 MDIOBUS_ALLOCATED = 1,
402 MDIOBUS_REGISTERED,
403 MDIOBUS_UNREGISTERED,
404 MDIOBUS_RELEASED,
405 } state;
406
407 /** @dev: Kernel device representation */
408 struct device dev;
409
410 /** @mdio_map: list of all MDIO devices on bus */
411 struct mdio_device *mdio_map[PHY_MAX_ADDR];
412
413 /** @phy_mask: PHY addresses to be ignored when probing */
414 u32 phy_mask;
415
416 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
417 u32 phy_ignore_ta_mask;
418
419 /**
420 * @irq: An array of interrupts, each PHY's interrupt at the index
421 * matching its address
422 */
423 int irq[PHY_MAX_ADDR];
424
425 /** @reset_delay_us: GPIO reset pulse width in microseconds */
426 int reset_delay_us;
427 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
428 int reset_post_delay_us;
429 /** @reset_gpiod: Reset GPIO descriptor pointer */
430 struct gpio_desc *reset_gpiod;
431
432 /** @shared_lock: protect access to the shared element */
433 struct mutex shared_lock;
434
435 /** @shared: shared state across different PHYs */
436 struct phy_package_shared *shared[PHY_MAX_ADDR];
437 };
438 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
439
440 struct mii_bus *mdiobus_alloc_size(size_t size);
441
442 /**
443 * mdiobus_alloc - Allocate an MDIO bus structure
444 *
445 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
446 * for the driver to register the bus.
447 */
mdiobus_alloc(void)448 static inline struct mii_bus *mdiobus_alloc(void)
449 {
450 return mdiobus_alloc_size(0);
451 }
452
453 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
454 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
455 struct module *owner);
456 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
457 #define devm_mdiobus_register(dev, bus) \
458 __devm_mdiobus_register(dev, bus, THIS_MODULE)
459
460 void mdiobus_unregister(struct mii_bus *bus);
461 void mdiobus_free(struct mii_bus *bus);
462 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
devm_mdiobus_alloc(struct device * dev)463 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
464 {
465 return devm_mdiobus_alloc_size(dev, 0);
466 }
467
468 struct mii_bus *mdio_find_bus(const char *mdio_name);
469 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr);
470
471 #define PHY_INTERRUPT_DISABLED false
472 #define PHY_INTERRUPT_ENABLED true
473
474 /**
475 * enum phy_state - PHY state machine states:
476 *
477 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
478 * should be called if and only if the PHY is in this state,
479 * given that the PHY device exists.
480 * - PHY driver probe function will set the state to @PHY_READY
481 *
482 * @PHY_READY: PHY is ready to send and receive packets, but the
483 * controller is not. By default, PHYs which do not implement
484 * probe will be set to this state by phy_probe().
485 * - start will set the state to UP
486 *
487 * @PHY_UP: The PHY and attached device are ready to do work.
488 * Interrupts should be started here.
489 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
490 *
491 * @PHY_NOLINK: PHY is up, but not currently plugged in.
492 * - irq or timer will set @PHY_RUNNING if link comes back
493 * - phy_stop moves to @PHY_HALTED
494 *
495 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
496 * and/or receiving packets
497 * - irq or timer will set @PHY_NOLINK if link goes down
498 * - phy_stop moves to @PHY_HALTED
499 *
500 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
501 * is not expected to work, carrier will be indicated as down. PHY will be
502 * poll once per second, or on interrupt for it current state.
503 * Once complete, move to UP to restart the PHY.
504 * - phy_stop aborts the running test and moves to @PHY_HALTED
505 *
506 * @PHY_HALTED: PHY is up, but no polling or interrupts are done.
507 * - phy_start moves to @PHY_UP
508 *
509 * @PHY_ERROR: PHY is up, but is in an error state.
510 * - phy_stop moves to @PHY_HALTED
511 */
512 enum phy_state {
513 PHY_DOWN = 0,
514 PHY_READY,
515 PHY_HALTED,
516 PHY_ERROR,
517 PHY_UP,
518 PHY_RUNNING,
519 PHY_NOLINK,
520 PHY_CABLETEST,
521 };
522
523 #define MDIO_MMD_NUM 32
524
525 /**
526 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
527 * @devices_in_package: IEEE 802.3 devices in package register value.
528 * @mmds_present: bit vector of MMDs present.
529 * @device_ids: The device identifer for each present device.
530 */
531 struct phy_c45_device_ids {
532 u32 devices_in_package;
533 u32 mmds_present;
534 u32 device_ids[MDIO_MMD_NUM];
535 };
536
537 struct macsec_context;
538 struct macsec_ops;
539
540 /**
541 * struct phy_device - An instance of a PHY
542 *
543 * @mdio: MDIO bus this PHY is on
544 * @drv: Pointer to the driver for this PHY instance
545 * @devlink: Create a link between phy dev and mac dev, if the external phy
546 * used by current mac interface is managed by another mac interface.
547 * @phy_id: UID for this device found during discovery
548 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
549 * @is_c45: Set to true if this PHY uses clause 45 addressing.
550 * @is_internal: Set to true if this PHY is internal to a MAC.
551 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
552 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
553 * @has_fixups: Set to true if this PHY has fixups/quirks.
554 * @suspended: Set to true if this PHY has been suspended successfully.
555 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
556 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
557 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
558 * @downshifted_rate: Set true if link speed has been downshifted.
559 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
560 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
561 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN
562 * enabled.
563 * @state: State of the PHY for management purposes
564 * @dev_flags: Device-specific flags used by the PHY driver.
565 *
566 * - Bits [15:0] are free to use by the PHY driver to communicate
567 * driver specific behavior.
568 * - Bits [23:16] are currently reserved for future use.
569 * - Bits [31:24] are reserved for defining generic
570 * PHY driver behavior.
571 * @irq: IRQ number of the PHY's interrupt (-1 if none)
572 * @phy_timer: The timer for handling the state machine
573 * @phylink: Pointer to phylink instance for this PHY
574 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
575 * @sfp_bus: SFP bus attached to this PHY's fiber port
576 * @attached_dev: The attached enet driver's device instance ptr
577 * @adjust_link: Callback for the enet controller to respond to changes: in the
578 * link state.
579 * @phy_link_change: Callback for phylink for notification of link change
580 * @macsec_ops: MACsec offloading ops.
581 *
582 * @speed: Current link speed
583 * @duplex: Current duplex
584 * @port: Current port
585 * @pause: Current pause
586 * @asym_pause: Current asymmetric pause
587 * @supported: Combined MAC/PHY supported linkmodes
588 * @advertising: Currently advertised linkmodes
589 * @adv_old: Saved advertised while power saving for WoL
590 * @supported_eee: supported PHY EEE linkmodes
591 * @advertising_eee: Currently advertised EEE linkmodes
592 * @eee_enabled: Flag indicating whether the EEE feature is enabled
593 * @lp_advertising: Current link partner advertised linkmodes
594 * @host_interfaces: PHY interface modes supported by host
595 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
596 * @autoneg: Flag autoneg being used
597 * @rate_matching: Current rate matching mode
598 * @link: Current link state
599 * @autoneg_complete: Flag auto negotiation of the link has completed
600 * @mdix: Current crossover
601 * @mdix_ctrl: User setting of crossover
602 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
603 * @interrupts: Flag interrupts have been enabled
604 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
605 * handling shall be postponed until PHY has resumed
606 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
607 * requiring a rerun of the interrupt handler after resume
608 * @interface: enum phy_interface_t value
609 * @skb: Netlink message for cable diagnostics
610 * @nest: Netlink nest used for cable diagnostics
611 * @ehdr: nNtlink header for cable diagnostics
612 * @phy_led_triggers: Array of LED triggers
613 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
614 * @led_link_trigger: LED trigger for link up/down
615 * @last_triggered: last LED trigger for link speed
616 * @leds: list of PHY LED structures
617 * @master_slave_set: User requested master/slave configuration
618 * @master_slave_get: Current master/slave advertisement
619 * @master_slave_state: Current master/slave configuration
620 * @mii_ts: Pointer to time stamper callbacks
621 * @psec: Pointer to Power Sourcing Equipment control struct
622 * @lock: Mutex for serialization access to PHY
623 * @state_queue: Work queue for state machine
624 * @link_down_events: Number of times link was lost
625 * @shared: Pointer to private data shared by phys in one package
626 * @priv: Pointer to driver private data
627 *
628 * interrupts currently only supports enabled or disabled,
629 * but could be changed in the future to support enabling
630 * and disabling specific interrupts
631 *
632 * Contains some infrastructure for polling and interrupt
633 * handling, as well as handling shifts in PHY hardware state
634 */
635 struct phy_device {
636 struct mdio_device mdio;
637
638 /* Information about the PHY type */
639 /* And management functions */
640 struct phy_driver *drv;
641
642 struct device_link *devlink;
643
644 u32 phy_id;
645
646 struct phy_c45_device_ids c45_ids;
647 unsigned is_c45:1;
648 unsigned is_internal:1;
649 unsigned is_pseudo_fixed_link:1;
650 unsigned is_gigabit_capable:1;
651 unsigned has_fixups:1;
652 unsigned suspended:1;
653 unsigned suspended_by_mdio_bus:1;
654 unsigned sysfs_links:1;
655 unsigned loopback_enabled:1;
656 unsigned downshifted_rate:1;
657 unsigned is_on_sfp_module:1;
658 unsigned mac_managed_pm:1;
659 unsigned wol_enabled:1;
660
661 unsigned autoneg:1;
662 /* The most recently read link state */
663 unsigned link:1;
664 unsigned autoneg_complete:1;
665
666 /* Interrupts are enabled */
667 unsigned interrupts:1;
668 unsigned irq_suspended:1;
669 unsigned irq_rerun:1;
670
671 int rate_matching;
672
673 enum phy_state state;
674
675 u32 dev_flags;
676
677 phy_interface_t interface;
678
679 /*
680 * forced speed & duplex (no autoneg)
681 * partner speed & duplex & pause (autoneg)
682 */
683 int speed;
684 int duplex;
685 int port;
686 int pause;
687 int asym_pause;
688 u8 master_slave_get;
689 u8 master_slave_set;
690 u8 master_slave_state;
691
692 /* Union of PHY and Attached devices' supported link modes */
693 /* See ethtool.h for more info */
694 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
695 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
696 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
697 /* used with phy_speed_down */
698 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
699 /* used for eee validation */
700 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee);
701 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee);
702 bool eee_enabled;
703
704 /* Host supported PHY interface types. Should be ignored if empty. */
705 DECLARE_PHY_INTERFACE_MASK(host_interfaces);
706
707 /* Energy efficient ethernet modes which should be prohibited */
708 u32 eee_broken_modes;
709
710 #ifdef CONFIG_LED_TRIGGER_PHY
711 struct phy_led_trigger *phy_led_triggers;
712 unsigned int phy_num_led_triggers;
713 struct phy_led_trigger *last_triggered;
714
715 struct phy_led_trigger *led_link_trigger;
716 #endif
717 struct list_head leds;
718
719 /*
720 * Interrupt number for this PHY
721 * -1 means no interrupt
722 */
723 int irq;
724
725 /* private data pointer */
726 /* For use by PHYs to maintain extra state */
727 void *priv;
728
729 /* shared data pointer */
730 /* For use by PHYs inside the same package that need a shared state. */
731 struct phy_package_shared *shared;
732
733 /* Reporting cable test results */
734 struct sk_buff *skb;
735 void *ehdr;
736 struct nlattr *nest;
737
738 /* Interrupt and Polling infrastructure */
739 struct delayed_work state_queue;
740
741 struct mutex lock;
742
743 /* This may be modified under the rtnl lock */
744 bool sfp_bus_attached;
745 struct sfp_bus *sfp_bus;
746 struct phylink *phylink;
747 struct net_device *attached_dev;
748 struct mii_timestamper *mii_ts;
749 struct pse_control *psec;
750
751 u8 mdix;
752 u8 mdix_ctrl;
753
754 int pma_extable;
755
756 unsigned int link_down_events;
757
758 void (*phy_link_change)(struct phy_device *phydev, bool up);
759 void (*adjust_link)(struct net_device *dev);
760
761 #if IS_ENABLED(CONFIG_MACSEC)
762 /* MACsec management functions */
763 const struct macsec_ops *macsec_ops;
764 #endif
765
766 ANDROID_KABI_RESERVE(1);
767 ANDROID_KABI_RESERVE(2);
768 ANDROID_KABI_RESERVE(3);
769 ANDROID_KABI_RESERVE(4);
770 };
771
772 /* Generic phy_device::dev_flags */
773 #define PHY_F_NO_IRQ 0x80000000
774
to_phy_device(const struct device * dev)775 static inline struct phy_device *to_phy_device(const struct device *dev)
776 {
777 return container_of(to_mdio_device(dev), struct phy_device, mdio);
778 }
779
780 /**
781 * struct phy_tdr_config - Configuration of a TDR raw test
782 *
783 * @first: Distance for first data collection point
784 * @last: Distance for last data collection point
785 * @step: Step between data collection points
786 * @pair: Bitmap of cable pairs to collect data for
787 *
788 * A structure containing possible configuration parameters
789 * for a TDR cable test. The driver does not need to implement
790 * all the parameters, but should report what is actually used.
791 * All distances are in centimeters.
792 */
793 struct phy_tdr_config {
794 u32 first;
795 u32 last;
796 u32 step;
797 s8 pair;
798 };
799 #define PHY_PAIR_ALL -1
800
801 /**
802 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
803 * Avoidance) Reconciliation Sublayer.
804 *
805 * @version: read-only PLCA register map version. -1 = not available. Ignored
806 * when setting the configuration. Format is the same as reported by the PLCA
807 * IDVER register (31.CA00). -1 = not available.
808 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't
809 * set. 0 = disabled, anything else = enabled.
810 * @node_id: the PLCA local node identifier. -1 = not available / don't set.
811 * Allowed values [0 .. 254]. 255 = node disabled.
812 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only
813 * meaningful for the coordinator (node_id = 0). -1 = not available / don't
814 * set. Allowed values [1 .. 255].
815 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the
816 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for
817 * more details. The to_timer shall be set equal over all nodes.
818 * -1 = not available / don't set. Allowed values [0 .. 255].
819 * @burst_cnt: controls how many additional frames a node is allowed to send in
820 * single transmit opportunity (TO). The default value of 0 means that the
821 * node is allowed exactly one frame per TO. A value of 1 allows two frames
822 * per TO, and so on. -1 = not available / don't set.
823 * Allowed values [0 .. 255].
824 * @burst_tmr: controls how many bit times to wait for the MAC to send a new
825 * frame before interrupting the burst. This value should be set to a value
826 * greater than the MAC inter-packet gap (which is typically 96 bits).
827 * -1 = not available / don't set. Allowed values [0 .. 255].
828 *
829 * A structure containing configuration parameters for setting/getting the PLCA
830 * RS configuration. The driver does not need to implement all the parameters,
831 * but should report what is actually used.
832 */
833 struct phy_plca_cfg {
834 int version;
835 int enabled;
836 int node_id;
837 int node_cnt;
838 int to_tmr;
839 int burst_cnt;
840 int burst_tmr;
841 };
842
843 /**
844 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision
845 * Avoidance) Reconciliation Sublayer.
846 *
847 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS
848 * register(31.CA03), indicating BEACON activity.
849 *
850 * A structure containing status information of the PLCA RS configuration.
851 * The driver does not need to implement all the parameters, but should report
852 * what is actually used.
853 */
854 struct phy_plca_status {
855 bool pst;
856 };
857
858 /**
859 * struct phy_led: An LED driven by the PHY
860 *
861 * @list: List of LEDs
862 * @phydev: PHY this LED is attached to
863 * @led_cdev: Standard LED class structure
864 * @index: Number of the LED
865 */
866 struct phy_led {
867 struct list_head list;
868 struct phy_device *phydev;
869 struct led_classdev led_cdev;
870 u8 index;
871 };
872
873 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev)
874
875 /**
876 * struct phy_driver - Driver structure for a particular PHY type
877 *
878 * @mdiodrv: Data common to all MDIO devices
879 * @phy_id: The result of reading the UID registers of this PHY
880 * type, and ANDing them with the phy_id_mask. This driver
881 * only works for PHYs with IDs which match this field
882 * @name: The friendly name of this PHY type
883 * @phy_id_mask: Defines the important bits of the phy_id
884 * @features: A mandatory list of features (speed, duplex, etc)
885 * supported by this PHY
886 * @flags: A bitfield defining certain other features this PHY
887 * supports (like interrupts)
888 * @driver_data: Static driver data
889 *
890 * All functions are optional. If config_aneg or read_status
891 * are not implemented, the phy core uses the genphy versions.
892 * Note that none of these functions should be called from
893 * interrupt time. The goal is for the bus read/write functions
894 * to be able to block when the bus transaction is happening,
895 * and be freed up by an interrupt (The MPC85xx has this ability,
896 * though it is not currently supported in the driver).
897 */
898 struct phy_driver {
899 struct mdio_driver_common mdiodrv;
900 u32 phy_id;
901 char *name;
902 u32 phy_id_mask;
903 const unsigned long * const features;
904 u32 flags;
905 const void *driver_data;
906
907 /**
908 * @soft_reset: Called to issue a PHY software reset
909 */
910 int (*soft_reset)(struct phy_device *phydev);
911
912 /**
913 * @config_init: Called to initialize the PHY,
914 * including after a reset
915 */
916 int (*config_init)(struct phy_device *phydev);
917
918 /**
919 * @probe: Called during discovery. Used to set
920 * up device-specific structures, if any
921 */
922 int (*probe)(struct phy_device *phydev);
923
924 /**
925 * @get_features: Probe the hardware to determine what
926 * abilities it has. Should only set phydev->supported.
927 */
928 int (*get_features)(struct phy_device *phydev);
929
930 /**
931 * @get_rate_matching: Get the supported type of rate matching for a
932 * particular phy interface. This is used by phy consumers to determine
933 * whether to advertise lower-speed modes for that interface. It is
934 * assumed that if a rate matching mode is supported on an interface,
935 * then that interface's rate can be adapted to all slower link speeds
936 * supported by the phy. If the interface is not supported, this should
937 * return %RATE_MATCH_NONE.
938 */
939 int (*get_rate_matching)(struct phy_device *phydev,
940 phy_interface_t iface);
941
942 /* PHY Power Management */
943 /** @suspend: Suspend the hardware, saving state if needed */
944 int (*suspend)(struct phy_device *phydev);
945 /** @resume: Resume the hardware, restoring state if needed */
946 int (*resume)(struct phy_device *phydev);
947
948 /**
949 * @config_aneg: Configures the advertisement and resets
950 * autonegotiation if phydev->autoneg is on,
951 * forces the speed to the current settings in phydev
952 * if phydev->autoneg is off
953 */
954 int (*config_aneg)(struct phy_device *phydev);
955
956 /** @aneg_done: Determines the auto negotiation result */
957 int (*aneg_done)(struct phy_device *phydev);
958
959 /** @read_status: Determines the negotiated speed and duplex */
960 int (*read_status)(struct phy_device *phydev);
961
962 /**
963 * @config_intr: Enables or disables interrupts.
964 * It should also clear any pending interrupts prior to enabling the
965 * IRQs and after disabling them.
966 */
967 int (*config_intr)(struct phy_device *phydev);
968
969 /** @handle_interrupt: Override default interrupt handling */
970 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
971
972 /** @remove: Clears up any memory if needed */
973 void (*remove)(struct phy_device *phydev);
974
975 /**
976 * @match_phy_device: Returns true if this is a suitable
977 * driver for the given phydev. If NULL, matching is based on
978 * phy_id and phy_id_mask.
979 */
980 int (*match_phy_device)(struct phy_device *phydev);
981
982 /**
983 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
984 * register changes to enable Wake on LAN, so set_wol is
985 * provided to be called in the ethernet driver's set_wol
986 * function.
987 */
988 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
989
990 /**
991 * @get_wol: See set_wol, but for checking whether Wake on LAN
992 * is enabled.
993 */
994 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
995
996 /**
997 * @link_change_notify: Called to inform a PHY device driver
998 * when the core is about to change the link state. This
999 * callback is supposed to be used as fixup hook for drivers
1000 * that need to take action when the link state
1001 * changes. Drivers are by no means allowed to mess with the
1002 * PHY device structure in their implementations.
1003 */
1004 void (*link_change_notify)(struct phy_device *dev);
1005
1006 /**
1007 * @read_mmd: PHY specific driver override for reading a MMD
1008 * register. This function is optional for PHY specific
1009 * drivers. When not provided, the default MMD read function
1010 * will be used by phy_read_mmd(), which will use either a
1011 * direct read for Clause 45 PHYs or an indirect read for
1012 * Clause 22 PHYs. devnum is the MMD device number within the
1013 * PHY device, regnum is the register within the selected MMD
1014 * device.
1015 */
1016 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
1017
1018 /**
1019 * @write_mmd: PHY specific driver override for writing a MMD
1020 * register. This function is optional for PHY specific
1021 * drivers. When not provided, the default MMD write function
1022 * will be used by phy_write_mmd(), which will use either a
1023 * direct write for Clause 45 PHYs, or an indirect write for
1024 * Clause 22 PHYs. devnum is the MMD device number within the
1025 * PHY device, regnum is the register within the selected MMD
1026 * device. val is the value to be written.
1027 */
1028 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
1029 u16 val);
1030
1031 /** @read_page: Return the current PHY register page number */
1032 int (*read_page)(struct phy_device *dev);
1033 /** @write_page: Set the current PHY register page number */
1034 int (*write_page)(struct phy_device *dev, int page);
1035
1036 /**
1037 * @module_info: Get the size and type of the eeprom contained
1038 * within a plug-in module
1039 */
1040 int (*module_info)(struct phy_device *dev,
1041 struct ethtool_modinfo *modinfo);
1042
1043 /**
1044 * @module_eeprom: Get the eeprom information from the plug-in
1045 * module
1046 */
1047 int (*module_eeprom)(struct phy_device *dev,
1048 struct ethtool_eeprom *ee, u8 *data);
1049
1050 /** @cable_test_start: Start a cable test */
1051 int (*cable_test_start)(struct phy_device *dev);
1052
1053 /** @cable_test_tdr_start: Start a raw TDR cable test */
1054 int (*cable_test_tdr_start)(struct phy_device *dev,
1055 const struct phy_tdr_config *config);
1056
1057 /**
1058 * @cable_test_get_status: Once per second, or on interrupt,
1059 * request the status of the test.
1060 */
1061 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
1062
1063 /* Get statistics from the PHY using ethtool */
1064 /** @get_sset_count: Number of statistic counters */
1065 int (*get_sset_count)(struct phy_device *dev);
1066 /** @get_strings: Names of the statistic counters */
1067 void (*get_strings)(struct phy_device *dev, u8 *data);
1068 /** @get_stats: Return the statistic counter values */
1069 void (*get_stats)(struct phy_device *dev,
1070 struct ethtool_stats *stats, u64 *data);
1071
1072 /* Get and Set PHY tunables */
1073 /** @get_tunable: Return the value of a tunable */
1074 int (*get_tunable)(struct phy_device *dev,
1075 struct ethtool_tunable *tuna, void *data);
1076 /** @set_tunable: Set the value of a tunable */
1077 int (*set_tunable)(struct phy_device *dev,
1078 struct ethtool_tunable *tuna,
1079 const void *data);
1080 /** @set_loopback: Set the loopback mood of the PHY */
1081 int (*set_loopback)(struct phy_device *dev, bool enable);
1082 /** @get_sqi: Get the signal quality indication */
1083 int (*get_sqi)(struct phy_device *dev);
1084 /** @get_sqi_max: Get the maximum signal quality indication */
1085 int (*get_sqi_max)(struct phy_device *dev);
1086
1087 /* PLCA RS interface */
1088 /** @get_plca_cfg: Return the current PLCA configuration */
1089 int (*get_plca_cfg)(struct phy_device *dev,
1090 struct phy_plca_cfg *plca_cfg);
1091 /** @set_plca_cfg: Set the PLCA configuration */
1092 int (*set_plca_cfg)(struct phy_device *dev,
1093 const struct phy_plca_cfg *plca_cfg);
1094 /** @get_plca_status: Return the current PLCA status info */
1095 int (*get_plca_status)(struct phy_device *dev,
1096 struct phy_plca_status *plca_st);
1097
1098 /**
1099 * @led_brightness_set: Set a PHY LED brightness. Index
1100 * indicates which of the PHYs led should be set. Value
1101 * follows the standard LED class meaning, e.g. LED_OFF,
1102 * LED_HALF, LED_FULL.
1103 */
1104 int (*led_brightness_set)(struct phy_device *dev,
1105 u8 index, enum led_brightness value);
1106
1107 /**
1108 * @led_blink_set: Set a PHY LED blinking. Index indicates
1109 * which of the PHYs led should be configured to blink. Delays
1110 * are in milliseconds and if both are zero then a sensible
1111 * default should be chosen. The call should adjust the
1112 * timings in that case and if it can't match the values
1113 * specified exactly.
1114 */
1115 int (*led_blink_set)(struct phy_device *dev, u8 index,
1116 unsigned long *delay_on,
1117 unsigned long *delay_off);
1118 /**
1119 * @led_hw_is_supported: Can the HW support the given rules.
1120 * @dev: PHY device which has the LED
1121 * @index: Which LED of the PHY device
1122 * @rules The core is interested in these rules
1123 *
1124 * Return 0 if yes, -EOPNOTSUPP if not, or an error code.
1125 */
1126 int (*led_hw_is_supported)(struct phy_device *dev, u8 index,
1127 unsigned long rules);
1128 /**
1129 * @led_hw_control_set: Set the HW to control the LED
1130 * @dev: PHY device which has the LED
1131 * @index: Which LED of the PHY device
1132 * @rules The rules used to control the LED
1133 *
1134 * Returns 0, or a an error code.
1135 */
1136 int (*led_hw_control_set)(struct phy_device *dev, u8 index,
1137 unsigned long rules);
1138 /**
1139 * @led_hw_control_get: Get how the HW is controlling the LED
1140 * @dev: PHY device which has the LED
1141 * @index: Which LED of the PHY device
1142 * @rules Pointer to the rules used to control the LED
1143 *
1144 * Set *@rules to how the HW is currently blinking. Returns 0
1145 * on success, or a error code if the current blinking cannot
1146 * be represented in rules, or some other error happens.
1147 */
1148 int (*led_hw_control_get)(struct phy_device *dev, u8 index,
1149 unsigned long *rules);
1150
1151 ANDROID_KABI_RESERVE(1);
1152 ANDROID_KABI_RESERVE(2);
1153 };
1154 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
1155 struct phy_driver, mdiodrv)
1156
1157 #define PHY_ANY_ID "MATCH ANY PHY"
1158 #define PHY_ANY_UID 0xffffffff
1159
1160 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
1161 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
1162 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
1163
1164 /**
1165 * phy_id_compare - compare @id1 with @id2 taking account of @mask
1166 * @id1: first PHY ID
1167 * @id2: second PHY ID
1168 * @mask: the PHY ID mask, set bits are significant in matching
1169 *
1170 * Return true if the bits from @id1 and @id2 specified by @mask match.
1171 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask).
1172 */
phy_id_compare(u32 id1,u32 id2,u32 mask)1173 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask)
1174 {
1175 return !((id1 ^ id2) & mask);
1176 }
1177
1178 /**
1179 * phydev_id_compare - compare @id with the PHY's Clause 22 ID
1180 * @phydev: the PHY device
1181 * @id: the PHY ID to be matched
1182 *
1183 * Compare the @phydev clause 22 ID with the provided @id and return true or
1184 * false depending whether it matches, using the bound driver mask. The
1185 * @phydev must be bound to a driver.
1186 */
phydev_id_compare(struct phy_device * phydev,u32 id)1187 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id)
1188 {
1189 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask);
1190 }
1191
1192 /* A Structure for boards to register fixups with the PHY Lib */
1193 struct phy_fixup {
1194 struct list_head list;
1195 char bus_id[MII_BUS_ID_SIZE + 3];
1196 u32 phy_uid;
1197 u32 phy_uid_mask;
1198 int (*run)(struct phy_device *phydev);
1199 };
1200
1201 const char *phy_speed_to_str(int speed);
1202 const char *phy_duplex_to_str(unsigned int duplex);
1203 const char *phy_rate_matching_to_str(int rate_matching);
1204
1205 int phy_interface_num_ports(phy_interface_t interface);
1206
1207 /* A structure for mapping a particular speed and duplex
1208 * combination to a particular SUPPORTED and ADVERTISED value
1209 */
1210 struct phy_setting {
1211 u32 speed;
1212 u8 duplex;
1213 u8 bit;
1214 };
1215
1216 const struct phy_setting *
1217 phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
1218 bool exact);
1219 size_t phy_speeds(unsigned int *speeds, size_t size,
1220 unsigned long *mask);
1221 void of_set_phy_supported(struct phy_device *phydev);
1222 void of_set_phy_eee_broken(struct phy_device *phydev);
1223 int phy_speed_down_core(struct phy_device *phydev);
1224
1225 /**
1226 * phy_is_started - Convenience function to check whether PHY is started
1227 * @phydev: The phy_device struct
1228 */
phy_is_started(struct phy_device * phydev)1229 static inline bool phy_is_started(struct phy_device *phydev)
1230 {
1231 return phydev->state >= PHY_UP;
1232 }
1233
1234 void phy_resolve_aneg_pause(struct phy_device *phydev);
1235 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1236 void phy_check_downshift(struct phy_device *phydev);
1237
1238 /**
1239 * phy_read - Convenience function for reading a given PHY register
1240 * @phydev: the phy_device struct
1241 * @regnum: register number to read
1242 *
1243 * NOTE: MUST NOT be called from interrupt context,
1244 * because the bus read/write functions may wait for an interrupt
1245 * to conclude the operation.
1246 */
phy_read(struct phy_device * phydev,u32 regnum)1247 static inline int phy_read(struct phy_device *phydev, u32 regnum)
1248 {
1249 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1250 }
1251
1252 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1253 timeout_us, sleep_before_read) \
1254 ({ \
1255 int __ret, __val; \
1256 __ret = read_poll_timeout(__val = phy_read, val, \
1257 __val < 0 || (cond), \
1258 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1259 if (__val < 0) \
1260 __ret = __val; \
1261 if (__ret) \
1262 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1263 __ret; \
1264 })
1265
1266 /**
1267 * __phy_read - convenience function for reading a given PHY register
1268 * @phydev: the phy_device struct
1269 * @regnum: register number to read
1270 *
1271 * The caller must have taken the MDIO bus lock.
1272 */
__phy_read(struct phy_device * phydev,u32 regnum)1273 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1274 {
1275 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1276 }
1277
1278 /**
1279 * phy_write - Convenience function for writing a given PHY register
1280 * @phydev: the phy_device struct
1281 * @regnum: register number to write
1282 * @val: value to write to @regnum
1283 *
1284 * NOTE: MUST NOT be called from interrupt context,
1285 * because the bus read/write functions may wait for an interrupt
1286 * to conclude the operation.
1287 */
phy_write(struct phy_device * phydev,u32 regnum,u16 val)1288 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1289 {
1290 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1291 }
1292
1293 /**
1294 * __phy_write - Convenience function for writing a given PHY register
1295 * @phydev: the phy_device struct
1296 * @regnum: register number to write
1297 * @val: value to write to @regnum
1298 *
1299 * The caller must have taken the MDIO bus lock.
1300 */
__phy_write(struct phy_device * phydev,u32 regnum,u16 val)1301 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1302 {
1303 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1304 val);
1305 }
1306
1307 /**
1308 * __phy_modify_changed() - Convenience function for modifying a PHY register
1309 * @phydev: a pointer to a &struct phy_device
1310 * @regnum: register number
1311 * @mask: bit mask of bits to clear
1312 * @set: bit mask of bits to set
1313 *
1314 * Unlocked helper function which allows a PHY register to be modified as
1315 * new register value = (old register value & ~mask) | set
1316 *
1317 * Returns negative errno, 0 if there was no change, and 1 in case of change
1318 */
__phy_modify_changed(struct phy_device * phydev,u32 regnum,u16 mask,u16 set)1319 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1320 u16 mask, u16 set)
1321 {
1322 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1323 regnum, mask, set);
1324 }
1325
1326 /*
1327 * phy_read_mmd - Convenience function for reading a register
1328 * from an MMD on a given PHY.
1329 */
1330 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1331
1332 /**
1333 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1334 * condition is met or a timeout occurs
1335 *
1336 * @phydev: The phy_device struct
1337 * @devaddr: The MMD to read from
1338 * @regnum: The register on the MMD to read
1339 * @val: Variable to read the register into
1340 * @cond: Break condition (usually involving @val)
1341 * @sleep_us: Maximum time to sleep between reads in us (0
1342 * tight-loops). Should be less than ~20ms since usleep_range
1343 * is used (see Documentation/timers/timers-howto.rst).
1344 * @timeout_us: Timeout in us, 0 means never timeout
1345 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1346 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1347 * case, the last read value at @args is stored in @val. Must not
1348 * be called from atomic context if sleep_us or timeout_us are used.
1349 */
1350 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1351 sleep_us, timeout_us, sleep_before_read) \
1352 ({ \
1353 int __ret, __val; \
1354 __ret = read_poll_timeout(__val = phy_read_mmd, val, \
1355 __val < 0 || (cond), \
1356 sleep_us, timeout_us, sleep_before_read, \
1357 phydev, devaddr, regnum); \
1358 if (__val < 0) \
1359 __ret = __val; \
1360 if (__ret) \
1361 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1362 __ret; \
1363 })
1364
1365 /*
1366 * __phy_read_mmd - Convenience function for reading a register
1367 * from an MMD on a given PHY.
1368 */
1369 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1370
1371 /*
1372 * phy_write_mmd - Convenience function for writing a register
1373 * on an MMD on a given PHY.
1374 */
1375 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1376
1377 /*
1378 * __phy_write_mmd - Convenience function for writing a register
1379 * on an MMD on a given PHY.
1380 */
1381 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1382
1383 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1384 u16 set);
1385 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1386 u16 set);
1387 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1388 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1389
1390 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1391 u16 mask, u16 set);
1392 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1393 u16 mask, u16 set);
1394 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1395 u16 mask, u16 set);
1396 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1397 u16 mask, u16 set);
1398
1399 /**
1400 * __phy_set_bits - Convenience function for setting bits in a PHY register
1401 * @phydev: the phy_device struct
1402 * @regnum: register number to write
1403 * @val: bits to set
1404 *
1405 * The caller must have taken the MDIO bus lock.
1406 */
__phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1407 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1408 {
1409 return __phy_modify(phydev, regnum, 0, val);
1410 }
1411
1412 /**
1413 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1414 * @phydev: the phy_device struct
1415 * @regnum: register number to write
1416 * @val: bits to clear
1417 *
1418 * The caller must have taken the MDIO bus lock.
1419 */
__phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1420 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1421 u16 val)
1422 {
1423 return __phy_modify(phydev, regnum, val, 0);
1424 }
1425
1426 /**
1427 * phy_set_bits - Convenience function for setting bits in a PHY register
1428 * @phydev: the phy_device struct
1429 * @regnum: register number to write
1430 * @val: bits to set
1431 */
phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1432 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1433 {
1434 return phy_modify(phydev, regnum, 0, val);
1435 }
1436
1437 /**
1438 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1439 * @phydev: the phy_device struct
1440 * @regnum: register number to write
1441 * @val: bits to clear
1442 */
phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1443 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1444 {
1445 return phy_modify(phydev, regnum, val, 0);
1446 }
1447
1448 /**
1449 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1450 * on MMD
1451 * @phydev: the phy_device struct
1452 * @devad: the MMD containing register to modify
1453 * @regnum: register number to modify
1454 * @val: bits to set
1455 *
1456 * The caller must have taken the MDIO bus lock.
1457 */
__phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1458 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1459 u32 regnum, u16 val)
1460 {
1461 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1462 }
1463
1464 /**
1465 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1466 * on MMD
1467 * @phydev: the phy_device struct
1468 * @devad: the MMD containing register to modify
1469 * @regnum: register number to modify
1470 * @val: bits to clear
1471 *
1472 * The caller must have taken the MDIO bus lock.
1473 */
__phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1474 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1475 u32 regnum, u16 val)
1476 {
1477 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1478 }
1479
1480 /**
1481 * phy_set_bits_mmd - Convenience function for setting bits in a register
1482 * on MMD
1483 * @phydev: the phy_device struct
1484 * @devad: the MMD containing register to modify
1485 * @regnum: register number to modify
1486 * @val: bits to set
1487 */
phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1488 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1489 u32 regnum, u16 val)
1490 {
1491 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1492 }
1493
1494 /**
1495 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1496 * on MMD
1497 * @phydev: the phy_device struct
1498 * @devad: the MMD containing register to modify
1499 * @regnum: register number to modify
1500 * @val: bits to clear
1501 */
phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1502 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1503 u32 regnum, u16 val)
1504 {
1505 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1506 }
1507
1508 /**
1509 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1510 * @phydev: the phy_device struct
1511 *
1512 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1513 * PHY_MAC_INTERRUPT
1514 */
phy_interrupt_is_valid(struct phy_device * phydev)1515 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1516 {
1517 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1518 }
1519
1520 /**
1521 * phy_polling_mode - Convenience function for testing whether polling is
1522 * used to detect PHY status changes
1523 * @phydev: the phy_device struct
1524 */
phy_polling_mode(struct phy_device * phydev)1525 static inline bool phy_polling_mode(struct phy_device *phydev)
1526 {
1527 if (phydev->state == PHY_CABLETEST)
1528 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1529 return true;
1530
1531 return phydev->irq == PHY_POLL;
1532 }
1533
1534 /**
1535 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1536 * @phydev: the phy_device struct
1537 */
phy_has_hwtstamp(struct phy_device * phydev)1538 static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1539 {
1540 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1541 }
1542
1543 /**
1544 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1545 * @phydev: the phy_device struct
1546 */
phy_has_rxtstamp(struct phy_device * phydev)1547 static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1548 {
1549 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1550 }
1551
1552 /**
1553 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1554 * PTP hardware clock capabilities.
1555 * @phydev: the phy_device struct
1556 */
phy_has_tsinfo(struct phy_device * phydev)1557 static inline bool phy_has_tsinfo(struct phy_device *phydev)
1558 {
1559 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1560 }
1561
1562 /**
1563 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1564 * @phydev: the phy_device struct
1565 */
phy_has_txtstamp(struct phy_device * phydev)1566 static inline bool phy_has_txtstamp(struct phy_device *phydev)
1567 {
1568 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1569 }
1570
phy_hwtstamp(struct phy_device * phydev,struct ifreq * ifr)1571 static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1572 {
1573 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
1574 }
1575
phy_rxtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1576 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1577 int type)
1578 {
1579 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1580 }
1581
phy_ts_info(struct phy_device * phydev,struct ethtool_ts_info * tsinfo)1582 static inline int phy_ts_info(struct phy_device *phydev,
1583 struct ethtool_ts_info *tsinfo)
1584 {
1585 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1586 }
1587
phy_txtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1588 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1589 int type)
1590 {
1591 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1592 }
1593
1594 /**
1595 * phy_is_internal - Convenience function for testing if a PHY is internal
1596 * @phydev: the phy_device struct
1597 */
phy_is_internal(struct phy_device * phydev)1598 static inline bool phy_is_internal(struct phy_device *phydev)
1599 {
1600 return phydev->is_internal;
1601 }
1602
1603 /**
1604 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1605 * @phydev: the phy_device struct
1606 */
phy_on_sfp(struct phy_device * phydev)1607 static inline bool phy_on_sfp(struct phy_device *phydev)
1608 {
1609 return phydev->is_on_sfp_module;
1610 }
1611
1612 /**
1613 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1614 * PHY interface mode is RGMII (all variants)
1615 * @mode: the &phy_interface_t enum
1616 */
phy_interface_mode_is_rgmii(phy_interface_t mode)1617 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1618 {
1619 return mode >= PHY_INTERFACE_MODE_RGMII &&
1620 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1621 };
1622
1623 /**
1624 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1625 * negotiation
1626 * @mode: one of &enum phy_interface_t
1627 *
1628 * Returns true if the PHY interface mode uses the 16-bit negotiation
1629 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1630 */
phy_interface_mode_is_8023z(phy_interface_t mode)1631 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1632 {
1633 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1634 mode == PHY_INTERFACE_MODE_2500BASEX;
1635 }
1636
1637 /**
1638 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1639 * is RGMII (all variants)
1640 * @phydev: the phy_device struct
1641 */
phy_interface_is_rgmii(struct phy_device * phydev)1642 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1643 {
1644 return phy_interface_mode_is_rgmii(phydev->interface);
1645 };
1646
1647 /**
1648 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1649 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1650 * @phydev: the phy_device struct
1651 */
phy_is_pseudo_fixed_link(struct phy_device * phydev)1652 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1653 {
1654 return phydev->is_pseudo_fixed_link;
1655 }
1656
1657 int phy_save_page(struct phy_device *phydev);
1658 int phy_select_page(struct phy_device *phydev, int page);
1659 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1660 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1661 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1662 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1663 u16 mask, u16 set);
1664 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1665 u16 mask, u16 set);
1666
1667 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1668 bool is_c45,
1669 struct phy_c45_device_ids *c45_ids);
1670 #if IS_ENABLED(CONFIG_PHYLIB)
1671 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1672 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1673 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1674 struct phy_device *device_phy_find_device(struct device *dev);
1675 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode);
1676 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1677 int phy_device_register(struct phy_device *phy);
1678 void phy_device_free(struct phy_device *phydev);
1679 #else
fwnode_get_phy_id(struct fwnode_handle * fwnode,u32 * phy_id)1680 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1681 {
1682 return 0;
1683 }
1684 static inline
fwnode_mdio_find_device(struct fwnode_handle * fwnode)1685 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1686 {
1687 return 0;
1688 }
1689
1690 static inline
fwnode_phy_find_device(struct fwnode_handle * phy_fwnode)1691 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1692 {
1693 return NULL;
1694 }
1695
device_phy_find_device(struct device * dev)1696 static inline struct phy_device *device_phy_find_device(struct device *dev)
1697 {
1698 return NULL;
1699 }
1700
1701 static inline
fwnode_get_phy_node(struct fwnode_handle * fwnode)1702 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1703 {
1704 return NULL;
1705 }
1706
1707 static inline
get_phy_device(struct mii_bus * bus,int addr,bool is_c45)1708 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1709 {
1710 return NULL;
1711 }
1712
phy_device_register(struct phy_device * phy)1713 static inline int phy_device_register(struct phy_device *phy)
1714 {
1715 return 0;
1716 }
1717
phy_device_free(struct phy_device * phydev)1718 static inline void phy_device_free(struct phy_device *phydev) { }
1719 #endif /* CONFIG_PHYLIB */
1720 void phy_device_remove(struct phy_device *phydev);
1721 int phy_get_c45_ids(struct phy_device *phydev);
1722 int phy_init_hw(struct phy_device *phydev);
1723 int phy_suspend(struct phy_device *phydev);
1724 int phy_resume(struct phy_device *phydev);
1725 int __phy_resume(struct phy_device *phydev);
1726 int phy_loopback(struct phy_device *phydev, bool enable);
1727 void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1728 void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1729 int phy_sfp_probe(struct phy_device *phydev,
1730 const struct sfp_upstream_ops *ops);
1731 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1732 phy_interface_t interface);
1733 struct phy_device *phy_find_first(struct mii_bus *bus);
1734 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1735 u32 flags, phy_interface_t interface);
1736 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1737 void (*handler)(struct net_device *),
1738 phy_interface_t interface);
1739 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1740 void (*handler)(struct net_device *),
1741 phy_interface_t interface);
1742 void phy_disconnect(struct phy_device *phydev);
1743 void phy_detach(struct phy_device *phydev);
1744 void phy_start(struct phy_device *phydev);
1745 void phy_stop(struct phy_device *phydev);
1746 int phy_config_aneg(struct phy_device *phydev);
1747 int phy_start_aneg(struct phy_device *phydev);
1748 int phy_aneg_done(struct phy_device *phydev);
1749 int phy_speed_down(struct phy_device *phydev, bool sync);
1750 int phy_speed_up(struct phy_device *phydev);
1751 bool phy_check_valid(int speed, int duplex, unsigned long *features);
1752
1753 int phy_restart_aneg(struct phy_device *phydev);
1754 int phy_reset_after_clk_enable(struct phy_device *phydev);
1755
1756 #if IS_ENABLED(CONFIG_PHYLIB)
1757 int phy_start_cable_test(struct phy_device *phydev,
1758 struct netlink_ext_ack *extack);
1759 int phy_start_cable_test_tdr(struct phy_device *phydev,
1760 struct netlink_ext_ack *extack,
1761 const struct phy_tdr_config *config);
1762 #else
1763 static inline
phy_start_cable_test(struct phy_device * phydev,struct netlink_ext_ack * extack)1764 int phy_start_cable_test(struct phy_device *phydev,
1765 struct netlink_ext_ack *extack)
1766 {
1767 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1768 return -EOPNOTSUPP;
1769 }
1770 static inline
phy_start_cable_test_tdr(struct phy_device * phydev,struct netlink_ext_ack * extack,const struct phy_tdr_config * config)1771 int phy_start_cable_test_tdr(struct phy_device *phydev,
1772 struct netlink_ext_ack *extack,
1773 const struct phy_tdr_config *config)
1774 {
1775 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1776 return -EOPNOTSUPP;
1777 }
1778 #endif
1779
phy_device_reset(struct phy_device * phydev,int value)1780 static inline void phy_device_reset(struct phy_device *phydev, int value)
1781 {
1782 mdio_device_reset(&phydev->mdio, value);
1783 }
1784
1785 #define phydev_err(_phydev, format, args...) \
1786 dev_err(&_phydev->mdio.dev, format, ##args)
1787
1788 #define phydev_err_probe(_phydev, err, format, args...) \
1789 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1790
1791 #define phydev_info(_phydev, format, args...) \
1792 dev_info(&_phydev->mdio.dev, format, ##args)
1793
1794 #define phydev_warn(_phydev, format, args...) \
1795 dev_warn(&_phydev->mdio.dev, format, ##args)
1796
1797 #define phydev_dbg(_phydev, format, args...) \
1798 dev_dbg(&_phydev->mdio.dev, format, ##args)
1799
phydev_name(const struct phy_device * phydev)1800 static inline const char *phydev_name(const struct phy_device *phydev)
1801 {
1802 return dev_name(&phydev->mdio.dev);
1803 }
1804
phy_lock_mdio_bus(struct phy_device * phydev)1805 static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1806 {
1807 mutex_lock(&phydev->mdio.bus->mdio_lock);
1808 }
1809
phy_unlock_mdio_bus(struct phy_device * phydev)1810 static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1811 {
1812 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1813 }
1814
1815 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1816 __printf(2, 3);
1817 char *phy_attached_info_irq(struct phy_device *phydev)
1818 __malloc;
1819 void phy_attached_info(struct phy_device *phydev);
1820
1821 /* Clause 22 PHY */
1822 int genphy_read_abilities(struct phy_device *phydev);
1823 int genphy_setup_forced(struct phy_device *phydev);
1824 int genphy_restart_aneg(struct phy_device *phydev);
1825 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1826 int genphy_config_eee_advert(struct phy_device *phydev);
1827 int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1828 int genphy_aneg_done(struct phy_device *phydev);
1829 int genphy_update_link(struct phy_device *phydev);
1830 int genphy_read_lpa(struct phy_device *phydev);
1831 int genphy_read_status_fixed(struct phy_device *phydev);
1832 int genphy_read_status(struct phy_device *phydev);
1833 int genphy_read_master_slave(struct phy_device *phydev);
1834 int genphy_suspend(struct phy_device *phydev);
1835 int genphy_resume(struct phy_device *phydev);
1836 int genphy_loopback(struct phy_device *phydev, bool enable);
1837 int genphy_soft_reset(struct phy_device *phydev);
1838 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1839
genphy_config_aneg(struct phy_device * phydev)1840 static inline int genphy_config_aneg(struct phy_device *phydev)
1841 {
1842 return __genphy_config_aneg(phydev, false);
1843 }
1844
genphy_no_config_intr(struct phy_device * phydev)1845 static inline int genphy_no_config_intr(struct phy_device *phydev)
1846 {
1847 return 0;
1848 }
1849 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1850 u16 regnum);
1851 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1852 u16 regnum, u16 val);
1853
1854 /* Clause 37 */
1855 int genphy_c37_config_aneg(struct phy_device *phydev);
1856 int genphy_c37_read_status(struct phy_device *phydev);
1857
1858 /* Clause 45 PHY */
1859 int genphy_c45_restart_aneg(struct phy_device *phydev);
1860 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1861 int genphy_c45_aneg_done(struct phy_device *phydev);
1862 int genphy_c45_read_link(struct phy_device *phydev);
1863 int genphy_c45_read_lpa(struct phy_device *phydev);
1864 int genphy_c45_read_pma(struct phy_device *phydev);
1865 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1866 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1867 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1868 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1869 int genphy_c45_read_mdix(struct phy_device *phydev);
1870 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1871 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev);
1872 int genphy_c45_read_eee_abilities(struct phy_device *phydev);
1873 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1874 int genphy_c45_read_status(struct phy_device *phydev);
1875 int genphy_c45_baset1_read_status(struct phy_device *phydev);
1876 int genphy_c45_config_aneg(struct phy_device *phydev);
1877 int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1878 int genphy_c45_pma_resume(struct phy_device *phydev);
1879 int genphy_c45_pma_suspend(struct phy_device *phydev);
1880 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1881 int genphy_c45_plca_get_cfg(struct phy_device *phydev,
1882 struct phy_plca_cfg *plca_cfg);
1883 int genphy_c45_plca_set_cfg(struct phy_device *phydev,
1884 const struct phy_plca_cfg *plca_cfg);
1885 int genphy_c45_plca_get_status(struct phy_device *phydev,
1886 struct phy_plca_status *plca_st);
1887 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv,
1888 unsigned long *lp, bool *is_enabled);
1889 int genphy_c45_ethtool_get_eee(struct phy_device *phydev,
1890 struct ethtool_eee *data);
1891 int genphy_c45_ethtool_set_eee(struct phy_device *phydev,
1892 struct ethtool_eee *data);
1893 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv);
1894 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev);
1895 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv);
1896
1897 /* Generic C45 PHY driver */
1898 extern struct phy_driver genphy_c45_driver;
1899
1900 /* The gen10g_* functions are the old Clause 45 stub */
1901 int gen10g_config_aneg(struct phy_device *phydev);
1902
phy_read_status(struct phy_device * phydev)1903 static inline int phy_read_status(struct phy_device *phydev)
1904 {
1905 if (!phydev->drv)
1906 return -EIO;
1907
1908 if (phydev->drv->read_status)
1909 return phydev->drv->read_status(phydev);
1910 else
1911 return genphy_read_status(phydev);
1912 }
1913
1914 void phy_driver_unregister(struct phy_driver *drv);
1915 void phy_drivers_unregister(struct phy_driver *drv, int n);
1916 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1917 int phy_drivers_register(struct phy_driver *new_driver, int n,
1918 struct module *owner);
1919 void phy_error(struct phy_device *phydev);
1920 void phy_state_machine(struct work_struct *work);
1921 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1922 void phy_trigger_machine(struct phy_device *phydev);
1923 void phy_mac_interrupt(struct phy_device *phydev);
1924 void phy_start_machine(struct phy_device *phydev);
1925 void phy_stop_machine(struct phy_device *phydev);
1926 void phy_ethtool_ksettings_get(struct phy_device *phydev,
1927 struct ethtool_link_ksettings *cmd);
1928 int phy_ethtool_ksettings_set(struct phy_device *phydev,
1929 const struct ethtool_link_ksettings *cmd);
1930 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1931 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1932 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1933 int phy_disable_interrupts(struct phy_device *phydev);
1934 void phy_request_interrupt(struct phy_device *phydev);
1935 void phy_free_interrupt(struct phy_device *phydev);
1936 void phy_print_status(struct phy_device *phydev);
1937 int phy_get_rate_matching(struct phy_device *phydev,
1938 phy_interface_t iface);
1939 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1940 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1941 void phy_advertise_supported(struct phy_device *phydev);
1942 void phy_support_sym_pause(struct phy_device *phydev);
1943 void phy_support_asym_pause(struct phy_device *phydev);
1944 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1945 bool autoneg);
1946 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1947 bool phy_validate_pause(struct phy_device *phydev,
1948 struct ethtool_pauseparam *pp);
1949 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1950
1951 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1952 const int *delay_values, int size, bool is_rx);
1953
1954 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1955 bool *tx_pause, bool *rx_pause);
1956
1957 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1958 int (*run)(struct phy_device *));
1959 int phy_register_fixup_for_id(const char *bus_id,
1960 int (*run)(struct phy_device *));
1961 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1962 int (*run)(struct phy_device *));
1963
1964 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1965 int phy_unregister_fixup_for_id(const char *bus_id);
1966 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1967
1968 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1969 int phy_get_eee_err(struct phy_device *phydev);
1970 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1971 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1972 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1973 void phy_ethtool_get_wol(struct phy_device *phydev,
1974 struct ethtool_wolinfo *wol);
1975 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1976 struct ethtool_link_ksettings *cmd);
1977 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1978 const struct ethtool_link_ksettings *cmd);
1979 int phy_ethtool_nway_reset(struct net_device *ndev);
1980 int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1981 void phy_package_leave(struct phy_device *phydev);
1982 int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1983 int addr, size_t priv_size);
1984
1985 int __init mdio_bus_init(void);
1986 void mdio_bus_exit(void);
1987
1988 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1989 int phy_ethtool_get_sset_count(struct phy_device *phydev);
1990 int phy_ethtool_get_stats(struct phy_device *phydev,
1991 struct ethtool_stats *stats, u64 *data);
1992 int phy_ethtool_get_plca_cfg(struct phy_device *phydev,
1993 struct phy_plca_cfg *plca_cfg);
1994 int phy_ethtool_set_plca_cfg(struct phy_device *phydev,
1995 const struct phy_plca_cfg *plca_cfg,
1996 struct netlink_ext_ack *extack);
1997 int phy_ethtool_get_plca_status(struct phy_device *phydev,
1998 struct phy_plca_status *plca_st);
1999
2000 int __phy_hwtstamp_get(struct phy_device *phydev,
2001 struct kernel_hwtstamp_config *config);
2002 int __phy_hwtstamp_set(struct phy_device *phydev,
2003 struct kernel_hwtstamp_config *config,
2004 struct netlink_ext_ack *extack);
2005
phy_package_read(struct phy_device * phydev,u32 regnum)2006 static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
2007 {
2008 struct phy_package_shared *shared = phydev->shared;
2009
2010 if (!shared)
2011 return -EIO;
2012
2013 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
2014 }
2015
__phy_package_read(struct phy_device * phydev,u32 regnum)2016 static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
2017 {
2018 struct phy_package_shared *shared = phydev->shared;
2019
2020 if (!shared)
2021 return -EIO;
2022
2023 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
2024 }
2025
phy_package_write(struct phy_device * phydev,u32 regnum,u16 val)2026 static inline int phy_package_write(struct phy_device *phydev,
2027 u32 regnum, u16 val)
2028 {
2029 struct phy_package_shared *shared = phydev->shared;
2030
2031 if (!shared)
2032 return -EIO;
2033
2034 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
2035 }
2036
__phy_package_write(struct phy_device * phydev,u32 regnum,u16 val)2037 static inline int __phy_package_write(struct phy_device *phydev,
2038 u32 regnum, u16 val)
2039 {
2040 struct phy_package_shared *shared = phydev->shared;
2041
2042 if (!shared)
2043 return -EIO;
2044
2045 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
2046 }
2047
__phy_package_set_once(struct phy_device * phydev,unsigned int b)2048 static inline bool __phy_package_set_once(struct phy_device *phydev,
2049 unsigned int b)
2050 {
2051 struct phy_package_shared *shared = phydev->shared;
2052
2053 if (!shared)
2054 return false;
2055
2056 return !test_and_set_bit(b, &shared->flags);
2057 }
2058
phy_package_init_once(struct phy_device * phydev)2059 static inline bool phy_package_init_once(struct phy_device *phydev)
2060 {
2061 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
2062 }
2063
phy_package_probe_once(struct phy_device * phydev)2064 static inline bool phy_package_probe_once(struct phy_device *phydev)
2065 {
2066 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
2067 }
2068
2069 extern struct bus_type mdio_bus_type;
2070
2071 struct mdio_board_info {
2072 const char *bus_id;
2073 char modalias[MDIO_NAME_SIZE];
2074 int mdio_addr;
2075 const void *platform_data;
2076 };
2077
2078 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
2079 int mdiobus_register_board_info(const struct mdio_board_info *info,
2080 unsigned int n);
2081 #else
mdiobus_register_board_info(const struct mdio_board_info * i,unsigned int n)2082 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
2083 unsigned int n)
2084 {
2085 return 0;
2086 }
2087 #endif
2088
2089
2090 /**
2091 * phy_module_driver() - Helper macro for registering PHY drivers
2092 * @__phy_drivers: array of PHY drivers to register
2093 * @__count: Numbers of members in array
2094 *
2095 * Helper macro for PHY drivers which do not do anything special in module
2096 * init/exit. Each module may only use this macro once, and calling it
2097 * replaces module_init() and module_exit().
2098 */
2099 #define phy_module_driver(__phy_drivers, __count) \
2100 static int __init phy_module_init(void) \
2101 { \
2102 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
2103 } \
2104 module_init(phy_module_init); \
2105 static void __exit phy_module_exit(void) \
2106 { \
2107 phy_drivers_unregister(__phy_drivers, __count); \
2108 } \
2109 module_exit(phy_module_exit)
2110
2111 #define module_phy_driver(__phy_drivers) \
2112 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
2113
2114 bool phy_driver_is_genphy(struct phy_device *phydev);
2115 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
2116
2117 #endif /* __PHY_H */
2118