1 /*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35 #ifndef __CXGB4_ULD_H
36 #define __CXGB4_ULD_H
37
38 #include <linux/cache.h>
39 #include <linux/spinlock.h>
40 #include <linux/skbuff.h>
41 #include <linux/inetdevice.h>
42 #include <linux/atomic.h>
43 #include <net/tls.h>
44 #include "cxgb4.h"
45
46 #define MAX_ULD_QSETS 16
47 #define MAX_ULD_NPORTS 4
48
49 /* ulp_mem_io + ulptx_idata + payload + padding */
50 #define MAX_IMM_ULPTX_WR_LEN (32 + 8 + 256 + 8)
51
52 /* CPL message priority levels */
53 enum {
54 CPL_PRIORITY_DATA = 0, /* data messages */
55 CPL_PRIORITY_SETUP = 1, /* connection setup messages */
56 CPL_PRIORITY_TEARDOWN = 0, /* connection teardown messages */
57 CPL_PRIORITY_LISTEN = 1, /* listen start/stop messages */
58 CPL_PRIORITY_ACK = 1, /* RX ACK messages */
59 CPL_PRIORITY_CONTROL = 1 /* control messages */
60 };
61
62 #define INIT_TP_WR(w, tid) do { \
63 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \
64 FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \
65 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \
66 FW_WR_FLOWID_V(tid)); \
67 (w)->wr.wr_lo = cpu_to_be64(0); \
68 } while (0)
69
70 #define INIT_TP_WR_CPL(w, cpl, tid) do { \
71 INIT_TP_WR(w, tid); \
72 OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \
73 } while (0)
74
75 #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \
76 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \
77 FW_WR_ATOMIC_V(atomic)); \
78 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \
79 FW_WR_FLOWID_V(tid)); \
80 (w)->wr.wr_lo = cpu_to_be64(0); \
81 } while (0)
82
83 /* Special asynchronous notification message */
84 #define CXGB4_MSG_AN ((void *)1)
85 #define TX_ULD(uld)(((uld) != CXGB4_ULD_CRYPTO) ? CXGB4_TX_OFLD :\
86 CXGB4_TX_CRYPTO)
87
88 struct serv_entry {
89 void *data;
90 };
91
92 union aopen_entry {
93 void *data;
94 union aopen_entry *next;
95 };
96
97 struct eotid_entry {
98 void *data;
99 };
100
101 /*
102 * Holds the size, base address, free list start, etc of the TID, server TID,
103 * and active-open TID tables. The tables themselves are allocated dynamically.
104 */
105 struct tid_info {
106 void **tid_tab;
107 unsigned int tid_base;
108 unsigned int ntids;
109
110 struct serv_entry *stid_tab;
111 unsigned long *stid_bmap;
112 unsigned int nstids;
113 unsigned int stid_base;
114
115 unsigned int nhash;
116 unsigned int hash_base;
117
118 union aopen_entry *atid_tab;
119 unsigned int natids;
120 unsigned int atid_base;
121
122 struct filter_entry *hpftid_tab;
123 unsigned long *hpftid_bmap;
124 unsigned int nhpftids;
125 unsigned int hpftid_base;
126
127 struct filter_entry *ftid_tab;
128 unsigned long *ftid_bmap;
129 unsigned int nftids;
130 unsigned int ftid_base;
131 unsigned int aftid_base;
132 unsigned int aftid_end;
133 /* Server filter region */
134 unsigned int sftid_base;
135 unsigned int nsftids;
136
137 spinlock_t atid_lock ____cacheline_aligned_in_smp;
138 union aopen_entry *afree;
139 unsigned int atids_in_use;
140
141 spinlock_t stid_lock;
142 unsigned int stids_in_use;
143 unsigned int v6_stids_in_use;
144 unsigned int sftids_in_use;
145
146 /* ETHOFLD range */
147 struct eotid_entry *eotid_tab;
148 unsigned long *eotid_bmap;
149 unsigned int eotid_base;
150 unsigned int neotids;
151
152 /* TIDs in the TCAM */
153 atomic_t tids_in_use;
154 /* TIDs in the HASH */
155 atomic_t hash_tids_in_use;
156 atomic_t conns_in_use;
157 /* ETHOFLD TIDs used for rate limiting */
158 atomic_t eotids_in_use;
159
160 /* lock for setting/clearing filter bitmap */
161 spinlock_t ftid_lock;
162
163 unsigned int tc_hash_tids_max_prio;
164 };
165
lookup_tid(const struct tid_info * t,unsigned int tid)166 static inline void *lookup_tid(const struct tid_info *t, unsigned int tid)
167 {
168 tid -= t->tid_base;
169 return tid < t->ntids ? t->tid_tab[tid] : NULL;
170 }
171
tid_out_of_range(const struct tid_info * t,unsigned int tid)172 static inline bool tid_out_of_range(const struct tid_info *t, unsigned int tid)
173 {
174 return ((tid - t->tid_base) >= t->ntids);
175 }
176
lookup_atid(const struct tid_info * t,unsigned int atid)177 static inline void *lookup_atid(const struct tid_info *t, unsigned int atid)
178 {
179 return atid < t->natids ? t->atid_tab[atid].data : NULL;
180 }
181
lookup_stid(const struct tid_info * t,unsigned int stid)182 static inline void *lookup_stid(const struct tid_info *t, unsigned int stid)
183 {
184 /* Is it a server filter TID? */
185 if (t->nsftids && (stid >= t->sftid_base)) {
186 stid -= t->sftid_base;
187 stid += t->nstids;
188 } else {
189 stid -= t->stid_base;
190 }
191
192 return stid < (t->nstids + t->nsftids) ? t->stid_tab[stid].data : NULL;
193 }
194
cxgb4_insert_tid(struct tid_info * t,void * data,unsigned int tid,unsigned short family)195 static inline void cxgb4_insert_tid(struct tid_info *t, void *data,
196 unsigned int tid, unsigned short family)
197 {
198 t->tid_tab[tid - t->tid_base] = data;
199 if (t->hash_base && (tid >= t->hash_base)) {
200 if (family == AF_INET6)
201 atomic_add(2, &t->hash_tids_in_use);
202 else
203 atomic_inc(&t->hash_tids_in_use);
204 } else {
205 if (family == AF_INET6)
206 atomic_add(2, &t->tids_in_use);
207 else
208 atomic_inc(&t->tids_in_use);
209 }
210 atomic_inc(&t->conns_in_use);
211 }
212
cxgb4_lookup_eotid(struct tid_info * t,u32 eotid)213 static inline struct eotid_entry *cxgb4_lookup_eotid(struct tid_info *t,
214 u32 eotid)
215 {
216 return eotid < t->neotids ? &t->eotid_tab[eotid] : NULL;
217 }
218
cxgb4_get_free_eotid(struct tid_info * t)219 static inline int cxgb4_get_free_eotid(struct tid_info *t)
220 {
221 int eotid;
222
223 eotid = find_first_zero_bit(t->eotid_bmap, t->neotids);
224 if (eotid >= t->neotids)
225 eotid = -1;
226
227 return eotid;
228 }
229
cxgb4_alloc_eotid(struct tid_info * t,u32 eotid,void * data)230 static inline void cxgb4_alloc_eotid(struct tid_info *t, u32 eotid, void *data)
231 {
232 set_bit(eotid, t->eotid_bmap);
233 t->eotid_tab[eotid].data = data;
234 atomic_inc(&t->eotids_in_use);
235 }
236
cxgb4_free_eotid(struct tid_info * t,u32 eotid)237 static inline void cxgb4_free_eotid(struct tid_info *t, u32 eotid)
238 {
239 clear_bit(eotid, t->eotid_bmap);
240 t->eotid_tab[eotid].data = NULL;
241 atomic_dec(&t->eotids_in_use);
242 }
243
244 int cxgb4_alloc_atid(struct tid_info *t, void *data);
245 int cxgb4_alloc_stid(struct tid_info *t, int family, void *data);
246 int cxgb4_alloc_sftid(struct tid_info *t, int family, void *data);
247 void cxgb4_free_atid(struct tid_info *t, unsigned int atid);
248 void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family);
249 void cxgb4_remove_tid(struct tid_info *t, unsigned int qid, unsigned int tid,
250 unsigned short family);
251 struct in6_addr;
252
253 int cxgb4_create_server(const struct net_device *dev, unsigned int stid,
254 __be32 sip, __be16 sport, __be16 vlan,
255 unsigned int queue);
256 int cxgb4_create_server6(const struct net_device *dev, unsigned int stid,
257 const struct in6_addr *sip, __be16 sport,
258 unsigned int queue);
259 int cxgb4_remove_server(const struct net_device *dev, unsigned int stid,
260 unsigned int queue, bool ipv6);
261 int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid,
262 __be32 sip, __be16 sport, __be16 vlan,
263 unsigned int queue,
264 unsigned char port, unsigned char mask);
265 int cxgb4_remove_server_filter(const struct net_device *dev, unsigned int stid,
266 unsigned int queue, bool ipv6);
267
268 /* Filter operation context to allow callers of cxgb4_set_filter() and
269 * cxgb4_del_filter() to wait for an asynchronous completion.
270 */
271 struct filter_ctx {
272 struct completion completion; /* completion rendezvous */
273 void *closure; /* caller's opaque information */
274 int result; /* result of operation */
275 u32 tid; /* to store tid */
276 };
277
278 struct chcr_ktls {
279 refcount_t ktls_refcount;
280 };
281
282 struct ch_filter_specification;
283
284 int cxgb4_get_free_ftid(struct net_device *dev, u8 family, bool hash_en,
285 u32 tc_prio);
286 int __cxgb4_set_filter(struct net_device *dev, int filter_id,
287 struct ch_filter_specification *fs,
288 struct filter_ctx *ctx);
289 int __cxgb4_del_filter(struct net_device *dev, int filter_id,
290 struct ch_filter_specification *fs,
291 struct filter_ctx *ctx);
292 int cxgb4_set_filter(struct net_device *dev, int filter_id,
293 struct ch_filter_specification *fs);
294 int cxgb4_del_filter(struct net_device *dev, int filter_id,
295 struct ch_filter_specification *fs);
296 int cxgb4_get_filter_counters(struct net_device *dev, unsigned int fidx,
297 u64 *hitcnt, u64 *bytecnt, bool hash);
298
set_wr_txq(struct sk_buff * skb,int prio,int queue)299 static inline void set_wr_txq(struct sk_buff *skb, int prio, int queue)
300 {
301 skb_set_queue_mapping(skb, (queue << 1) | prio);
302 }
303
304 enum cxgb4_uld {
305 CXGB4_ULD_INIT,
306 CXGB4_ULD_RDMA,
307 CXGB4_ULD_ISCSI,
308 CXGB4_ULD_ISCSIT,
309 CXGB4_ULD_CRYPTO,
310 CXGB4_ULD_IPSEC,
311 CXGB4_ULD_TLS,
312 CXGB4_ULD_KTLS,
313 CXGB4_ULD_MAX
314 };
315
316 enum cxgb4_tx_uld {
317 CXGB4_TX_OFLD,
318 CXGB4_TX_CRYPTO,
319 CXGB4_TX_MAX
320 };
321
322 enum cxgb4_txq_type {
323 CXGB4_TXQ_ETH,
324 CXGB4_TXQ_ULD,
325 CXGB4_TXQ_CTRL,
326 CXGB4_TXQ_MAX
327 };
328
329 enum cxgb4_state {
330 CXGB4_STATE_UP,
331 CXGB4_STATE_START_RECOVERY,
332 CXGB4_STATE_DOWN,
333 CXGB4_STATE_DETACH,
334 CXGB4_STATE_FATAL_ERROR
335 };
336
337 enum cxgb4_control {
338 CXGB4_CONTROL_DB_FULL,
339 CXGB4_CONTROL_DB_EMPTY,
340 CXGB4_CONTROL_DB_DROP,
341 };
342
343 struct adapter;
344 struct pci_dev;
345 struct l2t_data;
346 struct net_device;
347 struct pkt_gl;
348 struct tp_tcp_stats;
349 struct t4_lro_mgr;
350
351 struct cxgb4_range {
352 unsigned int start;
353 unsigned int size;
354 };
355
356 struct cxgb4_virt_res { /* virtualized HW resources */
357 struct cxgb4_range ddp;
358 struct cxgb4_range iscsi;
359 struct cxgb4_range stag;
360 struct cxgb4_range rq;
361 struct cxgb4_range srq;
362 struct cxgb4_range pbl;
363 struct cxgb4_range qp;
364 struct cxgb4_range cq;
365 struct cxgb4_range ocq;
366 struct cxgb4_range key;
367 unsigned int ncrypto_fc;
368 struct cxgb4_range ppod_edram;
369 };
370
371 #if IS_ENABLED(CONFIG_CHELSIO_TLS_DEVICE)
372 struct ch_ktls_port_stats_debug {
373 atomic64_t ktls_tx_connection_open;
374 atomic64_t ktls_tx_connection_fail;
375 atomic64_t ktls_tx_connection_close;
376 atomic64_t ktls_tx_encrypted_packets;
377 atomic64_t ktls_tx_encrypted_bytes;
378 atomic64_t ktls_tx_ctx;
379 atomic64_t ktls_tx_ooo;
380 atomic64_t ktls_tx_skip_no_sync_data;
381 atomic64_t ktls_tx_drop_no_sync_data;
382 atomic64_t ktls_tx_drop_bypass_req;
383 };
384
385 struct ch_ktls_stats_debug {
386 struct ch_ktls_port_stats_debug ktls_port[MAX_ULD_NPORTS];
387 atomic64_t ktls_tx_send_records;
388 atomic64_t ktls_tx_end_pkts;
389 atomic64_t ktls_tx_start_pkts;
390 atomic64_t ktls_tx_middle_pkts;
391 atomic64_t ktls_tx_retransmit_pkts;
392 atomic64_t ktls_tx_complete_pkts;
393 atomic64_t ktls_tx_trimmed_pkts;
394 atomic64_t ktls_tx_fallback;
395 };
396 #endif
397
398 struct chcr_stats_debug {
399 atomic_t cipher_rqst;
400 atomic_t digest_rqst;
401 atomic_t aead_rqst;
402 atomic_t complete;
403 atomic_t error;
404 atomic_t fallback;
405 atomic_t tls_pdu_tx;
406 atomic_t tls_pdu_rx;
407 atomic_t tls_key;
408 };
409
410 #if IS_ENABLED(CONFIG_CHELSIO_IPSEC_INLINE)
411 struct ch_ipsec_stats_debug {
412 atomic_t ipsec_cnt;
413 };
414 #endif
415
416 #define OCQ_WIN_OFFSET(pdev, vres) \
417 (pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size))
418
419 /*
420 * Block of information the LLD provides to ULDs attaching to a device.
421 */
422 struct cxgb4_lld_info {
423 struct pci_dev *pdev; /* associated PCI device */
424 struct l2t_data *l2t; /* L2 table */
425 struct tid_info *tids; /* TID table */
426 struct net_device **ports; /* device ports */
427 const struct cxgb4_virt_res *vr; /* assorted HW resources */
428 const unsigned short *mtus; /* MTU table */
429 const unsigned short *rxq_ids; /* the ULD's Rx queue ids */
430 const unsigned short *ciq_ids; /* the ULD's concentrator IQ ids */
431 unsigned short nrxq; /* # of Rx queues */
432 unsigned short ntxq; /* # of Tx queues */
433 unsigned short nciq; /* # of concentrator IQ */
434 unsigned char nchan:4; /* # of channels */
435 unsigned char nports:4; /* # of ports */
436 unsigned char wr_cred; /* WR 16-byte credits */
437 unsigned char adapter_type; /* type of adapter */
438 unsigned char fw_api_ver; /* FW API version */
439 unsigned char crypto; /* crypto support */
440 unsigned int fw_vers; /* FW version */
441 unsigned int iscsi_iolen; /* iSCSI max I/O length */
442 unsigned int cclk_ps; /* Core clock period in psec */
443 unsigned short udb_density; /* # of user DB/page */
444 unsigned short ucq_density; /* # of user CQs/page */
445 unsigned int sge_host_page_size; /* SGE host page size */
446 unsigned short filt_mode; /* filter optional components */
447 unsigned short tx_modq[NCHAN]; /* maps each tx channel to a */
448 /* scheduler queue */
449 void __iomem *gts_reg; /* address of GTS register */
450 void __iomem *db_reg; /* address of kernel doorbell */
451 int dbfifo_int_thresh; /* doorbell fifo int threshold */
452 unsigned int sge_ingpadboundary; /* SGE ingress padding boundary */
453 unsigned int sge_egrstatuspagesize; /* SGE egress status page size */
454 unsigned int sge_pktshift; /* Padding between CPL and */
455 /* packet data */
456 unsigned int pf; /* Physical Function we're using */
457 bool enable_fw_ofld_conn; /* Enable connection through fw */
458 /* WR */
459 unsigned int max_ordird_qp; /* Max ORD/IRD depth per RDMA QP */
460 unsigned int max_ird_adapter; /* Max IRD memory per adapter */
461 bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */
462 unsigned int iscsi_tagmask; /* iscsi ddp tag mask */
463 unsigned int iscsi_pgsz_order; /* iscsi ddp page size orders */
464 unsigned int iscsi_llimit; /* chip's iscsi region llimit */
465 unsigned int ulp_crypto; /* crypto lookaside support */
466 void **iscsi_ppm; /* iscsi page pod manager */
467 int nodeid; /* device numa node id */
468 bool fr_nsmr_tpte_wr_support; /* FW supports FR_NSMR_TPTE_WR */
469 bool write_w_imm_support; /* FW supports WRITE_WITH_IMMEDIATE */
470 bool write_cmpl_support; /* FW supports WRITE_CMPL WR */
471 };
472
473 struct cxgb4_uld_info {
474 char name[IFNAMSIZ];
475 void *handle;
476 unsigned int nrxq;
477 unsigned int rxq_size;
478 unsigned int ntxq;
479 bool ciq;
480 bool lro;
481 void *(*add)(const struct cxgb4_lld_info *p);
482 int (*rx_handler)(void *handle, const __be64 *rsp,
483 const struct pkt_gl *gl);
484 int (*state_change)(void *handle, enum cxgb4_state new_state);
485 int (*control)(void *handle, enum cxgb4_control control, ...);
486 int (*lro_rx_handler)(void *handle, const __be64 *rsp,
487 const struct pkt_gl *gl,
488 struct t4_lro_mgr *lro_mgr,
489 struct napi_struct *napi);
490 void (*lro_flush)(struct t4_lro_mgr *);
491 int (*tx_handler)(struct sk_buff *skb, struct net_device *dev);
492 #if IS_ENABLED(CONFIG_CHELSIO_TLS_DEVICE)
493 const struct tlsdev_ops *tlsdev_ops;
494 #endif
495 #if IS_ENABLED(CONFIG_XFRM_OFFLOAD)
496 const struct xfrmdev_ops *xfrmdev_ops;
497 #endif
498 };
499
500 void cxgb4_uld_enable(struct adapter *adap);
501 void cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
502 int cxgb4_unregister_uld(enum cxgb4_uld type);
503 int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb);
504 int cxgb4_immdata_send(struct net_device *dev, unsigned int idx,
505 const void *src, unsigned int len);
506 int cxgb4_crypto_send(struct net_device *dev, struct sk_buff *skb);
507 unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo);
508 unsigned int cxgb4_port_chan(const struct net_device *dev);
509 unsigned int cxgb4_port_e2cchan(const struct net_device *dev);
510 unsigned int cxgb4_port_viid(const struct net_device *dev);
511 unsigned int cxgb4_tp_smt_idx(enum chip_type chip, unsigned int viid);
512 unsigned int cxgb4_port_idx(const struct net_device *dev);
513 unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu,
514 unsigned int *idx);
515 unsigned int cxgb4_best_aligned_mtu(const unsigned short *mtus,
516 unsigned short header_size,
517 unsigned short data_size_max,
518 unsigned short data_size_align,
519 unsigned int *mtu_idxp);
520 void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4,
521 struct tp_tcp_stats *v6);
522 void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,
523 const unsigned int *pgsz_order);
524 struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl,
525 unsigned int skb_len, unsigned int pull_len);
526 int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size);
527 int cxgb4_flush_eq_cache(struct net_device *dev);
528 int cxgb4_read_tpte(struct net_device *dev, u32 stag, __be32 *tpte);
529 u64 cxgb4_read_sge_timestamp(struct net_device *dev);
530
531 enum cxgb4_bar2_qtype { CXGB4_BAR2_QTYPE_EGRESS, CXGB4_BAR2_QTYPE_INGRESS };
532 int cxgb4_bar2_sge_qregs(struct net_device *dev,
533 unsigned int qid,
534 enum cxgb4_bar2_qtype qtype,
535 int user,
536 u64 *pbar2_qoffset,
537 unsigned int *pbar2_qid);
538
539 #endif /* !__CXGB4_ULD_H */
540