| /Documentation/devicetree/bindings/memory-controllers/ |
| D | atmel,ebi.txt | 83 - atmel,smc-ncs-rd-setup-ns
84 - atmel,smc-nrd-setup-ns
85 - atmel,smc-ncs-wr-setup-ns
86 - atmel,smc-nwe-setup-ns
87 - atmel,smc-ncs-rd-pulse-ns
88 - atmel,smc-nrd-pulse-ns
89 - atmel,smc-ncs-wr-pulse-ns
90 - atmel,smc-nwe-pulse-ns
91 - atmel,smc-nwe-cycle-ns
92 - atmel,smc-nrd-cycle-ns
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| D | ti,gpmc-child.yaml | 23 # GPMC Timing properties for child nodes. All are optional and default to 0.
26 default: 0
29 gpmc,cs-on-ns:
31 default: 0
33 gpmc,cs-rd-off-ns:
35 default: 0
37 gpmc,cs-wr-off-ns:
39 default: 0
42 gpmc,adv-on-ns:
44 default: 0
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| D | ti-aemif.txt | 25 first address cell and it may accept values 0..N-1
76 it can be in range [0-3]. For compatible
95 - ti,cs-min-turnaround-ns: minimum turn around time, ns
102 - ti,cs-read-setup-ns: read setup width, ns
105 Minimum value is 1 (0 treated as 1).
107 - ti,cs-read-strobe-ns: read strobe width, ns
110 Minimum value is 1 (0 treated as 1).
112 - ti,cs-read-hold-ns: read hold width, ns
117 Minimum value is 1 (0 treated as 1).
119 - ti,cs-write-setup-ns: write setup width, ns
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| D | st,stm32-fmc2-ebi-props.yaml | 17 0: Asynchronous mode 1 SRAM/FRAM.
30 minimum: 0
81 enum: [ 0, 128, 256, 512, 1024 ]
82 default: 0
84 st,fmc2-ebi-cs-byte-lane-setup-ns:
88 st,fmc2-ebi-cs-address-setup-ns:
92 st,fmc2-ebi-cs-address-hold-ns:
97 st,fmc2-ebi-cs-data-setup-ns:
101 st,fmc2-ebi-cs-bus-turnaround-ns:
105 st,fmc2-ebi-cs-data-hold-ns:
[all …]
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| D | rockchip,rk3399-dmc.yaml | 63 See also rockchip,pd-idle-ns.
72 See also rockchip,sr-idle-ns.
73 default: 0
83 See also rockchip,sr-mc-gate-idle-ns.
93 See also rockchip,srpd-lite-idle-ns.
102 See also rockchip,standby-idle-ns.
285 rockchip,pd-idle-ns:
291 rockchip,sr-idle-ns:
296 default: 0
298 rockchip,sr-mc-gate-idle-ns:
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| /Documentation/devicetree/bindings/i2c/ |
| D | hisilicon,ascend910-i2c.yaml | 35 i2c-sda-falling-time-ns:
38 i2c-scl-falling-time-ns:
41 i2c-sda-hold-time-ns:
44 i2c-scl-rising-time-ns:
47 i2c-digital-filter-width-ns:
48 default: 0
63 reg = <0x38b0000 0x10000>;
65 i2c-sda-falling-time-ns = <56>;
66 i2c-scl-falling-time-ns = <56>;
67 i2c-sda-hold-time-ns = <56>;
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| D | i2c-rk3x.yaml | 82 i2c-scl-rising-time-ns:
87 the maximum the specification allows(1000 ns for Standard-mode,
88 300 ns for Fast-mode) which might cause slightly slower communication.
90 i2c-scl-falling-time-ns:
95 be the maximum the specification allows (300 ns) which might cause
98 i2c-sda-falling-time-ns:
133 reg = <0x2002d000 0x1000>;
138 i2c-scl-falling-time-ns = <100>;
139 i2c-scl-rising-time-ns = <800>;
141 #size-cells = <0>;
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| D | snps,designware-i2c.yaml | 68 i2c-sda-hold-time-ns:
74 i2c-scl-falling-time-ns:
80 i2c-sda-falling-time-ns:
107 reg = <0xf0000 0x1000>;
114 reg = <0x1120000 0x1000>;
117 i2c-sda-hold-time-ns = <300>;
118 i2c-sda-falling-time-ns = <300>;
119 i2c-scl-falling-time-ns = <300>;
124 reg = <0x2000 0x100>;
126 #size-cells = <0>;
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| D | st,stm32-i2c.yaml | 24 i2c-scl-rising-time-ns:
27 i2c-scl-falling-time-ns:
119 #size-cells = <0>;
120 reg = <0x40005400 0x400>;
124 clocks = <&rcc 0 149>;
134 #size-cells = <0>;
135 reg = <0x40005800 0x400>;
152 #size-cells = <0>;
153 reg = <0x40013000 0x400>;
158 i2c-scl-rising-time-ns = <185>;
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| /Documentation/arch/m68k/ |
| D | buddha-driver.rst | 21 product number: 0 (42 for Catweasel Z-II)
22 Serial number: 0
41 $0-$7e Autokonfig-space, see Z-II docs.
48 $800-$8ff IDE-Select 0 (Port 0, Register set 0)
50 $900-$9ff IDE-Select 1 (Port 0, Register set 1)
52 $a00-$aff IDE-Select 2 (Port 1, Register set 0)
56 $c00-$cff IDE-Select 4 (Port 2, Register set 0,
67 level of the IRQ-line of IDE port 0.
98 chip. The addresses $0 to $fff of the rom
124 A6=1 (for example $840 for port 0, register set 0), a 780ns
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| /Documentation/trace/ |
| D | timerlat-tracer.rst | 36 <idle>-0 [000] d.h1 54.029328: #1 context irq timer_latency 932 ns
37 <...>-867 [000] .... 54.029339: #1 context thread timer_latency 11700 ns
38 <idle>-0 [001] dNh1 54.029346: #1 context irq timer_latency 2833 ns
39 <...>-868 [001] .... 54.029353: #1 context thread timer_latency 9820 ns
40 <idle>-0 [000] d.h1 54.030328: #2 context irq timer_latency 769 ns
41 <...>-867 [000] .... 54.030330: #2 context thread timer_latency 3070 ns
42 <idle>-0 [001] d.h1 54.030344: #2 context irq timer_latency 935 ns
43 <...>-868 [001] .... 54.030347: #2 context thread timer_latency 4351 ns
73 value happens. Writing 0 disables this option.
76 value happens. Writing 0 disables this option.
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| /Documentation/devicetree/bindings/mtd/partitions/ |
| D | linksys,ns-partitions.yaml | 4 $id: http://devicetree.org/schemas/mtd/partitions/linksys,ns-partitions.yaml#
25 const: linksys,ns-partitions
34 "^partition@[0-9a-f]+$":
39 - const: linksys,ns-firmware
52 compatible = "linksys,ns-partitions";
56 partition@0 {
58 reg = <0x0 0x100000>;
64 reg = <0x100000 0x100000>;
68 compatible = "linksys,ns-firmware", "brcm,trx";
69 reg = <0x200000 0xf00000>;
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| /Documentation/devicetree/bindings/mips/cavium/ |
| D | bootbus.txt | 32 - cavium,t-adr: A cell specifying the ADR timing (in nS).
34 - cavium,t-ce: A cell specifying the CE timing (in nS).
36 - cavium,t-oe: A cell specifying the OE timing (in nS).
38 - cavium,t-we: A cell specifying the WE timing (in nS).
40 - cavium,t-rd-hld: A cell specifying the RD_HLD timing (in nS).
42 - cavium,t-wr-hld: A cell specifying the WR_HLD timing (in nS).
44 - cavium,t-pause: A cell specifying the PAUSE timing (in nS).
46 - cavium,t-wait: A cell specifying the WAIT timing (in nS).
48 - cavium,t-page: A cell specifying the PAGE timing (in nS).
50 - cavium,t-rd-dly: A cell specifying the RD_DLY timing (in nS).
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| /Documentation/devicetree/bindings/mfd/ |
| D | brcm,cru.yaml | 21 - brcm,ns-cru
40 $ref: ../phy/bcm-ns-usb2-phy.yaml
43 $ref: ../pinctrl/brcm,ns-pinmux.yaml
49 $ref: ../thermal/brcm,ns-thermal.yaml
60 compatible = "brcm,ns-cru", "simple-mfd";
61 reg = <0x1800c100 0x1d0>;
69 reg = <0x100 0x14>;
77 reg = <0x140 0x24>;
84 compatible = "brcm,ns-usb2-phy";
85 reg = <0x164 0x4>;
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| /Documentation/devicetree/bindings/net/ |
| D | amlogic,meson-dwmac.yaml | 60 amlogic,tx-delay-ns:
64 nanoseconds. Allowed values are 0ns, 2ns, 4ns, 6ns.
66 explicitly configured. When not configured a fallback of 2ns is
69 this property should be set to 0ns (which disables the TX clock
74 amlogic,rx-delay-ns:
77 - 0
79 default: 0
85 default: 0
100 - 0
113 - 0
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| /Documentation/devicetree/bindings/phy/ |
| D | bcm-ns-usb3-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/bcm-ns-usb3-phy.yaml#
12 Known A0: BCM4707 rev 0
15 Known C0: BCM47094 rev 0
23 - brcm,ns-ax-usb3-phy
24 - brcm,ns-bx-usb3-phy
36 const: 0
50 #size-cells = <0>;
53 compatible = "brcm,ns-ax-usb3-phy";
54 reg = <0x10>;
56 #phy-cells = <0>;
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| D | bcm-ns-usb2-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/bcm-ns-usb2-phy.yaml#
18 const: brcm,ns-usb2-phy
45 const: 0
66 compatible = "brcm,ns-usb2-phy";
67 reg = <0x1800c164 0x4>;
71 #phy-cells = <0>;
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| /Documentation/devicetree/bindings/opp/ |
| D | allwinner,sun50i-h6-operating-points.yaml | 44 "^opp-[0-9]+$":
49 clock-latency-ns: true
52 "^opp-microvolt-speed[0-9]$": true
72 clock-latency-ns = <244144>; /* 8 32k periods */
81 clock-latency-ns = <244144>; /* 8 32k periods */
90 clock-latency-ns = <244144>; /* 8 32k periods */
99 clock-latency-ns = <244144>; /* 8 32k periods */
108 clock-latency-ns = <244144>; /* 8 32k periods */
117 clock-latency-ns = <244144>; /* 8 32k periods */
126 clock-latency-ns = <244144>; /* 8 32k periods */
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| D | opp-v2.yaml | 29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
36 clocks = <&clk_controller 0>;
47 clocks = <&clk_controller 0>;
62 clock-latency-ns = <300000>;
69 clock-latency-ns = <310000>;
74 clock-latency-ns = <290000>;
86 #size-cells = <0>;
88 cpu@0 {
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| D | opp-v2-kryo-cpu.yaml | 41 '^opp-?[0-9]+$':
54 0: MSM8996, speedbin 0
61 0-3: unused
62 4: MSM8996SG, speedbin 0
66 enum: [0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7,
67 0x9, 0xd, 0xe, 0xf,
68 0x10, 0x20, 0x30, 0x70]
70 clock-latency-ns: true
85 '^opp-?[0-9]+$':
101 #size-cells = <0>;
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| /Documentation/devicetree/bindings/thermal/ |
| D | brcm,ns-thermal.yaml | 4 $id: http://devicetree.org/schemas/thermal/brcm,ns-thermal.yaml#
20 const: brcm,ns-thermal
27 const: 0
37 compatible = "brcm,ns-thermal";
38 reg = <0x1800c2c0 0x10>;
39 #thermal-sensor-cells = <0>;
44 polling-delay-passive = <0>;
52 hysteresis = <0>;
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| /Documentation/devicetree/bindings/reserved-memory/ |
| D | nvidia,tegra264-bpmp-shmem.yaml | 7 title: Tegra CPU-NS - BPMP IPC reserved memory
13 Define a memory region used for communication between CPU-NS and BPMP.
15 has to be known to both CPU-NS and BPMP for correct IPC operation.
43 reg = <0x0 0xf1be0000 0x0 0x2000>;
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| /Documentation/devicetree/bindings/cpufreq/ |
| D | apple,cluster-cpufreq.yaml | 35 const: 0
51 #size-cells = <0>;
53 cpu@0 {
56 reg = <0x0 0x0>;
64 reg = <0x0 0x10100>;
70 ecluster_opp: opp-table-0 {
77 clock-latency-ns = <7500>;
82 clock-latency-ns = <22000>;
93 clock-latency-ns = <8000>;
98 clock-latency-ns = <19000>;
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| /Documentation/devicetree/bindings/iio/frequency/ |
| D | adi,adf4350.yaml | 63 adi,lock-detect-precision-6ns-enable:
65 description: Enables 6ns lock detect precision. Default = 10ns.
78 minimum: 0
83 0: Three-State Output (default)
104 adi,anti-backlash-3ns-enable:
107 Enables 3ns antibacklash pulse width for integer-N modes.
116 Clock divider value used when adi,12bit-clkdiv-mode != 0
120 enum: [0, 1, 2]
123 0: Clock divider off (default)
143 enum: [0, 1, 2, 3]
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | fsl-mx25-tcq.txt | 10 the tscadc unit (<0>).
14 - fsl,pen-debounce-ns: Pen debounce time in nanoseconds.
20 - fsl,settling-time-ns: Settling time in nanoseconds. The settling time is before
30 reg = <0x50030400 0x60>;
32 interrupts = <0>;
|