Searched +full:0 +full:x1 (Results 1 – 25 of 271) sorted by relevance
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| /Documentation/devicetree/bindings/dma/ |
| D | brcm,iproc-sba.txt | 21 mboxes = <&raid_mbox 0 0x1 0xffff>,
22 <&raid_mbox 1 0x1 0xffff>,
23 <&raid_mbox 2 0x1 0xffff>,
24 <&raid_mbox 3 0x1 0xffff>,
25 <&raid_mbox 4 0x1 0xffff>,
26 <&raid_mbox 5 0x1 0xffff>,
27 <&raid_mbox 6 0x1 0xffff>,
28 <&raid_mbox 7 0x1 0xffff>;
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| D | st,stm32-dma.yaml | 20 0x0: no address increment between transfers
21 0x1: increment address between transfers
23 0x0: no address increment between transfers
24 0x1: increment address between transfers
26 0x0: offset size is linked to the peripheral bus width
27 0x1: offset size is fixed to 4 (32-bit alignment)
29 0x0: low
30 0x1: medium
31 0x2: high
32 0x3: very high
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| D | st_fdma.txt | 27 reg = <0x8e20000 0x8000>,
28 <0x8e30000 0x3000>,
29 <0x8e37000 0x1000>,
30 <0x8e38000 0x8000>;
51 -bit 2-0: Holdoff value, dreq will be masked for
52 0x0: 0-0.5us
53 0x1: 0.5-1us
54 0x2: 1-1.5us
56 0x0: disabled
57 0x1: enabled
[all …]
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| /Documentation/devicetree/bindings/sound/ |
| D | qcom,pm8916-wcd-analog-codec.yaml | 110 reg = <0x1 SPMI_USID>;
112 #size-cells = <0>;
116 reg = <0xf000>;
120 interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
121 <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
122 <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
123 <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
124 <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
125 <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
126 <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
[all …]
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| /Documentation/input/devices/ |
| D | alps.rst | 32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
45 The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
94 byte 0: 0 0 YSGN XSGN 1 M R L
95 byte 1: X7 X6 X5 X4 X3 X2 X1 X0
109 byte 0: 1 0 0 0 1 x9 x8 x7
110 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
111 byte 2: 0 ? ? l r ? fin ges
112 byte 3: 0 ? ? ? ? y9 y8 y7
113 byte 4: 0 y6 y5 y4 y3 y2 y1 y0
[all …]
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| /Documentation/devicetree/bindings/pci/ |
| D | cdns,cdns-pcie-host.yaml | 47 bus-range = <0x0 0xff>;
48 linux,pci-domain = <0>;
49 vendor-id = <0x17cd>;
50 device-id = <0x0200>;
52 reg = <0x0 0xfb000000 0x0 0x01000000>,
53 <0x0 0x41000000 0x0 0x00001000>;
56 ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
57 <0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
58 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
60 #interrupt-cells = <0x1>;
[all …]
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| D | pci-msi.txt | 13 * Bits [2:0] are the Function number.
67 reg = <0xa 0x1>;
74 reg = <0xf 0x1>;
82 msi-map = <0x0 &msi_a 0x0 0x10000>,
95 reg = <0xa 0x1>;
102 reg = <0xf 0x1>;
110 msi-map = <0x0 &msi_a 0x0 0x100>,
111 msi-map-mask = <0xff>
124 reg = <0xa 0x1>;
131 reg = <0xf 0x1>;
[all …]
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| D | pci-iommu.txt | 13 * Bits [2:0] are the Function number.
56 reg = <0xa 0x1>;
62 reg = <0xf 0x1>;
70 iommu-map = <0x0 &iommu 0x0 0x10000>;
83 reg = <0xa 0x1>;
89 reg = <0xf 0x1>;
97 iommu-map = <0x0 &iommu 0x0 0x10000>;
98 iommu-map-mask = <0xfff8>;
111 reg = <0xa 0x1>;
117 reg = <0xf 0x1>;
[all …]
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| D | host-generic-pci.yaml | 94 property. If no "bus-range" is specified, this will be bus 0 (the
156 bus-range = <0x0 0x1>;
159 reg = <0x0 0x40000000 0x0 0x1000000>;
162 ranges = <0x01000000 0x0 0x01000000 0x0 0x01000000 0x0 0x00010000>,
163 <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x3f000000>;
165 #interrupt-cells = <0x1>;
168 interrupt-map = < 0x0 0x0 0x0 0x1 &gic 0x0 0x4 0x1>,
169 < 0x800 0x0 0x0 0x1 &gic 0x0 0x5 0x1>,
170 <0x1000 0x0 0x0 0x1 &gic 0x0 0x6 0x1>,
171 <0x1800 0x0 0x0 0x1 &gic 0x0 0x7 0x1>;
[all …]
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| D | xgene-pci.txt | 35 reg = < 0x00 0x1f2b0000 0x0 0x00010000 /* Controller registers */
36 0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */
38 ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000 /* io */
39 0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */
40 dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
41 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
42 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
43 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
44 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
45 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
[all …]
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| D | xgene-pci-msi.txt | 8 - reg: physical base address (0x79000000) and length (0x900000) for controller
13 interrupt number 0x10 to 0x1f.
27 reg = <0x00 0x79000000 0x0 0x900000>;
28 interrupts = <0x0 0x10 0x4>
29 <0x0 0x11 0x4>
30 <0x0 0x12 0x4>
31 <0x0 0x13 0x4>
32 <0x0 0x14 0x4>
33 <0x0 0x15 0x4>
34 <0x0 0x16 0x4>
[all …]
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| /Documentation/gpu/ |
| D | afbc.rst | 31 * Component 0: R
36 fourcc:modifier pair. In general, component '0' is considered to
42 * Component 0: R(8)
49 * Component 0: R(8)
55 * Component 0: Y(8)
56 * Component 1: Cb(8, 2x1 subsampled)
57 * Component 2: Cr(8, 2x1 subsampled)
65 * Component 0: R(8)
94 * Plane 0:
96 * Component 0: Y(8)
[all …]
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| /Documentation/devicetree/bindings/mailbox/ |
| D | brcm,iproc-flexrm-mbox.txt | 45 reg = <0x67000000 0x200000>;
46 msi-parent = <&gic_its 0x7f00>;
52 reg = <0x672c0000 0x1000>;
53 mboxes = <&crypto_mbox 0 0x1 0xffff>,
54 <&crypto_mbox 1 0x1 0xffff>,
55 <&crypto_mbox 16 0x1 0xffff>,
56 <&crypto_mbox 17 0x1 0xffff>,
57 <&crypto_mbox 30 0x1 0xffff>,
58 <&crypto_mbox 31 0x1 0xffff>;
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-xgene-sb.txt | 25 0 = active high
30 - first cell is 0-N corresponding for EXT_INT_0 to EXT_INT_N.
40 reg = <0x0 0x17001000 0x0 0x400>;
43 interrupts = <0x0 0x28 0x1>,
44 <0x0 0x29 0x1>,
45 <0x0 0x2a 0x1>,
46 <0x0 0x2b 0x1>,
47 <0x0 0x2c 0x1>,
48 <0x0 0x2d 0x1>;
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| D | gpio-clps711x.txt | 11 0 = active high
25 reg = <0x80000000 0x1>, <0x80000040 0x1>;
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| /Documentation/devicetree/bindings/nvmem/ |
| D | mediatek,efuse.yaml | 22 pattern: "^efuse@[0-9a-f]+$"
55 reg = <0x11c10000 0x1000>;
60 reg = <0x184 0x1>;
61 bits = <0 5>;
64 reg = <0x184 0x2>;
68 reg = <0x185 0x1>;
72 reg = <0x186 0x1>;
73 bits = <0 5>;
76 reg = <0x186 0x2>;
80 reg = <0x187 0x1>;
[all …]
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| /Documentation/devicetree/bindings/arm/ |
| D | ste-nomadik.txt | 31 gpios = <&gpio3 19 0x1>;
32 interrupts = <19 0x1>;
36 gpios = <&gpio3 16 0x1>;
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| /Documentation/userspace-api/media/v4l/ |
| D | subdev-image-processing-full.svg | 9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
39 inkscape:pageopacity="0"
45 fit-margin-top="0"
46 fit-margin-left="0"
47 fit-margin-right="0"
48 fit-margin-bottom="0"
67 style="fill:none;fill-opacity:0;stroke:#ff765a;stroke-width:2"
75 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
91 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
97 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
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| D | subdev-image-processing-scaling-multi-source.svg | 9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
39 inkscape:pageopacity="0"
45 fit-margin-top="0"
46 fit-margin-left="0"
47 fit-margin-right="0"
48 fit-margin-bottom="0"
57 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
74 style="fill:none;fill-opacity:0;stroke:#a52a2a;stroke-width:2"
92 style="fill:none;fill-opacity:0;stroke:#0000ff;stroke-width:2"
152 style="fill:none;fill-opacity:0;stroke:#00ff00;stroke-width:2"
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| /Documentation/devicetree/bindings/mfd/ |
| D | st,stm32-timers.yaml | 68 const: 0
89 "index" indicates on which break input (0 or 1) the
91 enum: [0, 1]
93 "level" gives the active level (0=low or 1=high) of the
95 enum: [0, 1]
118 "^timer@[0-9]+$":
131 minimum: 0
151 #size-cells = <0>;
153 reg = <0x40000000 0x400>;
156 dmas = <&dmamux1 18 0x400 0x1>,
[all …]
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | google,goldfish-pic.txt | 15 #interrupt-cells = <0x1>;
16 #address-cells = <0>;
23 reg = <0x1f000000 0x1000>;
26 #interrupt-cells = <0x1>;
29 interrupts = <0x2>;
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| /Documentation/devicetree/bindings/fpga/ |
| D | lattice-machxo2-spi.txt | 17 #address-cells = <0x1>;
18 #size-cells = <0x1>;
24 fpga_mgr_spi: fpga-mgr@0 {
27 reg = <0>;
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| /Documentation/devicetree/bindings/rtc/ |
| D | st,m48t86.yaml | 35 reg = <0x10800000 0x1>, <0x11700000 0x1>;
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| /Documentation/devicetree/bindings/thermal/ |
| D | amazon,al-thermal.txt | 14 reg = <0x0 0x05002860 0x0 0x1>;
15 #thermal-sensor-cells = <0x1>;
22 thermal-sensors = <&thermal 0>;
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| /Documentation/powerpc/ |
| D | ptrace.rst | 44 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
45 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
46 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
47 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
48 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
49 #define PPC_DEBUG_FEATURE_DATA_BP_ARCH_31 0x20
57 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
58 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
59 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
61 #define PPC_BREAKPOINT_MODE_EXACT 0x0
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