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/Documentation/devicetree/bindings/mfd/
Dsprd,ums512-glbreg.yaml39 "^clock-controller@[0-9a-f]+$":
55 reg = <0x71000000 0x3000>;
58 ranges = <0 0x71000000 0x3000>;
60 clock-controller@0 {
62 reg = <0x0 0x2000>;
70 reg = <0x32360000 0x1000>;
/Documentation/devicetree/bindings/gpio/
Dgpio-thunderx.txt20 gpio_6_0: gpio@6,0 {
22 reg = <0x3000 0 0 0 0>; /* DEVFN = 0x30 (6:0) */
Dgpio-virtio.yaml47 reg = <0x3000 0x100>;
/Documentation/devicetree/bindings/i2c/
Di2c-virtio.yaml35 reg = <0x3000 0x100>;
42 #size-cells = <0>;
46 reg = <0x20>;
/Documentation/devicetree/bindings/virtio/
Dvirtio-device.yaml19 pattern: "^virtio,device[0-9a-f]{1,8}$"
34 reg = <0x3000 0x100>;
Dmmio.yaml52 reg = <0x3000 0x100>;
61 reg = <0x3100 0x100>;
/Documentation/devicetree/bindings/interrupt-controller/
Dsnps,dw-apb-ictl.txt20 - 0 maps to bit 0 of low interrupts,
22 - 32 maps to bit 0 of high interrupts,
30 reg = <0x3000 0xc00>;
40 reg = <0x10130000 0x1000>;
Drealtek,rtl-intc.yaml67 const: 0
83 reg = <0x3000 0x18>;
/Documentation/devicetree/bindings/display/
Dintel,keembay-display.yaml60 reg = <0x20930000 0x3000>;
63 clocks = <&scmi_clk 0x83>,
64 <&scmi_clk 0x0>;
/Documentation/admin-guide/media/
Ddvb-usb-dw2102-cardlist.rst11 :stub-columns: 0
15 * - DVBWorld DVB-C 3101 USB2.0
17 * - DVBWorld DVB-S 2101 USB2.0
18 - 04b4:0x2101
19 * - DVBWorld DVB-S 2102 USB2.0
21 * - DVBWorld DW2104 USB2.0
24 - 0x1FE1:5456
25 * - Geniatech T220 DVB-T/T2 USB2.0
26 - 0x1f4d:0xD220
27 * - SU3000HD DVB-S USB2.0
[all …]
/Documentation/devicetree/bindings/net/
Ddavinci_emac.txt32 reg = <0x220000 0x4000>;
33 ti,davinci-ctrl-reg-offset = <0x3000>;
34 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
35 ti,davinci-ctrl-ram-offset = <0>;
36 ti,davinci-ctrl-ram-size = <0x2000>;
/Documentation/devicetree/bindings/pci/
Dqcom,pcie-ep.yaml187 reg = <0x01c00000 0x3000>,
188 <0x40000000 0xf1d>,
189 <0x40000f20 0xc8>,
190 <0x40001000 0x1000>,
191 <0x40002000 0x1000>,
192 <0x01c03000 0x3000>;
206 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
Dti-pci.txt74 ranges = <0x51000000 0x51000000 0x3000
75 0x0 0x20000000 0x10000000>;
78 reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
80 interrupts = <0 232 0x4>, <0 233 0x4>;
84 ranges = <0x81000000 0 0 0x03000 0 0x00010000
85 0x82000000 0 0x20013000 0x13000 0 0xffed000>;
91 interrupt-map-mask = <0 0 0 7>;
92 interrupt-map = <0 0 0 1 &pcie_intc 1>,
93 <0 0 0 2 &pcie_intc 2>,
94 <0 0 0 3 &pcie_intc 3>,
[all …]
/Documentation/devicetree/bindings/ufs/
Dsprd,ums9620-ufs.yaml67 reg = <0x22000000 0x3000>;
/Documentation/devicetree/bindings/media/
Dmediatek,mdp3-rsz.yaml63 reg = <0x14003000 0x1000>;
64 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>;
72 reg = <0x14004000 0x1000>;
73 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>;
/Documentation/devicetree/bindings/dma/
Dst_fdma.txt27 reg = <0x8e20000 0x8000>,
28 <0x8e30000 0x3000>,
29 <0x8e37000 0x1000>,
30 <0x8e38000 0x8000>;
51 -bit 2-0: Holdoff value, dreq will be masked for
52 0x0: 0-0.5us
53 0x1: 0.5-1us
54 0x2: 1-1.5us
56 0x0: disabled
57 0x1: enabled
[all …]
/Documentation/devicetree/bindings/pinctrl/
Dst,stm32-pinctrl.yaml54 - description: The field mask of IRQ mux, needed if different of 0xf
61 enum: [0x1, 0x2, 0x4, 0x8, 0x100, 0x400, 0x800]
64 '^gpio@[0-9a-f]*$':
114 minimum: 0
118 "^(.+-hog(-[0-9]+)?)$":
130 '-[0-9]*$':
152 - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
153 - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
155 * 0 : GPIO
156 * 1 : Alternate Function 0
[all …]
/Documentation/devicetree/bindings/iommu/
Dqcom,iommu.yaml64 "^iommu-ctx@[0-9a-f]+$":
109 reg = <0x01ef0000 0x3000>;
117 ranges = <0 0x01e20000 0x40000>;
122 reg = <0x4000 0x1000>;
/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,color.yaml88 reg = <0 0x14013000 0 0x1000>;
92 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x3000 0x1000>;
/Documentation/devicetree/bindings/soc/ti/
Dti,pruss.yaml36 0x0, but also has access to a secondary Data RAM (primary to the other PRU
37 core) at its address 0x2000. A shared Data RAM, if present, can be accessed
60 pattern: "^(pruss|icssg)@[0-9a-f]+$"
65 - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0
161 const: 0
175 const: 0
209 const: 0
297 "^(pru|rtu|txpru)@[0-9a-f]+$":
350 pruss: pruss@0 {
352 reg = <0x0 0x80000>;
[all …]
/Documentation/devicetree/bindings/phy/
Dqcom,msm8996-qmp-pcie-phy.yaml57 "^phy@[0-9a-f]+$":
92 const: 0
98 const: 0
130 reg = <0x34000 0x488>;
133 ranges = <0x0 0x34000 0x4000>;
149 reg = <0x1000 0x130>,
150 <0x1200 0x200>,
151 <0x1400 0x1dc>;
156 #clock-cells = <0>;
159 #phy-cells = <0>;
[all …]
/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop2.yaml48 - description: Pixel clock for video port 0.
69 port@0:
111 reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
128 #size-cells = <0>;
129 vp0: port@0 {
130 reg = <0>;
132 #size-cells = <0>;
137 #size-cells = <0>;
142 #size-cells = <0>;
/Documentation/devicetree/bindings/usb/
Dmediatek,mtu3.yaml203 "^usb@[0-9a-f]+$":
237 reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
249 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
256 reg = <0x11270000 0x1000>;
273 reg = <0x112c1000 0x3000>, <0x112d0700 0x0100>;
288 reg = <0x11270000 0x1000>;
308 reg = <0x11201000 0x2e00>, <0x11203e00 0x0100>;
314 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
325 reg = <0x11200000 0x1000>;
/Documentation/devicetree/bindings/sound/
Ddavinci-mcasp-audio.yaml35 description: 0 - I2S or 1 - DIT operation mode
37 - 0
52 0 - Inactive, 1 - TX, 2 - RX
58 minimum: 0
83 0 disables the FIFO use
90 0 disables the FIFO use
97 0 - 3-state, 2 - logic low, 3 - logic high
99 - 0
154 const: 0
175 - 0
[all …]
/Documentation/devicetree/bindings/clock/
Dtesla,fsd-clock.yaml187 reg = <0x16810000 0x3000>;

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