Searched +full:0 +full:x8000 (Results 1 – 25 of 71) sorted by relevance
123
| /Documentation/devicetree/bindings/pci/ |
| D | pci-msi.txt | 13 * Bits [2:0] are the Function number.
67 reg = <0xa 0x1>;
74 reg = <0xf 0x1>;
82 msi-map = <0x0 &msi_a 0x0 0x10000>,
95 reg = <0xa 0x1>;
102 reg = <0xf 0x1>;
110 msi-map = <0x0 &msi_a 0x0 0x100>,
111 msi-map-mask = <0xff>
124 reg = <0xa 0x1>;
131 reg = <0xf 0x1>;
[all …]
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| D | pci-iommu.txt | 13 * Bits [2:0] are the Function number.
56 reg = <0xa 0x1>;
62 reg = <0xf 0x1>;
70 iommu-map = <0x0 &iommu 0x0 0x10000>;
83 reg = <0xa 0x1>;
89 reg = <0xf 0x1>;
97 iommu-map = <0x0 &iommu 0x0 0x10000>;
98 iommu-map-mask = <0xfff8>;
111 reg = <0xa 0x1>;
117 reg = <0xf 0x1>;
[all …]
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| /Documentation/networking/device_drivers/ethernet/mellanox/mlx5/ |
| D | tracepoints.rst | 36 …tc-6546 [010] ...1 2679.704889: mlx5e_stats_flower: cookie=0000000060eb3d6a bytes=0 packets=0 la…
59 …: mlx5_esw_bridge_fdb_entry_init: net_device=enp8s0f0_0 addr=e4:fd:05:08:00:02 vid=0 flags=0 used=0
66 …x5_esw_bridge_fdb_entry_cleanup: net_device=enp8s0f0_1 addr=e4:fd:05:08:00:03 vid=0 flags=0 used=16
74 …lx5_esw_bridge_fdb_entry_refresh: net_device=enp8s0f0_0 addr=e4:fd:05:08:00:02 vid=3 flags=0 used=0
115 … mlx5_esw_vport_qos_create: (0000:82:00.0) vport=2 tsar_ix=4 bw_share=0, max_rate=0 group=00000000…
159 …..... 24610.188722: mlx5_sf_add: (0000:06:00.0) port_index=32768 controller=0 hw_id=0x8000 sfnum=88
166 … [038] ..... 26300.404749: mlx5_sf_free: (0000:06:00.0) port_index=32768 controller=0 hw_id=0x8000
173 …08] ..... 3669.635095: mlx5_sf_activate: (0000:08:00.0) port_index=32768 controller=0 hw_id=0x8000
180 …] ..... 4015.969467: mlx5_sf_deactivate: (0000:08:00.0) port_index=32768 controller=0 hw_id=0x8000
187 …5 [031] ..... 26296.385259: mlx5_sf_hwc_alloc: (0000:06:00.0) controller=0 hw_id=0x8000 sfnum=88
[all …]
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| /Documentation/devicetree/bindings/mailbox/ |
| D | sprd-mailbox.yaml | 62 reg = <0x400a0000 0x8000>, <0x400a8000 0x8000>;
|
| /Documentation/devicetree/bindings/soc/dove/ |
| D | pmu.txt | 24 - #power-domain-cells: must be 0.
35 reg = <0xd0000 0x8000>, <0xd8000 0x8000>;
43 #power-domain-cells = <0>;
44 marvell,pmu_pwr_mask = <0x00000008>;
45 marvell,pmu_iso_mask = <0x00000001>;
50 #power-domain-cells = <0>;
51 marvell,pmu_pwr_mask = <0x00000004>;
52 marvell,pmu_iso_mask = <0x00000002>;
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| /Documentation/devicetree/bindings/media/ |
| D | allegro,al5e.yaml | 77 reg = <0 0xa0009000 0 0x1000>,
78 <0 0xa0000000 0 0x8000>;
80 interrupts = <0 96 4>;
81 clocks = <&xlnx_vcu 0>, <&xlnx_vcu 1>,
94 reg = <0 0xa0029000 0 0x1000>,
95 <0 0xa0020000 0 0x8000>;
97 interrupts = <0 96 4>;
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| D | renesas,vsp1.yaml | 106 reg = <0xfe928000 0x8000>;
121 reg = <0xfe920000 0x8000>;
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | ti,davinci-rproc.txt | 60 reg = <0xc3000000 0x1000000>;
69 reg = <0x11800000 0x40000>,
70 <0x11e00000 0x8000>,
71 <0x11f00000 0x8000>,
72 <0x01c14044 0x4>,
73 <0x01c14174 0x8>;
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| /Documentation/devicetree/bindings/dma/ |
| D | st_fdma.txt | 27 reg = <0x8e20000 0x8000>,
28 <0x8e30000 0x3000>,
29 <0x8e37000 0x1000>,
30 <0x8e38000 0x8000>;
51 -bit 2-0: Holdoff value, dreq will be masked for
52 0x0: 0-0.5us
53 0x1: 0.5-1us
54 0x2: 1-1.5us
56 0x0: disabled
57 0x1: enabled
[all …]
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| D | sifive,fu540-c000-pdma.yaml | 23 https://static.dev.sifive.com/FU540-C000-v1.0.pdf
68 reg = <0x3000000 0x8000>;
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| /Documentation/devicetree/bindings/clock/ti/davinci/ |
| D | psc.txt | 34 reg = <0x10000 0x1000>;
45 reg = <0x227000 0x1000>;
55 reg = <0x11800000 0x40000>,
56 <0x11e00000 0x8000>,
57 <0x11f00000 0x8000>,
58 <0x01c14044 0x4>,
59 <0x01c14174 0x8>;
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| /Documentation/devicetree/bindings/power/ |
| D | renesas,sysc-rmobile.yaml | 45 const: 0
77 const: 0
80 const: 0
95 reg = <0xe6180000 0x8000>, <0xe6188000 0x8000>;
100 #size-cells = <0>;
101 #power-domain-cells = <0>;
106 #size-cells = <0>;
107 #power-domain-cells = <0>;
111 #power-domain-cells = <0>;
117 #power-domain-cells = <0>;
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| D | mti,mips-cpc.yaml | 35 reg = <0x1bde0000 0x8000>;
|
| /Documentation/devicetree/bindings/sound/ |
| D | mtk-btcvsd-snd.txt | 19 reg=<0 0x18000000 0 0x1000>,
20 <0 0x18080000 0 0x8000>;
23 mediatek,offset = <0xf00 0x800 0xfd0 0xfd4 0xfd8>;
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| D | hisilicon,hi6210-i2s.txt | 21 0: S2 interface
29 reg = <0x0 0xf7118000 0x0 0x8000>; /* i2s unit */
41 sound-dai = <&i2s0 0>; /* index 0 => S2 interface */
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| /Documentation/devicetree/bindings/bus/ |
| D | mti,mips-cdmm.yaml | 35 reg = <0x1bde8000 0x8000>;
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| /Documentation/devicetree/bindings/crypto/ |
| D | qcom,inline-crypto-engine.yaml | 40 reg = <0x01d88000 0x8000>;
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| /Documentation/devicetree/bindings/phy/ |
| D | renesas,rcar-gen3-pcie-phy.yaml | 29 const: 0
48 reg = <0xe65d0000 0x8000>;
49 #phy-cells = <0>;
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| /Documentation/devicetree/bindings/clock/ |
| D | qcom,sc7180-mss.yaml | 52 reg = <0x041a8000 0x8000>;
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| /Documentation/devicetree/bindings/nvmem/ |
| D | fsl,layerscape-sfp.yaml | 58 reg = <0x1e80000 0x8000>;
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| /Documentation/devicetree/bindings/net/ |
| D | stm32-dwmac.yaml | 113 reg = <0x5800a000 0x2000>;
127 st,syscon = <&syscfg 0x4>;
138 reg = <0x40028000 0x8000>;
140 interrupts = <0 61 0>, <0 62 0>;
143 clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
144 st,syscon = <&syscfg 0x4>;
154 reg = <0x40028000 0x8000>;
160 st,syscon = <&syscfg 0x4>;
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| /Documentation/devicetree/bindings/dsp/ |
| D | fsl,dsp.yaml | 155 reg = <0x596e8000 0x88000>;
165 mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
171 reg = <0x92400000 0x1000000>;
175 reg = <0x942f0000 0x8000>;
179 reg = <0x942f8000 0x8000>;
184 reg = <0x94300000 0x100000>;
190 reg = <0x3b6e8000 0x88000>;
199 mboxes = <&mu2 0 0>,
200 <&mu2 1 0>,
201 <&mu2 3 0>;
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| /Documentation/devicetree/bindings/mtd/ |
| D | intel,lgm-ebunand.yaml | 48 minimum: 0
70 reg = <0xe0f00000 0x100>,
71 <0xe1000000 0x300>,
72 <0xe1400000 0x8000>,
73 <0xe1c00000 0x1000>,
74 <0x17400000 0x4>,
75 <0x17c00000 0x4>;
82 #size-cells = <0>;
84 nand@0 {
85 reg = <0>;
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | ingenic,jz4780-hdmi.yaml | 33 port@0:
56 reg = <0x10180000 0x8000>;
65 #size-cells = <0>;
66 hdmi_in: port@0 {
67 reg = <0>;
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| /Documentation/devicetree/bindings/usb/ |
| D | brcm,usb-pinmap.yaml | 63 reg = <0x22000d0 0x4>;
64 in-gpios = <&gpio 18 0>, <&gpio 19 0>;
66 brcm,in-masks = <0x8000 0x40000 0x10000 0x80000>;
67 out-gpios = <&gpio 20 0>;
69 brcm,out-masks = <0x20000 0x800000 0x400000 0x200000>;
70 interrupts = <0x0 0xb2 0x4>;
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