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| /Documentation/trace/coresight/ |
| D | coresight-config.rst | 4 CoreSight System Configuration Manager
13 The CoreSight System Configuration manager is an API that allows the
26 This section introduces the basic concepts of a CoreSight system configuration.
38 CoreSight device is registered with the configuration manager.
49 A feature is enabled as part of a configuration being enabled on the system.
76 A configuration defines a set of features that are to be used in a trace
77 session where the configuration is selected. For any trace session only one
78 configuration may be selected.
81 to support system configuration. A configuration may select features to be
85 As with the feature, a descriptor is used to define the configuration.
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-bindings.txt | 3 Hardware modules that control pin multiplexing or configuration parameters
8 Hardware modules whose signals are affected by pin configuration are
14 single static pin configuration, e.g. set up during initialization. Others
22 configuration used by those states.
26 driver loads. This would allow representing a board's static pin configuration
31 they require certain specific named states for dynamic pin configuration.
37 property exists to define the pin configuration. Each state may also be
47 pinctrl-0: List of phandles, each pointing at a pin configuration
48 node. These referenced pin configuration nodes must be child
53 contributing part of the overall configuration. See the next
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| D | sprd,pinctrl.txt | 7 to configure for some global common configuration, such as domain
15 There are too much various configuration that we can not list all
16 of them, so we can not make every Spreadtrum-special configuration
17 as one generic configuration, and maybe it will add more strange
18 global configuration in future. Then we add one "sprd,control" to
19 set these various global control configuration, and we need use
30 configuration.
34 related configuration are:
43 configuration, to set the pin sleep related configuration automatically
46 and set the pin sleep related configuration as "input-enable", which
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| D | fsl,imx-pinctrl.txt | 12 phrase "pin configuration node".
14 Freescale IMX pin configuration node is a node of a group of pins which can be
24 Required properties for pin configuration node:
48 2. The pin configuration node intends to work on a specific function should
51 this group of pins in this pin configuration node are working on.
52 3. The driver can use the function node's name and pin configuration node's
55 as the function name and pin configuration node's name as group name to
57 4. Each pin configuration node should have a phandle, devices can set pins
58 configurations by referring to the phandle of that pin configuration node.
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| D | lantiq,pinctrl-falcon.txt | 10 phrase "pin configuration node".
12 Lantiq's pin configuration nodes act as a container for an arbitrary number of
13 subnodes. Each of these subnodes represents some desired configuration for a
14 pin, a group, or a list of pins or groups. This configuration can include the
15 mux function to select on those group(s), and two pin configuration parameters:
22 other words, a subnode that lists a mux function but no pin configuration
23 parameters implies no information about any pin configuration parameters.
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| D | qcom,ipq4019-pinctrl.txt | 27 phrase "pin configuration node".
29 The pin configuration nodes act as a container for an arbitrary number of
30 subnodes. Each of these subnodes represents some desired configuration for a
31 pin, a group, or a list of pins or groups. This configuration can include the
32 mux function to select on those pin(s)/group(s), and various pin configuration
39 other words, a subnode that lists a mux function but no pin configuration
40 parameters implies no information about any pin configuration parameters.
46 to specify in a pin configuration subnode:
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| D | qcom,apq8064-pinctrl.txt | 24 phrase "pin configuration node".
26 Qualcomm's pin configuration nodes act as a container for an arbitrary number of
27 subnodes. Each of these subnodes represents some desired configuration for a
28 pin, a group, or a list of pins or groups. This configuration can include the
29 mux function to select on those pin(s)/group(s), and various pin configuration
36 other words, a subnode that lists a mux function but no pin configuration
37 parameters implies no information about any pin configuration parameters.
43 to specify in a pin configuration subnode:
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| D | qcom,ipq8064-pinctrl.txt | 24 phrase "pin configuration node".
26 Qualcomm's pin configuration nodes act as a container for an arbitrary number of
27 subnodes. Each of these subnodes represents some desired configuration for a
28 pin, a group, or a list of pins or groups. This configuration can include the
29 mux function to select on those pin(s)/group(s), and various pin configuration
36 other words, a subnode that lists a mux function but no pin configuration
37 parameters implies no information about any pin configuration parameters.
43 to specify in a pin configuration subnode:
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| D | pinctrl-palmas.txt | 4 the configuration for Pull UP/DOWN, open drain etc.
14 phrase "pin configuration node".
16 Palmas's pin configuration nodes act as a container for an arbitrary number of
17 subnodes. Each of these subnodes represents some desired configuration for a
18 list of pins. This configuration can include the mux function to select on
19 those pin(s), and various pin configuration parameters, such as pull-up,
26 other words, a subnode that lists a mux function but no pin configuration
27 parameters implies no information about any pin configuration parameters.
|
| D | ste,nomadik.txt | 12 phrase "pin configuration node".
14 ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
15 subnodes. Each of these subnodes represents some desired configuration for a
16 pin, a group, or a list of pins or groups. This configuration can include the
17 mux function to select on those pin(s)/group(s), and various pin configuration
32 Required pin configuration subnode properties:
33 - pins: A string array describing the pins affected by the configuration
35 - ste,config: Handle of pin configuration node
56 3: sleep input and keep last input configuration (no pull, pull up or pull down).
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| D | nvidia,tegra-pinmux-common.yaml | 16 the phrase "pin configuration node".
18 Tegra's pin configuration nodes act as a container for an arbitrary number
19 of subnodes. Each of these subnodes represents some desired configuration
20 for a pin, a group, or a list of pins or groups. This configuration can
22 pin configuration parameters, such as pull-up, tristate, drive strength,
29 other words, a subnode that lists a mux function but no pin configuration
30 parameters implies no information about any pin configuration parameters.
121 description: Open-drain configuration for the pin.
130 description: Lock the pin configuration against further changes until
134 - description: disable pin configuration lock
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| D | brcm,bcm2835-gpio.txt | 37 phrase "pin configuration node".
39 Each pin configuration node lists the pin(s) to which it applies, and one or
41 configuration. Each subnode only affects those parameters that are explicitly
43 information about any pull configuration. Similarly, a subnode that lists only
46 The BCM2835 pin configuration and multiplexing supports the generic bindings.
60 Legacy pin configuration and multiplexing binding:
61 *** (Its use is deprecated, use generic multiplexing and configuration
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| D | qcom,apq8084-pinctrl.txt | 56 phrase "pin configuration node".
58 The pin configuration nodes act as a container for an arbitrary number of
59 subnodes. Each of these subnodes represents some desired configuration for a
60 pin, a group, or a list of pins or groups. This configuration can include the
61 mux function to select on those pin(s)/group(s), and various pin configuration
65 PIN CONFIGURATION NODES:
71 other words, a subnode that lists a mux function but no pin configuration
72 parameters implies no information about any pin configuration parameters.
78 to specify in a pin configuration subnode:
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| D | microchip,pic32-pinctrl.txt | 7 PIC32 'pin configuration node' is a node of a group of pins which can be
9 pins, optional function, and optional mux related configuration.
16 Required properties for pin configuration sub-nodes:
17 - pins: List of pins to which the configuration applies.
19 Optional properties for pin configuration sub-nodes:
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| D | cnxt,cx92755-pinctrl.txt | 29 should also contain the pin configuration nodes that client devices reference,
34 === Pin Configuration Node ===
36 Each pin configuration node is a sub-node of the pin controller node and is a
42 "pin configuration node".
84 In the example above, a single pin group configuration node defines the
86 that pin configuration node using the &uart0_default phandle.
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| /Documentation/networking/dsa/ |
| D | b53.rst | 26 The configuration of the device depends on whether or not tagging is
29 The interface names and example network configuration are used according the
30 configuration described in the :ref:`dsa-config-showcases`.
32 Configuration with tagging support
35 The tagging based configuration is desired. It is not specific to the b53
38 See :ref:`dsa-tagged-configuration`.
40 Configuration without tagging support
46 switch need a different configuration.
48 The configuration slightly differ from the :ref:`dsa-vlan-configuration`.
54 In difference to the configuration described in :ref:`dsa-vlan-configuration`
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| /Documentation/hwmon/ |
| D | smsc47b397.rst | 104 Configuration Sequence
107 To program the configuration registers, the following sequence must be followed:
108 1. Enter Configuration Mode
109 2. Configure the Configuration Registers
110 3. Exit Configuration Mode.
112 Enter Configuration Mode
115 To place the chip into the Configuration State The config key (0x55) is written
118 Configuration Mode
121 In configuration mode, the INDEX PORT is located at the CONFIG PORT address and
124 The desired configuration registers are accessed in two steps:
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| /Documentation/driver-api/tty/ |
| D | n_gsm.rst | 51 struct termios configuration;
71 /* get n_gsm extended configuration */
75 /* set the new extended configuration */
77 /* get n_gsm configuration */
85 /* set the new configuration */
87 /* get DLC 1 configuration */
92 /* set the new DLC 1 specific configuration */
148 struct termios configuration;
161 /* get n_gsm extended configuration */
165 /* set the new extended configuration */
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| /Documentation/ABI/testing/ |
| D | sysfs-class-net-grcan | 7 Hardware configuration of physical interface 0. This file reads
8 and writes the "Enable 0" bit of the configuration register.
19 Hardware configuration of physical interface 1. This file reads
20 and writes the "Enable 1" bit of the configuration register.
31 Configuration of which physical interface to be used. Possible
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| D | sysfs-bus-iio-magnetometer-hmc5843 | 6 Current configuration and available configurations
11 positivebias Positive bias configuration
12 negativebias Negative bias configuration
18 The effect of this configuration may vary
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| D | sysfs-driver-typec-displayport | 1 What: /sys/bus/typec/devices/.../displayport/configuration
5 Shows the current DisplayPort configuration for the connector.
16 The configuration can be changed by writing to the file
18 Note. USB configuration does not equal to Exit Mode. It is
19 separate configuration defined in VESA DisplayPort Alt Mode on
40 possible to set pin assignment before configuration has been
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| /Documentation/userspace-api/media/drivers/ |
| D | omap3isp-uapi.rst | 28 (When using parallel interface one must pay account to correct configuration
52 does not fall under the standard IOCTLs --- gamma tables and configuration of
90 The update field in the structures tells whether to update the configuration
97 configuration data for the function.
132 The associated configuration pointer for the function may not be NULL when
133 enabling the function. When disabling a function the configuration pointer is
140 The statistics subdevs do offer more dynamic configuration options than the
173 module's data output depends on the requested configuration. Although the
178 module or request the necessary buffer size during the first configuration
181 The internal buffer size allocation considers the requested configuration's
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| /Documentation/devicetree/bindings/arm/freescale/ |
| D | fsl,vf610-mscm-cpucfg.txt | 1 Freescale Vybrid Miscellaneous System Control - CPU Configuration
4 block of registers which contains CPU configuration information.
8 - reg: the register range of the MSCM CPU configuration registers
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| /Documentation/arch/arm/samsung/ |
| D | gpio.rst | 22 PIN configuration
25 Pin configuration is specific to the Samsung architecture, with each SoC
26 registering the necessary information for the core gpio configuration
30 driver or machine to change gpio configuration.
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | scfg.txt | 1 Freescale Supplement configuration unit (SCFG)
3 SCFG is the supplemental configuration unit, that provides SoC specific
4 configuration and status registers for the chip. Such as getting PEX port
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