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/Documentation/devicetree/bindings/display/msm/
Dqcom,sm8250-mdss.yaml92 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
114 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
185 <&dispcc DISP_CC_MDSS_AHB_CLK>,
257 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
275 <&dispcc DISP_CC_MDSS_AHB_CLK>,
328 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sm8550-mdss.yaml94 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
118 <&dispcc DISP_CC_MDSS_AHB_CLK>,
194 <&dispcc DISP_CC_MDSS_AHB_CLK>,
266 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
283 <&dispcc DISP_CC_MDSS_AHB_CLK>,
336 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sm8150-mdss.yaml90 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
112 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
183 <&dispcc DISP_CC_MDSS_AHB_CLK>,
255 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
273 <&dispcc DISP_CC_MDSS_AHB_CLK>,
326 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sm6125-mdss.yaml84 <&dispcc DISP_CC_MDSS_AHB_CLK>,
108 <&dispcc DISP_CC_MDSS_AHB_CLK>,
152 <&dispcc DISP_CC_MDSS_AHB_CLK>,
204 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sm6350-mdss.yaml102 <&dispcc DISP_CC_MDSS_AHB_CLK>,
113 <&dispcc DISP_CC_MDSS_AHB_CLK>;
149 <&dispcc DISP_CC_MDSS_AHB_CLK>,
202 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>;
Dqcom,sm6375-mdss.yaml82 <&dispcc DISP_CC_MDSS_AHB_CLK>,
102 <&dispcc DISP_CC_MDSS_AHB_CLK>,
150 <&dispcc DISP_CC_MDSS_AHB_CLK>,
203 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sdm845-mdss.yaml109 <&dispcc DISP_CC_MDSS_AHB_CLK>,
152 <&dispcc DISP_CC_MDSS_AHB_CLK>,
204 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
222 <&dispcc DISP_CC_MDSS_AHB_CLK>,
274 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sm8450-mdss.yaml94 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
118 <&dispcc DISP_CC_MDSS_AHB_CLK>,
199 <&dispcc DISP_CC_MDSS_AHB_CLK>,
276 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
294 <&dispcc DISP_CC_MDSS_AHB_CLK>,
347 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sc7180-mdss.yaml93 <&dispcc DISP_CC_MDSS_AHB_CLK>,
115 <&dispcc DISP_CC_MDSS_AHB_CLK>,
160 <&dispcc DISP_CC_MDSS_AHB_CLK>,
231 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
249 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sc7280-mdss.yaml101 <&dispcc DISP_CC_MDSS_AHB_CLK>,
126 <&dispcc DISP_CC_MDSS_AHB_CLK>,
181 <&dispcc DISP_CC_MDSS_AHB_CLK>,
253 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
273 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
364 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,qcm2290-mdss.yaml107 <&dispcc DISP_CC_MDSS_AHB_CLK>,
144 <&dispcc DISP_CC_MDSS_AHB_CLK>,
195 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
Dqcom,sm6115-mdss.yaml96 <&dispcc DISP_CC_MDSS_AHB_CLK>,
134 <&dispcc DISP_CC_MDSS_AHB_CLK>,
183 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
Dqcom,sm8350-mdss.yaml98 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
122 <&dispcc DISP_CC_MDSS_AHB_CLK>,
191 <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sc8280xp-mdss.yaml67 <&dispcc0 DISP_CC_MDSS_AHB_CLK>,
97 <&dispcc0 DISP_CC_MDSS_AHB_CLK>,
Ddsi-phy-20nm.yaml66 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddsi-phy-7nm.yaml72 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddsi-phy-28nm.yaml70 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Ddsi-phy-14nm.yaml74 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,qcm2290-dpu.yaml66 <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sm6115-dpu.yaml68 <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sc7280-dpu.yaml70 <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sm8150-dpu.yaml58 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sdm845-dpu.yaml66 <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sm8250-dpu.yaml65 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
Dqcom,sc7180-dpu.yaml93 <&dispcc DISP_CC_MDSS_AHB_CLK>,

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