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/Documentation/networking/dsa/
Db53.rst67 ip link add link eth0 name eth0.1 type vlan id 1
68 ip link add link eth0 name eth0.2 type vlan id 2
69 ip link add link eth0 name eth0.3 type vlan id 3
72 ip link set eth0 up
73 ip link set eth0.1 up
74 ip link set eth0.2 up
75 ip link set eth0.3 up
78 ip link set wan up
79 ip link set lan1 up
80 ip link set lan2 up
[all …]
Dconfiguration.rst95 ip addr add 192.0.2.1/30 dev lan1
96 ip addr add 192.0.2.5/30 dev lan2
97 ip addr add 192.0.2.9/30 dev lan3
101 ip link set eth0 up
104 ip link set lan1 up
105 ip link set lan2 up
106 ip link set lan3 up
113 ip link set eth0 up
116 ip link set lan1 up
117 ip link set lan2 up
[all …]
/Documentation/networking/
Dipddp.rst4 AppleTalk-IP Decapsulation and AppleTalk-IP Encapsulation
14 AppleTalk-IP (IPDDP) is the method computers connected to AppleTalk
15 networks can use to communicate via IP. AppleTalk-IP is simply IP datagrams
19 IP over an AppleTalk network or you can provide IP gatewaying functions
22 You can currently encapsulate or decapsulate AppleTalk-IP on LocalTalk,
28 Compiling AppleTalk-IP Decapsulation/Encapsulation
31 AppleTalk-IP decapsulation needs to be compiled into your kernel. You
32 will need to turn on AppleTalk-IP driver support. Then you will need to
33 select ONE of the two options; IP to AppleTalk-IP encapsulation support or
34 AppleTalk-IP to IP decapsulation support. If you compile the driver
[all …]
Dvrf.rst10 The VRF device combined with ip rules provides the ability to create virtual
21 the use of higher priority ip rules (Policy Based Routing, PBR) to take
69 ip link add vrf-blue type vrf table 10
70 ip link set dev vrf-blue up
80 ip ru add oif vrf-blue table 10
81 ip ru add iif vrf-blue table 10
85 ip route add table 10 unreachable default metric 4278198272
94 ip link set dev eth1 master vrf-blue
108 ip route add table 10 ...
172 $ ip link add dev NAME type vrf table ID
[all …]
Dipvlan.rst31 using IProute2/ip utility.
34 ip link add link <master> name <slave> type ipvlan [ mode MODE ] [ FLAGS ]
44 bash# ip link add link eth0 name ipvl0 type ipvlan
47 bash# ip link add link eth0 name ipvl0 type ipvlan mode l2 bridge
51 bash# ip link add link eth0 name ipvlan type ipvlan mode l2 private
55 bash# ip link add link eth0 name ipvlan type ipvlan mode l2 vepa
158 ip netns add ns0
159 ip netns add ns1
163 ip link add link eth0 ipvl0 type ipvlan mode l2
164 ip link add link eth0 ipvl1 type ipvlan mode l2
[all …]
Dgtp.rst18 tunneling User-IP payload between a mobile station (phone, modem)
29 technology-dependent protocol stack for transmitting the user IP
41 public internet, but can also be any private IP network (or even
42 theoretically some non-IP network like X.25).
54 able to decapsulate tunneled IP packets in the uplink originated by
55 the phone, and encapsulate raw IP packets received from the external
58 It *only* implements the so-called 'user plane', carrying the User-IP
122 on the inner (user) IP layer, or on the outer (transport) layer.
125 the User IP payload, nor for the outer IP layer. Patches or other
166 instance) per IP address. Tunnel Endpoint Identifier (TEID) are unique
[all …]
Dbareudp.rst12 tunnelling different L3 protocols like MPLS, IP, NSH etc. inside a UDP tunnel.
16 The bareudp device supports special handling for MPLS & IP as they can have
19 IP protocol can have ethertypes ETH_P_IP (v4) & ETH_P_IPV6 (v6).
28 a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype mpls_uc
34 b) ip link delete bareudp0
39 same family. It is currently only available for IP and MPLS. This mode has to
42 a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype ipv4 multiproto
47 b) ip link add dev bareudp0 type bareudp dstport 6635 ethertype mpls_uc multiproto
Dipsec.rst12 Small IP packet won't get compressed at sender, and failed on
21 payload, the IP datagram MUST be sent in the original non-compressed
22 form. To clarify: If an IP datagram is sent non-compressed, no
25 the decompression processing cycles and avoiding incurring IP
29 Small IP datagrams are likely to expand as a result of compression.
31 where IP datagrams of size smaller than the threshold are sent in the
Dbatman-adv.rst8 operate on the IP basis. Unlike the batman daemon, which exchanges information
31 iproute2 tool ``ip``::
33 $ ip link add name bat0 type batadv
37 $ ip link set dev eth0 master bat0
44 $ ip link set dev eth0 nomaster
90 IP address which can be either statically configured or dynamically (by using
93 NodeA: ip link set up dev bat0
94 NodeA: ip addr add 192.168.0.1/24 dev bat0
96 NodeB: ip link set up dev bat0
97 NodeB: ip addr add 192.168.0.2/24 dev bat0
[all …]
Dcdc_mbim.rst54 Establishing a MBIM IP session reequires at least these actions by the
60 - configure IP interface
170 mapped to MBIM IP session 0.
173 Multiplexed IP sessions (IPS)
175 MBIM allows multiplexing up to 256 IP sessions over a single USB data
176 channel. The cdc_mbim driver models such IP sessions as 802.1q VLAN
177 subdevices of the master wwanY device, mapping MBIM IP session Z to
184 VLAN links prior to establishing MBIM IP sessions where the SessionId
188 For example, adding a link for a MBIM IP session with SessionId 3::
190 ip link add link wwan0 name wwan0.3 type vlan id 3
[all …]
/Documentation/admin-guide/nfs/
Dnfsroot.rst59 nfsroot=[<server-ip>:]<root-dir>[,<nfs-options>]
63 <server-ip> Specifies the IP address of the NFS server.
64 The default address is determined by the ip parameter
66 servers for IP autoconfiguration and NFS.
71 IP address.
88 ip=<client-ip>:<server-ip>:<gw-ip>:<netmask>:<hostname>:<device>:<autoconf>:<dns0-ip>:<dns1-ip>:<nt…
89 This parameter tells the kernel how to configure IP addresses of devices
90 and also how to set up the IP routing table. It was originally called
91 nfsaddrs, but now the boot-time IP configuration works independently of
92 NFS, so it was renamed to ip and the old name remained as an alias for
[all …]
/Documentation/devicetree/bindings/sifive/
Dsifive-blocks-ip-versioning.txt1 DT compatible string versioning for SiFive open-source IP blocks
4 strings for open-source SiFive IP blocks. HDL for these IP blocks
9 IP block-specific DT compatible strings are contained within the HDL,
10 in the form "sifive,<ip-block-name><integer version number>".
16 Until these IP blocks (or IP integration) support version
17 auto-discovery, the maintainers of these IP blocks intend to increment
19 interface to these IP blocks changes, or when the functionality of the
20 underlying IP blocks changes in a way that software should be aware of.
26 match on these IP block-specific compatible strings.
33 IP block-specific compatible string (such as "sifive,uart0") should
/Documentation/networking/device_drivers/ethernet/ti/
Dcpsw_switchdev.rst17 ip -d link show dev sw0p1 | grep switchid
66 ip link add name br0 type bridge
67 ip link set dev br0 type bridge vlan_filtering 0
69 ip link set dev sw0p1 master br0
70 ip link set dev sw0p2 master br0
74 ip link add name br0 type bridge
75 ip link set dev br0 type bridge vlan_filtering 0
77 ip link set dev br0 type bridge vlan_filtering 1
78 ip link set dev sw0p1 master br0
79 ip link set dev sw0p2 master br0
[all …]
/Documentation/devicetree/bindings/media/xilinx/
Dvideo.txt1 DT bindings for Xilinx video IP cores
4 Xilinx video IP cores process video streams by acting as video sinks and/or
8 Each video IP core is represented by an AMBA bus child node in the device
9 tree using bindings documented in this directory. Connections between the IP
18 The following properties are common to all Xilinx video IP cores.
21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
22 Video IP and System Design Guide" [UG934]. How the format relates to the IP
23 core is described in the IP core bindings documentation.
Dxlnx,video.txt1 Xilinx Video IP Pipeline (VIPP)
7 Xilinx video IP pipeline processes video streams through one or more Xilinx
8 video IP cores. Each video IP core is represented as documented in video.txt
9 and IP core specific documentation, xlnx,v-*.txt, in this directory. The DT
11 mappings between DMAs and the video IP cores.
/Documentation/networking/device_drivers/wwan/
Diosm.rst28 MBIM IP session:
32 - configure IP network interface
69 The IOSM driver exposes IP link interface "wwan0-X" of type "wwan" for IP
71 interface and for associating it with MBIM IP session. The Driver supports
72 up to 8 IP sessions for simultaneous IP communication.
74 The userspace management application is responsible for creating new IP link
75 prior to establishing MBIM IP session where the SessionId is greater than 0.
77 For example, creating new IP link for a MBIM IP session with SessionId 1:
79 ip link add dev wwan0-1 parentdev-name wwan0 type wwan linkid 1
81 The driver will automatically map the "wwan0-1" network device to MBIM IP
Dt7xx.rst30 MBIM IP session:
35 - configure IP network interface
77 The t7xx driver exposes IP link interface "wwan0-X" of type "wwan" for IP
79 interface and for associating it with MBIM IP session.
81 The userspace management application is responsible for creating new IP link
82 prior to establishing MBIM IP session where the SessionId is greater than 0.
84 For example, creating new IP link for a MBIM IP session with SessionId 1:
86 ip link add dev wwan0-1 parentdev wwan0 type wwan linkid 1
88 The driver will automatically map the "wwan0-1" network device to MBIM IP
/Documentation/devicetree/bindings/clock/ti/
Ddra7-atl.txt3 The ATL IP is used to generate clock to be used to synchronize baseband and
4 audio codec. A single ATL IP provides four ATL clock instances sharing the same
16 Since the clock instances are part of a single IP this binding is used as a node
17 for the DT clock tree, the IP driver is needed to handle the actual configuration
18 of the IP.
27 Binding for the IP driver:
28 This binding is used to configure the IP driver which is going to handle the
29 configuration of the IP for the ATL clock instances.
33 - reg : base address for the ATL IP
75 /* binding for the IP */
/Documentation/networking/device_drivers/can/freescale/
Dflexcan.rst13 For most flexcan IP cores the driver supports 2 RX modes:
39 On some IP cores the controller cannot receive RTR frames in the
45 Waive ability to receive RTR frames. (not supported on all IP cores)
48 some IP cores RTR frames cannot be received anymore.
52 ip link set dev can0 down
54 ip link set dev can0 up
/Documentation/devicetree/bindings/pwm/
Dmicrochip,corepwm.yaml8 title: Microchip IP corePWM controller
14 corePWM is an 16 channel pulse width modulator FPGA IP
39 Depending on how the IP is instantiated, there are two modes of operation.
42 A 16 bit wide "SHADOW_REG_EN" parameter of the IP core controls whether synchronous
44 FPGA. If the IP core is instantiated with SHADOW_REG_ENx=1, both registers that
56 Optional, per-channel Low Ripple DAC mode is possible on this IP core. It creates
59 standard PWM algorithm can achieve. A 16 bit DAC_MODE module parameter of the IP
/Documentation/devicetree/bindings/ptp/
Dptp-ines.txt1 ZHAW InES PTP time stamping IP core
3 The IP core needs two different kinds of nodes. The control node
7 port index within the IP core.
17 the port channel within the IP core
/Documentation/devicetree/bindings/fpga/
Daltera-pr-ip.txt1 Altera Arria10 Partial Reconfiguration IP
4 - compatible : should contain "altr,a10-pr-ip"
10 compatible = "altr,a10-pr-ip";
/Documentation/devicetree/bindings/
Dxilinx.txt1 d) Xilinx IP cores
3 The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
10 Each IP-core has a set of parameters which the FPGA designer can use to
14 device drivers how the IP cores are configured, but it requires the kernel
20 properties of the device node. In general, device nodes for IP-cores
24 compatible = "xlnx,(ip-core-name)-(HW_VER)"
36 (ip-core-name): the name of the ip block (given after the BEGIN
48 Typically, the compatible list will include the exact IP core version
49 followed by an older IP core version which implements the same
89 That covers the general approach to binding xilinx IP cores into the
/Documentation/devicetree/bindings/i2c/
Dopencores,i2c-ocores.yaml21 - sifive,fu740-c000-i2c # Opencore based IP block FU740-C000 SoC
22 - sifive,fu540-c000-i2c # Opencore based IP block FU540-C000 SoC
42 - if clock-frequency is present and neither opencores,ip-clock-frequency nor
48 - if opencores,ip-clock-frequency is present it specifies i2c controller
68 opencores,ip-clock-frequency:
82 - opencores,ip-clock-frequency
96 opencores,ip-clock-frequency = <20000000>;
/Documentation/netlabel/
Dcipso_ipv4.rst13 IP Security Option (CIPSO) draft from July 16, 1992. A copy of this
22 The CIPSO/IPv4 protocol engine applies the CIPSO IP option to packets by
24 system through the socket to have the CIPSO IP option applied. The socket's
28 configured to use CIPSO for packet labeling then a CIPSO IP option will be
34 The CIPSO/IPv4 protocol engine validates every CIPSO IP option it finds at the
35 IP layer without any special handling required by the LSM. However, in order

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