/Documentation/devicetree/bindings/remoteproc/ |
D | ti,k3-dsp-rproc.yaml | 35 - ti,j721e-c66-dsp 36 - ti,j721e-c71-dsp 40 Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs 41 Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs 96 - ti,j721e-c66-dsp 115 - ti,j721e-c71-dsp 165 /* J721E C66_0 DSP node */ 167 compatible = "ti,j721e-c66-dsp"; 182 /* J721E C71_0 DSP node */ 184 compatible = "ti,j721e-c71-dsp";
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D | ti,pru-rproc.yaml | 21 containing the revised ICSSG v1.1 (eg: J721E, AM65x SR2.0) have an extra two 47 - ti,j721e-pru # for PRUs in K3 J721E SoC family 48 - ti,j721e-rtu # for RTUs in K3 J721E SoC family 49 - ti,j721e-tx-pru # for Tx_PRUs in K3 J721E SoC family 74 - ti,j721e-rtu 86 - ti,j721e-tx-pru
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D | ti,k3-r5f-rproc.yaml | 44 - ti,j721e-r5fss 71 For most SoCs (AM65x, J721E, J7200, J721s2), 73 most SoCs (AM65x, J721E, J7200, J721s2), default is LockStep mode if 120 - ti,j721e-r5f 242 - ti,j721e-r5fss
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/Documentation/devicetree/bindings/sound/ |
D | ti,j721e-cpb-audio.yaml | 6 $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-audio.yaml# 9 title: Texas Instruments J721e Common Processor Board Audio Support 17 The pcm3168a SCKI clock is sourced from j721e AUDIO_REFCLK2 pin. 23 Clocking setup for j721e: 40 - ti,j721e-cpb-audio 78 const: ti,j721e-cpb-audio 125 compatible = "ti,j721e-cpb-audio"; 126 model = "j721e-cpb";
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D | ti,j721e-cpb-ivi-audio.yaml | 6 $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-ivi-audio.yaml# 9 title: Texas Instruments J721e Common Processor Board Audio Support 17 sound/ti,j721e-cpb-audio.txt 21 The SCKI for pcm3168a is sourced from j721e AUDIO_REFCLK0 pin. 47 - const: ti,j721e-cpb-ivi-audio 119 compatible = "ti,j721e-cpb-ivi-audio"; 120 model = "j721e-cpb-ivi";
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/Documentation/devicetree/bindings/pci/ |
D | ti,j721e-pci-ep.yaml | 5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml# 8 title: TI J721E PCI EP (PCIe Wrapper) 19 - const: ti,j721e-pcie-ep 23 - const: ti,j721e-pcie-ep 27 - const: ti,j721e-pcie-ep 93 compatible = "ti,j721e-pcie-ep";
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D | ti,j721e-pci-host.yaml | 5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml# 8 title: TI J721E PCI Host (PCIe Wrapper) 19 - const: ti,j721e-pcie-host 23 - const: ti,j721e-pcie-host 27 - const: ti,j721e-pcie-host 128 compatible = "ti,j721e-pcie-host";
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/Documentation/devicetree/bindings/arm/ti/ |
D | k3.yaml | 107 - description: K3 J721E SoC 109 - const: ti,j721e 112 - beagle,j721e-beagleboneai64 113 - ti,j721e-evm 114 - ti,j721e-sk 115 - const: ti,j721e
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/Documentation/devicetree/bindings/ufs/ |
D | ti,j721e-ufs.yaml | 4 $id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml# 7 title: TI J721e UFS Host Controller Glue Driver 15 - const: ti,j721e-ufs 67 compatible = "ti,j721e-ufs";
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/Documentation/devicetree/bindings/misc/ |
D | ti,j721e-esm.yaml | 5 $id: http://devicetree.org/schemas/misc/ti,j721e-esm.yaml# 23 const: ti,j721e-esm 49 compatible = "ti,j721e-esm";
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/Documentation/devicetree/bindings/usb/ |
D | ti,j721e-usb.yaml | 4 $id: http://devicetree.org/schemas/usb/ti,j721e-usb.yaml# 15 - const: ti,j721e-usb 18 - const: ti,j721e-usb 87 compatible = "ti,j721e-usb";
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/Documentation/devicetree/bindings/mfd/ |
D | ti,j721e-system-controller.yaml | 5 $id: http://devicetree.org/schemas/mfd/ti,j721e-system-controller.yaml# 8 title: TI J721e System Controller Registers R/W 30 - ti,j721e-system-controller 83 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
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/Documentation/devicetree/bindings/thermal/ |
D | ti,j72xx-thermal.yaml | 28 - ti,j721e-vtm 53 const: ti,j721e-vtm 75 compatible = "ti,j721e-vtm";
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/Documentation/devicetree/bindings/net/ |
D | ti,k3-am654-cpsw-nuss.yaml | 7 title: The TI AM654x/J721E/AM642x SoC Gigabit Ethernet MAC (Media Access Controller) 14 The TI AM654x/J721E SoC Gigabit Ethernet MAC (CPSW2G NUSS) has two ports 43 device MCU domain named MCU_CPSW0 on AM654x/J721E SoC. 60 - ti,j721e-cpsw-nuss 61 - ti,j721e-cpswxg-nuss 202 - ti,j721e-cpswxg-nuss 222 - ti,j721e-cpswxg-nuss
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D | ti,k3-am654-cpts.yaml | 7 title: The TI AM654x/J721E Common Platform Time Sync (CPTS) module 14 The TI AM654x/J721E CPTS module is used to facilitate host control of time 32 TI AM654x/J721E SoCs has several similar CPTS modules integrated into the 50 - ti,j721e-cpts
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D | ti,icss-iep.yaml | 18 - ti,j721e-icss-iep
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/Documentation/devicetree/bindings/display/ti/ |
D | ti,j721e-dss.yaml | 5 $id: http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml# 8 title: Texas Instruments J721E Display Subsystem 15 The J721E TI Keystone Display SubSystem with four output ports and 22 const: ti,j721e-dss 158 compatible = "ti,j721e-dss";
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/Documentation/devicetree/bindings/phy/ |
D | ti,phy-j721e-wiz.yaml | 5 $id: http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml# 8 title: TI J721E WIZ (SERDES Wrapper) 16 - ti,j721e-wiz-16g 17 - ti,j721e-wiz-10g 204 compatible = "ti,j721e-wiz-16g";
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D | ti,phy-gmii-sel.yaml | 57 - ti,j721e-cpsw9g-phy-gmii-sel 90 - ti,j721e-cpsw9g-phy-gmii-sel 117 - ti,j721e-cpsw9g-phy-gmii-sel 135 - ti,j721e-cpsw9g-phy-gmii-sel
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/Documentation/devicetree/bindings/display/bridge/ |
D | cdns,mhdp8546.yaml | 17 - ti,j721e-mhdp8546 35 - const: j721e-intg 98 const: ti,j721e-mhdp8546
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D | cdns,dsi.yaml | 19 - ti,j721e-dsi 80 const: ti,j721e-dsi
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/Documentation/devicetree/bindings/crypto/ |
D | ti,sa2ul.yaml | 15 - ti,j721e-sa2ul 92 compatible = "ti,j721e-sa2ul";
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/Documentation/devicetree/bindings/i2c/ |
D | ti,omap4-i2c.yaml | 25 - ti,j721e-i2c 97 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
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/Documentation/devicetree/bindings/mmc/ |
D | sdhci-am654.yaml | 24 - ti,j721e-sdhci-4bit 25 - ti,j721e-sdhci-8bit 28 - const: ti,j721e-sdhci-8bit 31 - const: ti,j721e-sdhci-4bit
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/Documentation/devicetree/bindings/hwlock/ |
D | ti,omap-hwspinlock.yaml | 17 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs
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