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/Documentation/devicetree/bindings/remoteproc/
Dti,k3-dsp-rproc.yaml35 - ti,j721e-c66-dsp
36 - ti,j721e-c71-dsp
40 Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs
41 Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs
96 - ti,j721e-c66-dsp
115 - ti,j721e-c71-dsp
165 /* J721E C66_0 DSP node */
167 compatible = "ti,j721e-c66-dsp";
182 /* J721E C71_0 DSP node */
184 compatible = "ti,j721e-c71-dsp";
Dti,pru-rproc.yaml21 containing the revised ICSSG v1.1 (eg: J721E, AM65x SR2.0) have an extra two
47 - ti,j721e-pru # for PRUs in K3 J721E SoC family
48 - ti,j721e-rtu # for RTUs in K3 J721E SoC family
49 - ti,j721e-tx-pru # for Tx_PRUs in K3 J721E SoC family
74 - ti,j721e-rtu
86 - ti,j721e-tx-pru
Dti,k3-r5f-rproc.yaml44 - ti,j721e-r5fss
71 For most SoCs (AM65x, J721E, J7200, J721s2),
73 most SoCs (AM65x, J721E, J7200, J721s2), default is LockStep mode if
120 - ti,j721e-r5f
242 - ti,j721e-r5fss
/Documentation/devicetree/bindings/sound/
Dti,j721e-cpb-audio.yaml6 $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-audio.yaml#
9 title: Texas Instruments J721e Common Processor Board Audio Support
17 The pcm3168a SCKI clock is sourced from j721e AUDIO_REFCLK2 pin.
23 Clocking setup for j721e:
40 - ti,j721e-cpb-audio
78 const: ti,j721e-cpb-audio
125 compatible = "ti,j721e-cpb-audio";
126 model = "j721e-cpb";
Dti,j721e-cpb-ivi-audio.yaml6 $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-ivi-audio.yaml#
9 title: Texas Instruments J721e Common Processor Board Audio Support
17 sound/ti,j721e-cpb-audio.txt
21 The SCKI for pcm3168a is sourced from j721e AUDIO_REFCLK0 pin.
47 - const: ti,j721e-cpb-ivi-audio
119 compatible = "ti,j721e-cpb-ivi-audio";
120 model = "j721e-cpb-ivi";
/Documentation/devicetree/bindings/pci/
Dti,j721e-pci-ep.yaml5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#
8 title: TI J721E PCI EP (PCIe Wrapper)
19 - const: ti,j721e-pcie-ep
23 - const: ti,j721e-pcie-ep
27 - const: ti,j721e-pcie-ep
93 compatible = "ti,j721e-pcie-ep";
Dti,j721e-pci-host.yaml5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml#
8 title: TI J721E PCI Host (PCIe Wrapper)
19 - const: ti,j721e-pcie-host
23 - const: ti,j721e-pcie-host
27 - const: ti,j721e-pcie-host
128 compatible = "ti,j721e-pcie-host";
/Documentation/devicetree/bindings/arm/ti/
Dk3.yaml107 - description: K3 J721E SoC
109 - const: ti,j721e
112 - beagle,j721e-beagleboneai64
113 - ti,j721e-evm
114 - ti,j721e-sk
115 - const: ti,j721e
/Documentation/devicetree/bindings/ufs/
Dti,j721e-ufs.yaml4 $id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml#
7 title: TI J721e UFS Host Controller Glue Driver
15 - const: ti,j721e-ufs
67 compatible = "ti,j721e-ufs";
/Documentation/devicetree/bindings/misc/
Dti,j721e-esm.yaml5 $id: http://devicetree.org/schemas/misc/ti,j721e-esm.yaml#
23 const: ti,j721e-esm
49 compatible = "ti,j721e-esm";
/Documentation/devicetree/bindings/usb/
Dti,j721e-usb.yaml4 $id: http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#
15 - const: ti,j721e-usb
18 - const: ti,j721e-usb
87 compatible = "ti,j721e-usb";
/Documentation/devicetree/bindings/mfd/
Dti,j721e-system-controller.yaml5 $id: http://devicetree.org/schemas/mfd/ti,j721e-system-controller.yaml#
8 title: TI J721e System Controller Registers R/W
30 - ti,j721e-system-controller
83 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
/Documentation/devicetree/bindings/thermal/
Dti,j72xx-thermal.yaml28 - ti,j721e-vtm
53 const: ti,j721e-vtm
75 compatible = "ti,j721e-vtm";
/Documentation/devicetree/bindings/net/
Dti,k3-am654-cpsw-nuss.yaml7 title: The TI AM654x/J721E/AM642x SoC Gigabit Ethernet MAC (Media Access Controller)
14 The TI AM654x/J721E SoC Gigabit Ethernet MAC (CPSW2G NUSS) has two ports
43 device MCU domain named MCU_CPSW0 on AM654x/J721E SoC.
60 - ti,j721e-cpsw-nuss
61 - ti,j721e-cpswxg-nuss
202 - ti,j721e-cpswxg-nuss
222 - ti,j721e-cpswxg-nuss
Dti,k3-am654-cpts.yaml7 title: The TI AM654x/J721E Common Platform Time Sync (CPTS) module
14 The TI AM654x/J721E CPTS module is used to facilitate host control of time
32 TI AM654x/J721E SoCs has several similar CPTS modules integrated into the
50 - ti,j721e-cpts
Dti,icss-iep.yaml18 - ti,j721e-icss-iep
/Documentation/devicetree/bindings/display/ti/
Dti,j721e-dss.yaml5 $id: http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#
8 title: Texas Instruments J721E Display Subsystem
15 The J721E TI Keystone Display SubSystem with four output ports and
22 const: ti,j721e-dss
158 compatible = "ti,j721e-dss";
/Documentation/devicetree/bindings/phy/
Dti,phy-j721e-wiz.yaml5 $id: http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#
8 title: TI J721E WIZ (SERDES Wrapper)
16 - ti,j721e-wiz-16g
17 - ti,j721e-wiz-10g
204 compatible = "ti,j721e-wiz-16g";
Dti,phy-gmii-sel.yaml57 - ti,j721e-cpsw9g-phy-gmii-sel
90 - ti,j721e-cpsw9g-phy-gmii-sel
117 - ti,j721e-cpsw9g-phy-gmii-sel
135 - ti,j721e-cpsw9g-phy-gmii-sel
/Documentation/devicetree/bindings/display/bridge/
Dcdns,mhdp8546.yaml17 - ti,j721e-mhdp8546
35 - const: j721e-intg
98 const: ti,j721e-mhdp8546
Dcdns,dsi.yaml19 - ti,j721e-dsi
80 const: ti,j721e-dsi
/Documentation/devicetree/bindings/crypto/
Dti,sa2ul.yaml15 - ti,j721e-sa2ul
92 compatible = "ti,j721e-sa2ul";
/Documentation/devicetree/bindings/i2c/
Dti,omap4-i2c.yaml25 - ti,j721e-i2c
97 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
/Documentation/devicetree/bindings/mmc/
Dsdhci-am654.yaml24 - ti,j721e-sdhci-4bit
25 - ti,j721e-sdhci-8bit
28 - const: ti,j721e-sdhci-8bit
31 - const: ti,j721e-sdhci-4bit
/Documentation/devicetree/bindings/hwlock/
Dti,omap-hwspinlock.yaml17 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs

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