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/Documentation/devicetree/bindings/arm/ti/
Dk3.yaml4 $id: http://devicetree.org/schemas/arm/ti/k3.yaml#
7 title: Texas Instruments K3 Multicore SoC architecture
13 Platforms based on Texas Instruments K3 Multicore SoC architecture
22 - description: K3 AM62A7 SoC
28 - description: K3 AM62P5 SoC and Boards
34 - description: K3 AM625 SoC PHYTEC phyBOARD-Lyra
40 - description: K3 AM625 SoC
48 - description: K3 AM62x SoC Toradex Verdin Modules and Carrier Boards
58 - description: K3 AM62x SoC Toradex Verdin Modules and Carrier Boards with Wi-Fi / BT
68 - description: K3 AM642 SoC
[all …]
/Documentation/devicetree/bindings/remoteproc/
Dti,pru-rproc.yaml19 The K3 SoCs containing ICSSG v1.0 (eg: AM65x SR1.0) also have two Auxiliary
20 PRU cores called RTUs with slightly different IP integration. The K3 SoCs
40 - ti,am625-pru # for PRUs in K3 AM62x SoC family
41 - ti,am642-pru # for PRUs in K3 AM64x SoC family
42 - ti,am642-rtu # for RTUs in K3 AM64x SoC family
43 - ti,am642-tx-pru # for Tx_PRUs in K3 AM64x SoC family
44 - ti,am654-pru # for PRUs in K3 AM65x SoC family
45 - ti,am654-rtu # for RTUs in K3 AM65x SoC family
46 - ti,am654-tx-pru # for Tx_PRUs in K3 AM65x SR2.0 SoCs
47 - ti,j721e-pru # for PRUs in K3 J721E SoC family
[all …]
Dti,k3-dsp-rproc.yaml4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
7 title: TI K3 DSP devices
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
20 cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a
29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
39 Use "ti,am62a-c7xv-dsp" for AM62A Deep learning DSPs on K3 AM62A SoCs
40 Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs
41 Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs
42 Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs
Dti,k3-r5f-rproc.yaml4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml#
7 title: TI K3 R5F processor subsystems
13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F
111 $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
Dti,pru-consumer.yaml52 and Tx_PRU0 on K3 SoCs). Use the same value for all cores within the
/Documentation/devicetree/bindings/hwinfo/
Dti,k3-socinfo.yaml4 $id: http://devicetree.org/schemas/hwinfo/ti,k3-socinfo.yaml#
7 title: Texas Instruments K3 Multicore SoC platforms chipid module
14 Texas Instruments (ARM64) K3 Multicore SoC platforms chipid module is
/Documentation/devicetree/bindings/hwlock/
Dti,omap-hwspinlock.yaml7 title: TI HwSpinlock for OMAP and K3 based SoCs
16 - ti,am64-hwspinlock # for K3 AM64x SoCs
17 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs
/Documentation/devicetree/bindings/dma/
Dk3dma.txt1 * Hisilicon K3 DMA controller
7 - "hisilicon,k3-dma-1.0"
21 compatible = "hisilicon,k3-dma-1.0";
/Documentation/devicetree/bindings/arm/keystone/
Dti,k3-sci-common.yaml4 $id: http://devicetree.org/schemas/arm/keystone/ti,k3-sci-common.yaml#
7 title: Common K3 TI-SCI
13 The TI K3 family of SoCs usually have a central System Controller Processor
/Documentation/devicetree/bindings/soc/ti/
Dk3-ringacc.yaml5 $id: http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml#
8 title: Texas Instruments K3 NavigatorSS Ring Accelerator
26 management of the packet queues. The K3 SoCs can have more than one RA instances
29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
Dti,pruss.yaml68 - ti,am625-pruss # for K3 AM62x SoC family
69 - ti,am642-icssg # for K3 AM64x SoC family
70 - ti,am654-icssg # for K3 AM65x SoC family
71 - ti,j721e-icssg # for K3 J721E SoC family
166 This is applicable only for ICSSG (K3 SoCs). The ICSSG modules
239 AM437x, AM57xx & 66AK2G SoCs) or 2 IEPs (on K3 AM65x, J721E & AM64x SoCs).
302 present on K3 SoCs have additional auxiliary PRU cores with slightly
/Documentation/devicetree/bindings/rtc/
Dti,k3-rtc.yaml4 $id: http://devicetree.org/schemas/rtc/ti,k3-rtc.yaml#
7 title: Texas Instruments K3 Real Time Clock
/Documentation/devicetree/bindings/misc/
Dti,j721e-esm.yaml8 title: Texas Instruments K3 ESM
14 The ESM (Error Signaling Module) is an IP block on TI K3 devices
/Documentation/devicetree/bindings/interrupt-controller/
Dti,sci-intr.yaml7 title: Texas Instruments K3 Interrupt Router
13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
39 (like the Device Memory and Security Controller on K3 AM654 SoC). System
Dti,sci-inta.yaml7 title: Texas Instruments K3 Interrupt Aggregator
13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
Dti,pruss-intc.yaml28 The K3 family of SoCs can handle 160 input events that can be mapped to 20
49 Use "ti,icssg-intc" for K3 AM65x, J721E and AM64x family of SoCs
/Documentation/devicetree/bindings/dma/ti/
Dk3-pktdma.yaml6 $id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml#
9 title: Texas Instruments K3 DMSS PKTDMA
16 mode channels of K3 UDMA-P.
28 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
Dk3-bcdma.yaml6 $id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml#
9 title: Texas Instruments K3 DMSS BCDMA
16 mode channels of K3 UDMA-P.
131 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
Dk3-udma.yaml6 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml#
9 title: Texas Instruments K3 NAVSS Unified DMA
47 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
/Documentation/devicetree/bindings/watchdog/
Dti,rti-wdt.yaml7 title: Texas Instruments K3 SoC Watchdog Timer
13 The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
/Documentation/devicetree/bindings/mailbox/
Dti,omap-mailbox.yaml7 title: TI OMAP2+ and K3 Mailbox devices
37 K3 AM65x, J721E and J7200 SoCs has each of these instances form a cluster and
122 - ti,am654-mailbox # for K3 AM65x, J721E and J7200 SoCs
123 - ti,am64-mailbox # for K3 AM64x SoCs
/Documentation/devicetree/bindings/mtd/
Dti,am654-hbmc.yaml7 title: HyperBus Memory Controller (HBMC) on TI's K3 family of SoCs
/Documentation/devicetree/bindings/crypto/
Dti,sa2ul.yaml7 title: K3 SoC SA2UL crypto module
/Documentation/devicetree/bindings/i2c/
Dti,omap4-i2c.yaml7 title: I2C controllers on TI's OMAP and K3 SoCs
/Documentation/devicetree/bindings/serial/
D8250_omap.yaml7 title: 8250 compliant UARTs on TI's OMAP2+ and K3 SoCs

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