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/Documentation/devicetree/bindings/arm/ti/
Dti,davinci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sekhar Nori <nsekhar@ti.com>
13 DA850/OMAP-L138/AM18x based boards
20 - enum:
21 - ti,da850-evm # DA850/OMAP-L138/AM18x Evaluation Module (EVM) board
22 - ti,da850-lcdk # DA850/OMAP-L138/AM18x L138/C6748 Development Kit (LCDK) board
23 - enbw,cmc # EnBW AM1808 based CMC board
24 - lego,ev3 # LEGO MINDSTORMS EV3 (AM1808 based)
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/Documentation/devicetree/bindings/clock/ti/davinci/
Dpll.txt8 - compatible: shall be one of:
9 - "ti,da850-pll0" for PLL0 on DA850/OMAP-L138/AM18XX
10 - "ti,da850-pll1" for PLL1 on DA850/OMAP-L138/AM18XX
11 - reg: physical base address and size of the controller's register area.
12 - clocks: phandles corresponding to the clock names
13 - clock-names: names of the clock sources - depends on compatible string
14 - for "ti,da850-pll0", shall be "clksrc", "extclksrc"
15 - for "ti,da850-pll1", shall be "clksrc"
18 - ti,clkmode-square-wave: Indicates that the board is supplying a square
20 This property is only valid when compatible = "ti,da850-pll0".
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Dpsc.txt7 - compatible: shall be one of:
8 - "ti,da850-psc0" for PSC0 on DA850/OMAP-L138/AM18XX
9 - "ti,da850-psc1" for PSC1 on DA850/OMAP-L138/AM18XX
10 - reg: physical base address and size of the controller's register area
11 - #clock-cells: from common clock binding; shall be set to 1
12 - #power-domain-cells: from generic power domain binding; shall be set to 1.
13 - clocks: phandles to clocks corresponding to the clock-names property
14 - clock-names: list of parent clock names - depends on compatible value
15 - for "ti,da850-psc0", shall be "pll0_sysclk1", "pll0_sysclk2",
17 - for "ti,da850-psc1", shall be "pll0_sysclk2", "pll0_sysclk4", "async3"
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/Documentation/devicetree/bindings/bus/
Dti,da850-mstpri.txt8 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf
12 - compatible: "ti,da850-mstpri" - for da850 based boards
13 - reg: offset and length of the mstpri registers
15 Example for da850-lcdk is shown below.
18 compatible = "ti,da850-mstpri";
/Documentation/devicetree/bindings/sound/
Ddavinci-mcbsp.txt4 This binding describes the "Multi-channel Buffered Serial Port" (McBSP)
5 audio interface found in some TI DaVinci processors like the OMAP-L138 or AM180x.
10 - compatible :
11 "ti,da850-mcbsp" : for DA850, AM180x and OPAM-L138 platforms
13 - reg : physical base address and length of the controller memory mapped
15 - reg-names : Should contain:
19 - dmas: three element list of DMA controller phandles, DMA request line and
21 - dma-names: identifier string for each DMA request line in the dmas property.
27 - interrupts : Interrupt numbers for McBSP
28 - interrupt-names : Known interrupt names are "rx" and "tx"
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/Documentation/devicetree/bindings/memory-controllers/
Dti,da8xx-ddrctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,da8xx-ddrctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bartosz Golaszewski <bgolaszewski@baylibre.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
15 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf
19 const: ti,da850-ddr-controller
25 - compatible
26 - reg
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Dti-aemif.txt4 provide a glue-less interface to a variety of asynchronous memory devices like
11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
17 - compatible: "ti,davinci-aemif"
18 "ti,keystone-aemif"
19 "ti,da850-aemif"
21 - reg: contains offset/length value for AEMIF control registers
24 - #address-cells: Must be 2. The partition number has to be encoded in the
25 first address cell and it may accept values 0..N-1
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/Documentation/devicetree/bindings/pinctrl/
Dti,da850-pupd.txt1 * Pin configuration for TI DA850/OMAP-L138/AM18x
8 - compatible: Must be "ti,da850-pupd"
9 - reg: Base address and length of the memory resource used by the pullup/down
17 - groups: An array of strings, each string containing the name of a pin group.
21 pinctrl-bindings.txt in this directory. The supported parameters are
22 bias-disable, bias-pull-up, bias-pull-down.
26 -------
30 pinconf: pin-controller@22c00c {
31 compatible = "ti,da850-pupd";
35 In board-specific file:
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/Documentation/devicetree/bindings/remoteproc/
Dti,davinci-rproc.txt4 Binding status: Unstable - Subject to changes for DT representation of clocks
7 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
8 is used to offload some of the processor-intensive tasks or algorithms, for
11 The processor cores in the sub-system usually contain additional sub-modules
18 Each DSP Core sub-system is represented as a single DT node.
21 --------------------
24 - compatible: Should be one of the following,
25 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs
27 - reg: Should contain an entry for each value in 'reg-names'.
30 the parent node's '#address-cells' and '#size-cells' values.
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/Documentation/devicetree/bindings/display/tilcdc/
Dtilcdc.txt1 Device-Tree bindings for tilcdc DRM driver
4 - compatible: value should be one of the following:
5 - "ti,am33xx-tilcdc" for AM335x based boards
6 - "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards
7 - interrupts: the interrupt number
8 - reg: base address and size of the LCDC device
11 - ti,hwmods: Name of the hwmod associated to the LCDC
14 - max-bandwidth: The maximum pixels per second that the memory
16 - max-width: The maximum horizontal pixel width supported by
18 - max-pixelclock: The maximum pixel clock that can be supported
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/Documentation/devicetree/bindings/spi/
Dspi-davinci.txt4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
17 - reg: Offset and length of SPI controller register space
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/Documentation/devicetree/bindings/soc/ti/
Dti,pruss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
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