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/Documentation/devicetree/bindings/soc/ti/
Dti,pruss.yaml19 instruction RAMs, some internal peripheral modules to facilitate industrial
35 acts on a primary Data RAM (there are usually 2 Data RAMs) at its address
99 The various Data RAMs within a single PRU-ICSS unit are represented as a
/Documentation/devicetree/bindings/remoteproc/
Dti,pru-rproc.yaml17 use the Data RAMs present within the PRU-ICSS for code execution.
Dti,omap-remoteproc.yaml110 any RAMs)
/Documentation/devicetree/bindings/cache/
Dl2c2x0.yaml93 description: Cycles of latency for Dirty RAMs. This is a single cell.
/Documentation/arch/arm/stm32/
Dstm32-dma-mdma-chaining.rst29 the system SRAM) for different peripheral. It can access external RAMs but
111 three fast access static internal RAMs of various size, used for data storage.